2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #ifndef _ASM_ARC_ATOMIC_H
10 #define _ASM_ARC_ATOMIC_H
16 #include <linux/types.h>
17 #include <linux/compiler.h>
18 #include <asm/cmpxchg.h>
19 #include <asm/barrier.h>
22 #define atomic_read(v) ((v)->counter)
24 #ifdef CONFIG_ARC_HAS_LLSC
26 #define atomic_set(v, i) (((v)->counter) = (i))
28 #define ATOMIC_OP(op, c_op, asm_op) \
29 static inline void atomic_##op(int i, atomic_t *v) \
33 __asm__ __volatile__( \
34 "1: llock %0, [%1] \n" \
35 " " #asm_op " %0, %0, %2 \n" \
36 " scond %0, [%1] \n" \
38 : "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
39 : "r"(&v->counter), "ir"(i) \
43 #define ATOMIC_OP_RETURN(op, c_op, asm_op) \
44 static inline int atomic_##op##_return(int i, atomic_t *v) \
48 __asm__ __volatile__( \
49 "1: llock %0, [%1] \n" \
50 " " #asm_op " %0, %0, %2 \n" \
51 " scond %0, [%1] \n" \
54 : "r"(&v->counter), "ir"(i) \
60 #else /* !CONFIG_ARC_HAS_LLSC */
64 /* violating atomic_xxx API locking protocol in UP for optimization sake */
65 #define atomic_set(v, i) (((v)->counter) = (i))
69 static inline void atomic_set(atomic_t *v, int i)
72 * Independent of hardware support, all of the atomic_xxx() APIs need
73 * to follow the same locking rules to make sure that a "hardware"
74 * atomic insn (e.g. LD) doesn't clobber an "emulated" atomic insn
77 * Thus atomic_set() despite being 1 insn (and seemingly atomic)
78 * requires the locking.
82 atomic_ops_lock(flags);
84 atomic_ops_unlock(flags);
90 * Non hardware assisted Atomic-R-M-W
91 * Locking would change to irq-disabling only (UP) and spinlocks (SMP)
94 #define ATOMIC_OP(op, c_op, asm_op) \
95 static inline void atomic_##op(int i, atomic_t *v) \
97 unsigned long flags; \
99 atomic_ops_lock(flags); \
101 atomic_ops_unlock(flags); \
104 #define ATOMIC_OP_RETURN(op, c_op) \
105 static inline int atomic_##op##_return(int i, atomic_t *v) \
107 unsigned long flags; \
108 unsigned long temp; \
110 atomic_ops_lock(flags); \
114 atomic_ops_unlock(flags); \
119 #endif /* !CONFIG_ARC_HAS_LLSC */
121 #define ATOMIC_OPS(op, c_op, asm_op) \
122 ATOMIC_OP(op, c_op, asm_op) \
123 ATOMIC_OP_RETURN(op, c_op, asm_op)
125 ATOMIC_OPS(add, +=, add)
126 ATOMIC_OPS(sub, -=, sub)
127 ATOMIC_OP(and, &=, and)
129 #define atomic_clear_mask(mask, v) atomic_and(~(mask), (v))
132 #undef ATOMIC_OP_RETURN
136 * __atomic_add_unless - add unless the number is a given value
137 * @v: pointer of type atomic_t
138 * @a: the amount to add to v...
139 * @u: ...unless v is equal to u.
141 * Atomically adds @a to @v, so long as it was not @u.
142 * Returns the old value of @v
144 #define __atomic_add_unless(v, a, u) \
147 c = atomic_read(v); \
148 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c)\
153 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
155 #define atomic_inc(v) atomic_add(1, v)
156 #define atomic_dec(v) atomic_sub(1, v)
158 #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
159 #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
160 #define atomic_inc_return(v) atomic_add_return(1, (v))
161 #define atomic_dec_return(v) atomic_sub_return(1, (v))
162 #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
164 #define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
166 #define ATOMIC_INIT(i) { (i) }
168 #include <asm-generic/atomic64.h>