2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "ti,am437-padconf", "pinctrl-single";
62 reg = <0x44e10800 0x31c>;
65 #interrupt-cells = <1>;
67 pinctrl-single,register-width = <32>;
68 pinctrl-single,function-mask = <0xffffffff>;
72 compatible = "ti,am4372-l3-noc", "simple-bus";
76 ti,hwmods = "l3_main";
77 reg = <0x44000000 0x400000
79 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
80 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
83 compatible = "ti,am4-prcm";
84 reg = <0x44df0000 0x11000>;
91 prcm_clockdomains: clockdomains {
96 compatible = "ti,am4-scrm";
97 reg = <0x44e10000 0x2000>;
100 #address-cells = <1>;
104 scrm_clockdomains: clockdomains {
108 edma: edma@49000000 {
109 compatible = "ti,edma3";
110 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
111 reg = <0x49000000 0x10000>,
113 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
114 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
115 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
119 uart0: serial@44e09000 {
120 compatible = "ti,am4372-uart","ti,omap2-uart";
121 reg = <0x44e09000 0x2000>;
122 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
126 uart1: serial@48022000 {
127 compatible = "ti,am4372-uart","ti,omap2-uart";
128 reg = <0x48022000 0x2000>;
129 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
134 uart2: serial@48024000 {
135 compatible = "ti,am4372-uart","ti,omap2-uart";
136 reg = <0x48024000 0x2000>;
137 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
142 uart3: serial@481a6000 {
143 compatible = "ti,am4372-uart","ti,omap2-uart";
144 reg = <0x481a6000 0x2000>;
145 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
150 uart4: serial@481a8000 {
151 compatible = "ti,am4372-uart","ti,omap2-uart";
152 reg = <0x481a8000 0x2000>;
153 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
158 uart5: serial@481aa000 {
159 compatible = "ti,am4372-uart","ti,omap2-uart";
160 reg = <0x481aa000 0x2000>;
161 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
166 mailbox: mailbox@480C8000 {
167 compatible = "ti,omap4-mailbox";
168 reg = <0x480C8000 0x200>;
169 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
170 ti,hwmods = "mailbox";
172 ti,mbox-num-users = <4>;
173 ti,mbox-num-fifos = <8>;
174 mbox_wkupm3: wkup_m3 {
175 ti,mbox-tx = <0 0 0>;
176 ti,mbox-rx = <0 0 3>;
180 timer1: timer@44e31000 {
181 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
182 reg = <0x44e31000 0x400>;
183 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
185 ti,hwmods = "timer1";
188 timer2: timer@48040000 {
189 compatible = "ti,am4372-timer","ti,am335x-timer";
190 reg = <0x48040000 0x400>;
191 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
192 ti,hwmods = "timer2";
195 timer3: timer@48042000 {
196 compatible = "ti,am4372-timer","ti,am335x-timer";
197 reg = <0x48042000 0x400>;
198 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
199 ti,hwmods = "timer3";
203 timer4: timer@48044000 {
204 compatible = "ti,am4372-timer","ti,am335x-timer";
205 reg = <0x48044000 0x400>;
206 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
208 ti,hwmods = "timer4";
212 timer5: timer@48046000 {
213 compatible = "ti,am4372-timer","ti,am335x-timer";
214 reg = <0x48046000 0x400>;
215 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
217 ti,hwmods = "timer5";
221 timer6: timer@48048000 {
222 compatible = "ti,am4372-timer","ti,am335x-timer";
223 reg = <0x48048000 0x400>;
224 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
226 ti,hwmods = "timer6";
230 timer7: timer@4804a000 {
231 compatible = "ti,am4372-timer","ti,am335x-timer";
232 reg = <0x4804a000 0x400>;
233 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
235 ti,hwmods = "timer7";
239 timer8: timer@481c1000 {
240 compatible = "ti,am4372-timer","ti,am335x-timer";
241 reg = <0x481c1000 0x400>;
242 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
243 ti,hwmods = "timer8";
247 timer9: timer@4833d000 {
248 compatible = "ti,am4372-timer","ti,am335x-timer";
249 reg = <0x4833d000 0x400>;
250 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
251 ti,hwmods = "timer9";
255 timer10: timer@4833f000 {
256 compatible = "ti,am4372-timer","ti,am335x-timer";
257 reg = <0x4833f000 0x400>;
258 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
259 ti,hwmods = "timer10";
263 timer11: timer@48341000 {
264 compatible = "ti,am4372-timer","ti,am335x-timer";
265 reg = <0x48341000 0x400>;
266 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
267 ti,hwmods = "timer11";
271 counter32k: counter@44e86000 {
272 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
273 reg = <0x44e86000 0x40>;
274 ti,hwmods = "counter_32k";
278 compatible = "ti,am4372-rtc","ti,da830-rtc";
279 reg = <0x44e3e000 0x1000>;
280 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
281 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
287 compatible = "ti,am4372-wdt","ti,omap3-wdt";
288 reg = <0x44e35000 0x1000>;
289 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
290 ti,hwmods = "wd_timer2";
293 gpio0: gpio@44e07000 {
294 compatible = "ti,am4372-gpio","ti,omap4-gpio";
295 reg = <0x44e07000 0x1000>;
296 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
299 interrupt-controller;
300 #interrupt-cells = <2>;
305 gpio1: gpio@4804c000 {
306 compatible = "ti,am4372-gpio","ti,omap4-gpio";
307 reg = <0x4804c000 0x1000>;
308 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
311 interrupt-controller;
312 #interrupt-cells = <2>;
317 gpio2: gpio@481ac000 {
318 compatible = "ti,am4372-gpio","ti,omap4-gpio";
319 reg = <0x481ac000 0x1000>;
320 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
323 interrupt-controller;
324 #interrupt-cells = <2>;
329 gpio3: gpio@481ae000 {
330 compatible = "ti,am4372-gpio","ti,omap4-gpio";
331 reg = <0x481ae000 0x1000>;
332 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
335 interrupt-controller;
336 #interrupt-cells = <2>;
341 gpio4: gpio@48320000 {
342 compatible = "ti,am4372-gpio","ti,omap4-gpio";
343 reg = <0x48320000 0x1000>;
344 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
347 interrupt-controller;
348 #interrupt-cells = <2>;
353 gpio5: gpio@48322000 {
354 compatible = "ti,am4372-gpio","ti,omap4-gpio";
355 reg = <0x48322000 0x1000>;
356 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
359 interrupt-controller;
360 #interrupt-cells = <2>;
365 hwspinlock: spinlock@480ca000 {
366 compatible = "ti,omap4-hwspinlock";
367 reg = <0x480ca000 0x1000>;
368 ti,hwmods = "spinlock";
373 compatible = "ti,am4372-i2c","ti,omap4-i2c";
374 reg = <0x44e0b000 0x1000>;
375 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
377 #address-cells = <1>;
383 compatible = "ti,am4372-i2c","ti,omap4-i2c";
384 reg = <0x4802a000 0x1000>;
385 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
387 #address-cells = <1>;
393 compatible = "ti,am4372-i2c","ti,omap4-i2c";
394 reg = <0x4819c000 0x1000>;
395 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
397 #address-cells = <1>;
403 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
404 reg = <0x48030000 0x400>;
405 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
407 #address-cells = <1>;
413 compatible = "ti,omap4-hsmmc";
414 reg = <0x48060000 0x1000>;
417 ti,needs-special-reset;
420 dma-names = "tx", "rx";
421 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
426 compatible = "ti,omap4-hsmmc";
427 reg = <0x481d8000 0x1000>;
429 ti,needs-special-reset;
432 dma-names = "tx", "rx";
433 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
438 compatible = "ti,omap4-hsmmc";
439 reg = <0x47810000 0x1000>;
441 ti,needs-special-reset;
442 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
447 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
448 reg = <0x481a0000 0x400>;
449 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
451 #address-cells = <1>;
457 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
458 reg = <0x481a2000 0x400>;
459 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
461 #address-cells = <1>;
467 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
468 reg = <0x481a4000 0x400>;
469 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
471 #address-cells = <1>;
477 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
478 reg = <0x48345000 0x400>;
479 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
481 #address-cells = <1>;
486 mac: ethernet@4a100000 {
487 compatible = "ti,am4372-cpsw","ti,cpsw";
488 reg = <0x4a100000 0x800
490 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
491 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
492 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
493 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
494 #address-cells = <1>;
496 ti,hwmods = "cpgmac0";
497 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
498 clock-names = "fck", "cpts";
500 cpdma_channels = <8>;
501 ale_entries = <1024>;
502 bd_ram_size = <0x2000>;
505 mac_control = <0x20>;
508 cpts_clock_mult = <0x80000000>;
509 cpts_clock_shift = <29>;
512 davinci_mdio: mdio@4a101000 {
513 compatible = "ti,am4372-mdio","ti,davinci_mdio";
514 reg = <0x4a101000 0x100>;
515 #address-cells = <1>;
517 ti,hwmods = "davinci_mdio";
518 bus_freq = <1000000>;
522 cpsw_emac0: slave@4a100200 {
523 /* Filled in by U-Boot */
524 mac-address = [ 00 00 00 00 00 00 ];
527 cpsw_emac1: slave@4a100300 {
528 /* Filled in by U-Boot */
529 mac-address = [ 00 00 00 00 00 00 ];
532 phy_sel: cpsw-phy-sel@44e10650 {
533 compatible = "ti,am43xx-cpsw-phy-sel";
534 reg= <0x44e10650 0x4>;
535 reg-names = "gmii-sel";
539 epwmss0: epwmss@48300000 {
540 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
541 reg = <0x48300000 0x10>;
542 #address-cells = <1>;
545 ti,hwmods = "epwmss0";
548 ecap0: ecap@48300100 {
549 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
551 reg = <0x48300100 0x80>;
556 ehrpwm0: ehrpwm@48300200 {
557 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
559 reg = <0x48300200 0x80>;
560 ti,hwmods = "ehrpwm0";
565 epwmss1: epwmss@48302000 {
566 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
567 reg = <0x48302000 0x10>;
568 #address-cells = <1>;
571 ti,hwmods = "epwmss1";
574 ecap1: ecap@48302100 {
575 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
577 reg = <0x48302100 0x80>;
582 ehrpwm1: ehrpwm@48302200 {
583 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
585 reg = <0x48302200 0x80>;
586 ti,hwmods = "ehrpwm1";
591 epwmss2: epwmss@48304000 {
592 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
593 reg = <0x48304000 0x10>;
594 #address-cells = <1>;
597 ti,hwmods = "epwmss2";
600 ecap2: ecap@48304100 {
601 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
603 reg = <0x48304100 0x80>;
608 ehrpwm2: ehrpwm@48304200 {
609 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
611 reg = <0x48304200 0x80>;
612 ti,hwmods = "ehrpwm2";
617 epwmss3: epwmss@48306000 {
618 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
619 reg = <0x48306000 0x10>;
620 #address-cells = <1>;
623 ti,hwmods = "epwmss3";
626 ehrpwm3: ehrpwm@48306200 {
627 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
629 reg = <0x48306200 0x80>;
630 ti,hwmods = "ehrpwm3";
635 epwmss4: epwmss@48308000 {
636 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
637 reg = <0x48308000 0x10>;
638 #address-cells = <1>;
641 ti,hwmods = "epwmss4";
644 ehrpwm4: ehrpwm@48308200 {
645 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
647 reg = <0x48308200 0x80>;
648 ti,hwmods = "ehrpwm4";
653 epwmss5: epwmss@4830a000 {
654 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
655 reg = <0x4830a000 0x10>;
656 #address-cells = <1>;
659 ti,hwmods = "epwmss5";
662 ehrpwm5: ehrpwm@4830a200 {
663 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
665 reg = <0x4830a200 0x80>;
666 ti,hwmods = "ehrpwm5";
671 sham: sham@53100000 {
672 compatible = "ti,omap5-sham";
674 reg = <0x53100000 0x300>;
677 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
681 compatible = "ti,omap4-aes";
683 reg = <0x53501000 0xa0>;
684 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
687 dma-names = "tx", "rx";
691 compatible = "ti,omap4-des";
693 reg = <0x53701000 0xa0>;
694 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
697 dma-names = "tx", "rx";
700 mcasp0: mcasp@48038000 {
701 compatible = "ti,am33xx-mcasp-audio";
702 ti,hwmods = "mcasp0";
703 reg = <0x48038000 0x2000>,
704 <0x46000000 0x400000>;
705 reg-names = "mpu", "dat";
706 interrupts = <80>, <81>;
707 interrupt-names = "tx", "rx";
711 dma-names = "tx", "rx";
714 mcasp1: mcasp@4803C000 {
715 compatible = "ti,am33xx-mcasp-audio";
716 ti,hwmods = "mcasp1";
717 reg = <0x4803C000 0x2000>,
718 <0x46400000 0x400000>;
719 reg-names = "mpu", "dat";
720 interrupts = <82>, <83>;
721 interrupt-names = "tx", "rx";
725 dma-names = "tx", "rx";
729 compatible = "ti,am3352-elm";
730 reg = <0x48080000 0x2000>;
731 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
733 clocks = <&l4ls_gclk>;
738 gpmc: gpmc@50000000 {
739 compatible = "ti,am3352-gpmc";
741 clocks = <&l3s_gclk>;
743 reg = <0x50000000 0x2000>;
744 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
746 gpmc,num-waitpins = <2>;
747 #address-cells = <2>;
752 am43xx_control_usb2phy1: control-phy@44e10620 {
753 compatible = "ti,control-phy-usb2-am437";
754 reg = <0x44e10620 0x4>;
758 am43xx_control_usb2phy2: control-phy@0x44e10628 {
759 compatible = "ti,control-phy-usb2-am437";
760 reg = <0x44e10628 0x4>;
764 ocp2scp0: ocp2scp@483a8000 {
765 compatible = "ti,omap-ocp2scp";
766 #address-cells = <1>;
769 ti,hwmods = "ocp2scp0";
771 usb2_phy1: phy@483a8000 {
772 compatible = "ti,am437x-usb2";
773 reg = <0x483a8000 0x8000>;
774 ctrl-module = <&am43xx_control_usb2phy1>;
775 clocks = <&usb_phy0_always_on_clk32k>,
776 <&usb_otg_ss0_refclk960m>;
777 clock-names = "wkupclk", "refclk";
783 ocp2scp1: ocp2scp@483e8000 {
784 compatible = "ti,omap-ocp2scp";
785 #address-cells = <1>;
788 ti,hwmods = "ocp2scp1";
790 usb2_phy2: phy@483e8000 {
791 compatible = "ti,am437x-usb2";
792 reg = <0x483e8000 0x8000>;
793 ctrl-module = <&am43xx_control_usb2phy2>;
794 clocks = <&usb_phy1_always_on_clk32k>,
795 <&usb_otg_ss1_refclk960m>;
796 clock-names = "wkupclk", "refclk";
802 dwc3_1: omap_dwc3@48380000 {
803 compatible = "ti,am437x-dwc3";
804 ti,hwmods = "usb_otg_ss0";
805 reg = <0x48380000 0x10000>;
806 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
807 #address-cells = <1>;
813 compatible = "synopsys,dwc3";
814 reg = <0x48390000 0x10000>;
815 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
817 phy-names = "usb2-phy";
818 maximum-speed = "high-speed";
824 dwc3_2: omap_dwc3@483c0000 {
825 compatible = "ti,am437x-dwc3";
826 ti,hwmods = "usb_otg_ss1";
827 reg = <0x483c0000 0x10000>;
828 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
829 #address-cells = <1>;
835 compatible = "synopsys,dwc3";
836 reg = <0x483d0000 0x10000>;
837 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
839 phy-names = "usb2-phy";
840 maximum-speed = "high-speed";
846 qspi: qspi@47900000 {
847 compatible = "ti,am4372-qspi";
848 reg = <0x47900000 0x100>;
849 #address-cells = <1>;
852 interrupts = <0 138 0x4>;
858 compatible = "ti,am43xx-hdq";
859 reg = <0x48347000 0x1000>;
860 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
861 clocks = <&func_12m_clk>;
868 compatible = "ti,omap3-dss";
869 reg = <0x4832a000 0x200>;
871 ti,hwmods = "dss_core";
872 clocks = <&disp_clk>;
874 #address-cells = <1>;
878 dispc: dispc@4832a400 {
879 compatible = "ti,omap3-dispc";
880 reg = <0x4832a400 0x400>;
881 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
882 ti,hwmods = "dss_dispc";
883 clocks = <&disp_clk>;
887 rfbi: rfbi@4832a800 {
888 compatible = "ti,omap3-rfbi";
889 reg = <0x4832a800 0x100>;
890 ti,hwmods = "dss_rfbi";
891 clocks = <&disp_clk>;
896 ocmcram: ocmcram@40300000 {
897 compatible = "mmio-sram";
898 reg = <0x40300000 0x40000>; /* 256k */
903 /include/ "am43xx-clocks.dtsi"