arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License as
  18  *     published by the Free Software Foundation; either version 2 of the
  19  *     License, or (at your option) any later version.
  20  *
  21  *     This file is distributed in the hope that it will be useful
  22  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  *     GNU General Public License for more details.
  25  *
  26  * Or, alternatively
  27  *
  28  *  b) Permission is hereby granted, free of charge, to any person
  29  *     obtaining a copy of this software and associated documentation
  30  *     files (the "Software"), to deal in the Software without
  31  *     restriction, including without limitation the rights to use
  32  *     copy, modify, merge, publish, distribute, sublicense, and/or
  33  *     sell copies of the Software, and to permit persons to whom the
  34  *     Software is furnished to do so, subject to the following
  35  *     conditions:
  36  *
  37  *     The above copyright notice and this permission notice shall be
  38  *     included in all copies or substantial portions of the Software.
  39  *
  40  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  41  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  42  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  43  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  44  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  45  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  46  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  47  *     OTHER DEALINGS IN THE SOFTWARE.
  48  *
  49  * Contains definitions specific to the Armada XP SoC that are not
  50  * common to all Armada SoCs.
  51  */
  52
  53 #include "armada-370-xp.dtsi"
  54
  55 / {
  56         model = "Marvell Armada XP family SoC";
  57         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  58
  59         aliases {
  60                 serial2 = &uart2;
  61                 serial3 = &uart3;
  62         };
  63
  64         soc {
  65                 compatible = "marvell,armadaxp-mbus", "simple-bus";
  66
  67                 bootrom {
  68                         compatible = "marvell,bootrom";
  69                         reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  70                 };
  71
  72                 internal-regs {
  73                         sdramc@1400 {
  74                                 compatible = "marvell,armada-xp-sdram-controller";
  75                                 reg = <0x1400 0x500>;
  76                         };
  77
  78                         L2: l2-cache {
  79                                 compatible = "marvell,aurora-system-cache";
  80                                 reg = <0x08000 0x1000>;
  81                                 cache-id-part = <0x100>;
  82                                 cache-unified;
  83                                 wt-override;
  84                         };
  85
  86                         spi0: spi@10600 {
  87                                 pinctrl-0 = <&spi0_pins>;
  88                                 pinctrl-names = "default";
  89                         };
  90
  91                         i2c0: i2c@11000 {
  92                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  93                                 reg = <0x11000 0x100>;
  94                         };
  95
  96                         i2c1: i2c@11100 {
  97                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  98                                 reg = <0x11100 0x100>;
  99                         };
 100
 101                         uart2: serial@12200 {
 102                                 compatible = "snps,dw-apb-uart";
 103                                 pinctrl-0 = <&uart2_pins>;
 104                                 pinctrl-names = "default";
 105                                 reg = <0x12200 0x100>;
 106                                 reg-shift = <2>;
 107                                 interrupts = <43>;
 108                                 reg-io-width = <1>;
 109                                 clocks = <&coreclk 0>;
 110                                 status = "disabled";
 111                         };
 112
 113                         uart3: serial@12300 {
 114                                 compatible = "snps,dw-apb-uart";
 115                                 pinctrl-0 = <&uart3_pins>;
 116                                 pinctrl-names = "default";
 117                                 reg = <0x12300 0x100>;
 118                                 reg-shift = <2>;
 119                                 interrupts = <44>;
 120                                 reg-io-width = <1>;
 121                                 clocks = <&coreclk 0>;
 122                                 status = "disabled";
 123                         };
 124
 125                         system-controller@18200 {
 126                                 compatible = "marvell,armada-370-xp-system-controller";
 127                                 reg = <0x18200 0x500>;
 128                         };
 129
 130                         gateclk: clock-gating-control@18220 {
 131                                 compatible = "marvell,armada-xp-gating-clock";
 132                                 reg = <0x18220 0x4>;
 133                                 clocks = <&coreclk 0>;
 134                                 #clock-cells = <1>;
 135                         };
 136
 137                         coreclk: mvebu-sar@18230 {
 138                                 compatible = "marvell,armada-xp-core-clock";
 139                                 reg = <0x18230 0x08>;
 140                                 #clock-cells = <1>;
 141                         };
 142
 143                         thermal@182b0 {
 144                                 compatible = "marvell,armadaxp-thermal";
 145                                 reg = <0x182b0 0x4
 146                                         0x184d0 0x4>;
 147                                 status = "okay";
 148                         };
 149
 150                         cpuclk: clock-complex@18700 {
 151                                 #clock-cells = <1>;
 152                                 compatible = "marvell,armada-xp-cpu-clock";
 153                                 reg = <0x18700 0xA0>, <0x1c054 0x10>;
 154                                 clocks = <&coreclk 1>;
 155                         };
 156
 157                         interrupt-controller@20000 {
 158                               reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 159                         };
 160
 161                         timer@20300 {
 162                                 compatible = "marvell,armada-xp-timer";
 163                                 clocks = <&coreclk 2>, <&refclk>;
 164                                 clock-names = "nbclk", "fixed";
 165                         };
 166
 167                         watchdog@20300 {
 168                                 compatible = "marvell,armada-xp-wdt";
 169                                 clocks = <&coreclk 2>, <&refclk>;
 170                                 clock-names = "nbclk", "fixed";
 171                         };
 172
 173                         cpurst@20800 {
 174                                 compatible = "marvell,armada-370-cpu-reset";
 175                                 reg = <0x20800 0x20>;
 176                         };
 177
 178                         eth2: ethernet@30000 {
 179                                 compatible = "marvell,armada-370-neta";
 180                                 reg = <0x30000 0x4000>;
 181                                 interrupts = <12>;
 182                                 clocks = <&gateclk 2>;
 183                                 status = "disabled";
 184                         };
 185
 186                         usb@50000 {
 187                                 clocks = <&gateclk 18>;
 188                         };
 189
 190                         usb@51000 {
 191                                 clocks = <&gateclk 19>;
 192                         };
 193
 194                         usb@52000 {
 195                                 compatible = "marvell,orion-ehci";
 196                                 reg = <0x52000 0x500>;
 197                                 interrupts = <47>;
 198                                 clocks = <&gateclk 20>;
 199                                 status = "disabled";
 200                         };
 201
 202                         xor@60900 {
 203                                 compatible = "marvell,orion-xor";
 204                                 reg = <0x60900 0x100
 205                                        0x60b00 0x100>;
 206                                 clocks = <&gateclk 22>;
 207                                 status = "okay";
 208
 209                                 xor10 {
 210                                         interrupts = <51>;
 211                                         dmacap,memcpy;
 212                                         dmacap,xor;
 213                                 };
 214                                 xor11 {
 215                                         interrupts = <52>;
 216                                         dmacap,memcpy;
 217                                         dmacap,xor;
 218                                         dmacap,memset;
 219                                 };
 220                         };
 221
 222                         xor@f0900 {
 223                                 compatible = "marvell,orion-xor";
 224                                 reg = <0xF0900 0x100
 225                                        0xF0B00 0x100>;
 226                                 clocks = <&gateclk 28>;
 227                                 status = "okay";
 228
 229                                 xor00 {
 230                                         interrupts = <94>;
 231                                         dmacap,memcpy;
 232                                         dmacap,xor;
 233                                 };
 234                                 xor01 {
 235                                         interrupts = <95>;
 236                                         dmacap,memcpy;
 237                                         dmacap,xor;
 238                                         dmacap,memset;
 239                                 };
 240                         };
 241                 };
 242         };
 243
 244         clocks {
 245                 /* 25 MHz reference crystal */
 246                 refclk: oscillator {
 247                         compatible = "fixed-clock";
 248                         #clock-cells = <0>;
 249                         clock-frequency = <25000000>;
 250                 };
 251         };
 252 };
 253
 254 &pinctrl {
 255         ge0_gmii_pins: ge0-gmii-pins {
 256                 marvell,pins =
 257                      "mpp0",  "mpp1",  "mpp2",  "mpp3",
 258                      "mpp4",  "mpp5",  "mpp6",  "mpp7",
 259                      "mpp8",  "mpp9",  "mpp10", "mpp11",
 260                      "mpp12", "mpp13", "mpp14", "mpp15",
 261                      "mpp16", "mpp17", "mpp18", "mpp19",
 262                      "mpp20", "mpp21", "mpp22", "mpp23";
 263                 marvell,function = "ge0";
 264         };
 265
 266         ge0_rgmii_pins: ge0-rgmii-pins {
 267                 marvell,pins =
 268                      "mpp0", "mpp1", "mpp2", "mpp3",
 269                      "mpp4", "mpp5", "mpp6", "mpp7",
 270                      "mpp8", "mpp9", "mpp10", "mpp11";
 271                 marvell,function = "ge0";
 272         };
 273
 274         ge1_rgmii_pins: ge1-rgmii-pins {
 275                 marvell,pins =
 276                      "mpp12", "mpp13", "mpp14", "mpp15",
 277                      "mpp16", "mpp17", "mpp18", "mpp19",
 278                      "mpp20", "mpp21", "mpp22", "mpp23";
 279                 marvell,function = "ge1";
 280         };
 281
 282         sdio_pins: sdio-pins {
 283                 marvell,pins = "mpp30", "mpp31", "mpp32",
 284                                "mpp33", "mpp34", "mpp35";
 285                 marvell,function = "sd0";
 286         };
 287
 288         spi0_pins: spi0-pins {
 289                 marvell,pins = "mpp36", "mpp37",
 290                                "mpp38", "mpp39";
 291                 marvell,function = "spi";
 292         };
 293
 294         uart2_pins: uart2-pins {
 295                 marvell,pins = "mpp42", "mpp43";
 296                 marvell,function = "uart2";
 297         };
 298
 299         uart3_pins: uart3-pins {
 300                 marvell,pins = "mpp44", "mpp45";
 301                 marvell,function = "uart3";
 302         };
 303 };