arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * Contains definitions specific to the Armada XP SoC that are not
  16  * common to all Armada SoCs.
  17  */
  18
  19 #include "armada-370-xp.dtsi"
  20
  21 / {
  22         model = "Marvell Armada XP family SoC";
  23         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  24
  25         aliases {
  26                 eth2 = &eth2;
  27         };
  28
  29         soc {
  30                 compatible = "marvell,armadaxp-mbus", "simple-bus";
  31
  32                 bootrom {
  33                         compatible = "marvell,bootrom";
  34                         reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  35                 };
  36
  37                 internal-regs {
  38                         L2: l2-cache {
  39                                 compatible = "marvell,aurora-system-cache";
  40                                 reg = <0x08000 0x1000>;
  41                                 cache-id-part = <0x100>;
  42                                 cache-unified;
  43                                 wt-override;
  44                         };
  45
  46                         i2c0: i2c@11000 {
  47                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  48                                 reg = <0x11000 0x100>;
  49                         };
  50
  51                         i2c1: i2c@11100 {
  52                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  53                                 reg = <0x11100 0x100>;
  54                         };
  55
  56                         serial@12200 {
  57                                 compatible = "snps,dw-apb-uart";
  58                                 reg = <0x12200 0x100>;
  59                                 reg-shift = <2>;
  60                                 interrupts = <43>;
  61                                 reg-io-width = <1>;
  62                                 clocks = <&coreclk 0>;
  63                                 status = "disabled";
  64                         };
  65                         serial@12300 {
  66                                 compatible = "snps,dw-apb-uart";
  67                                 reg = <0x12300 0x100>;
  68                                 reg-shift = <2>;
  69                                 interrupts = <44>;
  70                                 reg-io-width = <1>;
  71                                 clocks = <&coreclk 0>;
  72                                 status = "disabled";
  73                         };
  74
  75                         pinctrl: pin-ctrl@18000 {
  76                                 reg = <0x18000 0x38>;
  77
  78                                 pmx_ge0_gmii: pmx-ge0-gmii {
  79                                         marvell,pins =
  80                                              "mpp0",  "mpp1",  "mpp2",  "mpp3",
  81                                              "mpp4",  "mpp5",  "mpp6",  "mpp7",
  82                                              "mpp8",  "mpp9",  "mpp10", "mpp11",
  83                                              "mpp12", "mpp13", "mpp14", "mpp15",
  84                                              "mpp16", "mpp17", "mpp18", "mpp19",
  85                                              "mpp20", "mpp21", "mpp22", "mpp23";
  86                                         marvell,function = "ge0";
  87                                 };
  88
  89                                 pmx_ge0_rgmii: pmx-ge0-rgmii {
  90                                         marvell,pins =
  91                                              "mpp0", "mpp1", "mpp2", "mpp3",
  92                                              "mpp4", "mpp5", "mpp6", "mpp7",
  93                                              "mpp8", "mpp9", "mpp10", "mpp11";
  94                                         marvell,function = "ge0";
  95                                 };
  96
  97                                 pmx_ge1_rgmii: pmx-ge1-rgmii {
  98                                         marvell,pins =
  99                                              "mpp12", "mpp13", "mpp14", "mpp15",
 100                                              "mpp16", "mpp17", "mpp18", "mpp19",
 101                                              "mpp20", "mpp21", "mpp22", "mpp23";
 102                                         marvell,function = "ge1";
 103                                 };
 104
 105                                 sdio_pins: sdio-pins {
 106                                         marvell,pins = "mpp30", "mpp31", "mpp32",
 107                                                        "mpp33", "mpp34", "mpp35";
 108                                         marvell,function = "sd0";
 109                                 };
 110                         };
 111
 112                         system-controller@18200 {
 113                                 compatible = "marvell,armada-370-xp-system-controller";
 114                                 reg = <0x18200 0x500>;
 115                         };
 116
 117                         gateclk: clock-gating-control@18220 {
 118                                 compatible = "marvell,armada-xp-gating-clock";
 119                                 reg = <0x18220 0x4>;
 120                                 clocks = <&coreclk 0>;
 121                                 #clock-cells = <1>;
 122                         };
 123
 124                         coreclk: mvebu-sar@18230 {
 125                                 compatible = "marvell,armada-xp-core-clock";
 126                                 reg = <0x18230 0x08>;
 127                                 #clock-cells = <1>;
 128                         };
 129
 130                         thermal@182b0 {
 131                                 compatible = "marvell,armadaxp-thermal";
 132                                 reg = <0x182b0 0x4
 133                                         0x184d0 0x4>;
 134                                 status = "okay";
 135                         };
 136
 137                         cpuclk: clock-complex@18700 {
 138                                 #clock-cells = <1>;
 139                                 compatible = "marvell,armada-xp-cpu-clock";
 140                                 reg = <0x18700 0xA0>, <0x1c054 0x10>;
 141                                 clocks = <&coreclk 1>;
 142                         };
 143
 144                         interrupt-controller@20000 {
 145                               reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 146                         };
 147
 148                         timer@20300 {
 149                                 compatible = "marvell,armada-xp-timer";
 150                                 clocks = <&coreclk 2>, <&refclk>;
 151                                 clock-names = "nbclk", "fixed";
 152                         };
 153
 154                         watchdog@20300 {
 155                                 compatible = "marvell,armada-xp-wdt";
 156                                 clocks = <&coreclk 2>, <&refclk>;
 157                                 clock-names = "nbclk", "fixed";
 158                         };
 159
 160                         cpurst@20800 {
 161                                 compatible = "marvell,armada-370-cpu-reset";
 162                                 reg = <0x20800 0x20>;
 163                         };
 164
 165                         eth2: ethernet@30000 {
 166                                 compatible = "marvell,armada-370-neta";
 167                                 reg = <0x30000 0x4000>;
 168                                 interrupts = <12>;
 169                                 clocks = <&gateclk 2>;
 170                                 status = "disabled";
 171                         };
 172
 173                         usb@50000 {
 174                                 clocks = <&gateclk 18>;
 175                         };
 176
 177                         usb@51000 {
 178                                 clocks = <&gateclk 19>;
 179                         };
 180
 181                         usb@52000 {
 182                                 compatible = "marvell,orion-ehci";
 183                                 reg = <0x52000 0x500>;
 184                                 interrupts = <47>;
 185                                 clocks = <&gateclk 20>;
 186                                 status = "disabled";
 187                         };
 188
 189                         xor@60900 {
 190                                 compatible = "marvell,orion-xor";
 191                                 reg = <0x60900 0x100
 192                                        0x60b00 0x100>;
 193                                 clocks = <&gateclk 22>;
 194                                 status = "okay";
 195
 196                                 xor10 {
 197                                         interrupts = <51>;
 198                                         dmacap,memcpy;
 199                                         dmacap,xor;
 200                                 };
 201                                 xor11 {
 202                                         interrupts = <52>;
 203                                         dmacap,memcpy;
 204                                         dmacap,xor;
 205                                         dmacap,memset;
 206                                 };
 207                         };
 208
 209                         xor@f0900 {
 210                                 compatible = "marvell,orion-xor";
 211                                 reg = <0xF0900 0x100
 212                                        0xF0B00 0x100>;
 213                                 clocks = <&gateclk 28>;
 214                                 status = "okay";
 215
 216                                 xor00 {
 217                                         interrupts = <94>;
 218                                         dmacap,memcpy;
 219                                         dmacap,xor;
 220                                 };
 221                                 xor01 {
 222                                         interrupts = <95>;
 223                                         dmacap,memcpy;
 224                                         dmacap,xor;
 225                                         dmacap,memset;
 226                                 };
 227                         };
 228                 };
 229         };
 230
 231         clocks {
 232                 /* 25 MHz reference crystal */
 233                 refclk: oscillator {
 234                         compatible = "fixed-clock";
 235                         #clock-cells = <0>;
 236                         clock-frequency = <25000000>;
 237                 };
 238         };
 239 };