arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include <dt-bindings/clock/exynos-audss-clk.h>
  24 #include "skeleton.dtsi"
  25
  26 / {
  27         interrupt-parent = <&gic>;
  28
  29         aliases {
  30                 spi0 = &spi_0;
  31                 spi1 = &spi_1;
  32                 spi2 = &spi_2;
  33                 i2c0 = &i2c_0;
  34                 i2c1 = &i2c_1;
  35                 i2c2 = &i2c_2;
  36                 i2c3 = &i2c_3;
  37                 i2c4 = &i2c_4;
  38                 i2c5 = &i2c_5;
  39                 i2c6 = &i2c_6;
  40                 i2c7 = &i2c_7;
  41                 csis0 = &csis_0;
  42                 csis1 = &csis_1;
  43                 fimc0 = &fimc_0;
  44                 fimc1 = &fimc_1;
  45                 fimc2 = &fimc_2;
  46                 fimc3 = &fimc_3;
  47         };
  48
  49         clock_audss: clock-controller@03810000 {
  50                 compatible = "samsung,exynos4210-audss-clock";
  51                 reg = <0x03810000 0x0C>;
  52                 #clock-cells = <1>;
  53         };
  54
  55         i2s0: i2s@03830000 {
  56                 compatible = "samsung,s5pv210-i2s";
  57                 reg = <0x03830000 0x100>;
  58                 clocks = <&clock_audss EXYNOS_I2S_BUS>;
  59                 clock-names = "iis";
  60                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
  61                 dma-names = "tx", "rx", "tx-sec";
  62                 samsung,idma-addr = <0x03000000>;
  63                 status = "disabled";
  64         };
  65
  66         chipid@10000000 {
  67                 compatible = "samsung,exynos4210-chipid";
  68                 reg = <0x10000000 0x100>;
  69         };
  70
  71         mipi_phy: video-phy@10020710 {
  72                 compatible = "samsung,s5pv210-mipi-video-phy";
  73                 reg = <0x10020710 8>;
  74                 #phy-cells = <1>;
  75         };
  76
  77         pd_mfc: mfc-power-domain@10023C40 {
  78                 compatible = "samsung,exynos4210-pd";
  79                 reg = <0x10023C40 0x20>;
  80         };
  81
  82         pd_g3d: g3d-power-domain@10023C60 {
  83                 compatible = "samsung,exynos4210-pd";
  84                 reg = <0x10023C60 0x20>;
  85         };
  86
  87         pd_lcd0: lcd0-power-domain@10023C80 {
  88                 compatible = "samsung,exynos4210-pd";
  89                 reg = <0x10023C80 0x20>;
  90         };
  91
  92         pd_tv: tv-power-domain@10023C20 {
  93                 compatible = "samsung,exynos4210-pd";
  94                 reg = <0x10023C20 0x20>;
  95         };
  96
  97         pd_cam: cam-power-domain@10023C00 {
  98                 compatible = "samsung,exynos4210-pd";
  99                 reg = <0x10023C00 0x20>;
 100         };
 101
 102         pd_gps: gps-power-domain@10023CE0 {
 103                 compatible = "samsung,exynos4210-pd";
 104                 reg = <0x10023CE0 0x20>;
 105         };
 106
 107         pd_gps_alive: gps-alive-power-domain@10023D00 {
 108                 compatible = "samsung,exynos4210-pd";
 109                 reg = <0x10023D00 0x20>;
 110         };
 111
 112         gic: interrupt-controller@10490000 {
 113                 compatible = "arm,cortex-a9-gic";
 114                 #interrupt-cells = <3>;
 115                 interrupt-controller;
 116                 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
 117         };
 118
 119         combiner: interrupt-controller@10440000 {
 120                 compatible = "samsung,exynos4210-combiner";
 121                 #interrupt-cells = <2>;
 122                 interrupt-controller;
 123                 reg = <0x10440000 0x1000>;
 124         };
 125
 126         pmu {
 127                 compatible = "arm,cortex-a9-pmu";
 128                 interrupt-parent = <&combiner>;
 129                 interrupts = <2 2>, <3 2>;
 130         };
 131
 132         sys_reg: syscon@10010000 {
 133                 compatible = "samsung,exynos4-sysreg", "syscon";
 134                 reg = <0x10010000 0x400>;
 135         };
 136
 137         pmu_system_controller: system-controller@10020000 {
 138                 compatible = "samsung,exynos4210-pmu", "syscon";
 139                 reg = <0x10020000 0x4000>;
 140         };
 141
 142         dsi_0: dsi@11C80000 {
 143                 compatible = "samsung,exynos4210-mipi-dsi";
 144                 reg = <0x11C80000 0x10000>;
 145                 interrupts = <0 79 0>;
 146                 samsung,power-domain = <&pd_lcd0>;
 147                 phys = <&mipi_phy 1>;
 148                 phy-names = "dsim";
 149                 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
 150                 clock-names = "bus_clk", "pll_clk";
 151                 status = "disabled";
 152                 #address-cells = <1>;
 153                 #size-cells = <0>;
 154         };
 155
 156         camera {
 157                 compatible = "samsung,fimc", "simple-bus";
 158                 status = "disabled";
 159                 #address-cells = <1>;
 160                 #size-cells = <1>;
 161                 #clock-cells = <1>;
 162                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 163                 ranges;
 164
 165                 fimc_0: fimc@11800000 {
 166                         compatible = "samsung,exynos4210-fimc";
 167                         reg = <0x11800000 0x1000>;
 168                         interrupts = <0 84 0>;
 169                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 170                         clock-names = "fimc", "sclk_fimc";
 171                         samsung,power-domain = <&pd_cam>;
 172                         samsung,sysreg = <&sys_reg>;
 173                         status = "disabled";
 174                 };
 175
 176                 fimc_1: fimc@11810000 {
 177                         compatible = "samsung,exynos4210-fimc";
 178                         reg = <0x11810000 0x1000>;
 179                         interrupts = <0 85 0>;
 180                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 181                         clock-names = "fimc", "sclk_fimc";
 182                         samsung,power-domain = <&pd_cam>;
 183                         samsung,sysreg = <&sys_reg>;
 184                         status = "disabled";
 185                 };
 186
 187                 fimc_2: fimc@11820000 {
 188                         compatible = "samsung,exynos4210-fimc";
 189                         reg = <0x11820000 0x1000>;
 190                         interrupts = <0 86 0>;
 191                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 192                         clock-names = "fimc", "sclk_fimc";
 193                         samsung,power-domain = <&pd_cam>;
 194                         samsung,sysreg = <&sys_reg>;
 195                         status = "disabled";
 196                 };
 197
 198                 fimc_3: fimc@11830000 {
 199                         compatible = "samsung,exynos4210-fimc";
 200                         reg = <0x11830000 0x1000>;
 201                         interrupts = <0 87 0>;
 202                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 203                         clock-names = "fimc", "sclk_fimc";
 204                         samsung,power-domain = <&pd_cam>;
 205                         samsung,sysreg = <&sys_reg>;
 206                         status = "disabled";
 207                 };
 208
 209                 csis_0: csis@11880000 {
 210                         compatible = "samsung,exynos4210-csis";
 211                         reg = <0x11880000 0x4000>;
 212                         interrupts = <0 78 0>;
 213                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 214                         clock-names = "csis", "sclk_csis";
 215                         bus-width = <4>;
 216                         samsung,power-domain = <&pd_cam>;
 217                         phys = <&mipi_phy 0>;
 218                         phy-names = "csis";
 219                         status = "disabled";
 220                         #address-cells = <1>;
 221                         #size-cells = <0>;
 222                 };
 223
 224                 csis_1: csis@11890000 {
 225                         compatible = "samsung,exynos4210-csis";
 226                         reg = <0x11890000 0x4000>;
 227                         interrupts = <0 80 0>;
 228                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 229                         clock-names = "csis", "sclk_csis";
 230                         bus-width = <2>;
 231                         samsung,power-domain = <&pd_cam>;
 232                         phys = <&mipi_phy 2>;
 233                         phy-names = "csis";
 234                         status = "disabled";
 235                         #address-cells = <1>;
 236                         #size-cells = <0>;
 237                 };
 238         };
 239
 240         watchdog@10060000 {
 241                 compatible = "samsung,s3c2410-wdt";
 242                 reg = <0x10060000 0x100>;
 243                 interrupts = <0 43 0>;
 244                 clocks = <&clock CLK_WDT>;
 245                 clock-names = "watchdog";
 246                 status = "disabled";
 247         };
 248
 249         rtc@10070000 {
 250                 compatible = "samsung,s3c6410-rtc";
 251                 reg = <0x10070000 0x100>;
 252                 interrupts = <0 44 0>, <0 45 0>;
 253                 clocks = <&clock CLK_RTC>;
 254                 clock-names = "rtc";
 255                 status = "disabled";
 256         };
 257
 258         keypad@100A0000 {
 259                 compatible = "samsung,s5pv210-keypad";
 260                 reg = <0x100A0000 0x100>;
 261                 interrupts = <0 109 0>;
 262                 clocks = <&clock CLK_KEYIF>;
 263                 clock-names = "keypad";
 264                 status = "disabled";
 265         };
 266
 267         sdhci@12510000 {
 268                 compatible = "samsung,exynos4210-sdhci";
 269                 reg = <0x12510000 0x100>;
 270                 interrupts = <0 73 0>;
 271                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 272                 clock-names = "hsmmc", "mmc_busclk.2";
 273                 status = "disabled";
 274         };
 275
 276         sdhci@12520000 {
 277                 compatible = "samsung,exynos4210-sdhci";
 278                 reg = <0x12520000 0x100>;
 279                 interrupts = <0 74 0>;
 280                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 281                 clock-names = "hsmmc", "mmc_busclk.2";
 282                 status = "disabled";
 283         };
 284
 285         sdhci@12530000 {
 286                 compatible = "samsung,exynos4210-sdhci";
 287                 reg = <0x12530000 0x100>;
 288                 interrupts = <0 75 0>;
 289                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 290                 clock-names = "hsmmc", "mmc_busclk.2";
 291                 status = "disabled";
 292         };
 293
 294         sdhci@12540000 {
 295                 compatible = "samsung,exynos4210-sdhci";
 296                 reg = <0x12540000 0x100>;
 297                 interrupts = <0 76 0>;
 298                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 299                 clock-names = "hsmmc", "mmc_busclk.2";
 300                 status = "disabled";
 301         };
 302
 303         exynos_usbphy: exynos-usbphy@125B0000 {
 304                 compatible = "samsung,exynos4210-usb2-phy";
 305                 reg = <0x125B0000 0x100>;
 306                 samsung,pmureg-phandle = <&pmu_system_controller>;
 307                 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
 308                 clock-names = "phy", "ref";
 309                 #phy-cells = <1>;
 310                 status = "disabled";
 311         };
 312
 313         hsotg@12480000 {
 314                 compatible = "samsung,s3c6400-hsotg";
 315                 reg = <0x12480000 0x20000>;
 316                 interrupts = <0 71 0>;
 317                 clocks = <&clock CLK_USB_DEVICE>;
 318                 clock-names = "otg";
 319                 phys = <&exynos_usbphy 0>;
 320                 phy-names = "usb2-phy";
 321                 status = "disabled";
 322         };
 323
 324         ehci@12580000 {
 325                 compatible = "samsung,exynos4210-ehci";
 326                 reg = <0x12580000 0x100>;
 327                 interrupts = <0 70 0>;
 328                 clocks = <&clock CLK_USB_HOST>;
 329                 clock-names = "usbhost";
 330                 status = "disabled";
 331                 #address-cells = <1>;
 332                 #size-cells = <0>;
 333                 port@0 {
 334                     reg = <0>;
 335                     phys = <&exynos_usbphy 1>;
 336                     status = "disabled";
 337                 };
 338                 port@1 {
 339                     reg = <1>;
 340                     phys = <&exynos_usbphy 2>;
 341                     status = "disabled";
 342                 };
 343                 port@2 {
 344                     reg = <2>;
 345                     phys = <&exynos_usbphy 3>;
 346                     status = "disabled";
 347                 };
 348         };
 349
 350         ohci@12590000 {
 351                 compatible = "samsung,exynos4210-ohci";
 352                 reg = <0x12590000 0x100>;
 353                 interrupts = <0 70 0>;
 354                 clocks = <&clock CLK_USB_HOST>;
 355                 clock-names = "usbhost";
 356                 status = "disabled";
 357                 #address-cells = <1>;
 358                 #size-cells = <0>;
 359                 port@0 {
 360                     reg = <0>;
 361                     phys = <&exynos_usbphy 1>;
 362                     status = "disabled";
 363                 };
 364         };
 365
 366         i2s1: i2s@13960000 {
 367                 compatible = "samsung,s5pv210-i2s";
 368                 reg = <0x13960000 0x100>;
 369                 clocks = <&clock CLK_I2S1>;
 370                 clock-names = "iis";
 371                 dmas = <&pdma1 12>, <&pdma1 11>;
 372                 dma-names = "tx", "rx";
 373                 status = "disabled";
 374         };
 375
 376         i2s2: i2s@13970000 {
 377                 compatible = "samsung,s5pv210-i2s";
 378                 reg = <0x13970000 0x100>;
 379                 clocks = <&clock CLK_I2S2>;
 380                 clock-names = "iis";
 381                 dmas = <&pdma0 14>, <&pdma0 13>;
 382                 dma-names = "tx", "rx";
 383                 status = "disabled";
 384         };
 385
 386         mfc: codec@13400000 {
 387                 compatible = "samsung,mfc-v5";
 388                 reg = <0x13400000 0x10000>;
 389                 interrupts = <0 94 0>;
 390                 samsung,power-domain = <&pd_mfc>;
 391                 clocks = <&clock CLK_MFC>;
 392                 clock-names = "mfc";
 393                 status = "disabled";
 394         };
 395
 396         serial@13800000 {
 397                 compatible = "samsung,exynos4210-uart";
 398                 reg = <0x13800000 0x100>;
 399                 interrupts = <0 52 0>;
 400                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 401                 clock-names = "uart", "clk_uart_baud0";
 402                 status = "disabled";
 403         };
 404
 405         serial@13810000 {
 406                 compatible = "samsung,exynos4210-uart";
 407                 reg = <0x13810000 0x100>;
 408                 interrupts = <0 53 0>;
 409                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 410                 clock-names = "uart", "clk_uart_baud0";
 411                 status = "disabled";
 412         };
 413
 414         serial@13820000 {
 415                 compatible = "samsung,exynos4210-uart";
 416                 reg = <0x13820000 0x100>;
 417                 interrupts = <0 54 0>;
 418                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 419                 clock-names = "uart", "clk_uart_baud0";
 420                 status = "disabled";
 421         };
 422
 423         serial@13830000 {
 424                 compatible = "samsung,exynos4210-uart";
 425                 reg = <0x13830000 0x100>;
 426                 interrupts = <0 55 0>;
 427                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 428                 clock-names = "uart", "clk_uart_baud0";
 429                 status = "disabled";
 430         };
 431
 432         i2c_0: i2c@13860000 {
 433                 #address-cells = <1>;
 434                 #size-cells = <0>;
 435                 compatible = "samsung,s3c2440-i2c";
 436                 reg = <0x13860000 0x100>;
 437                 interrupts = <0 58 0>;
 438                 clocks = <&clock CLK_I2C0>;
 439                 clock-names = "i2c";
 440                 pinctrl-names = "default";
 441                 pinctrl-0 = <&i2c0_bus>;
 442                 status = "disabled";
 443         };
 444
 445         i2c_1: i2c@13870000 {
 446                 #address-cells = <1>;
 447                 #size-cells = <0>;
 448                 compatible = "samsung,s3c2440-i2c";
 449                 reg = <0x13870000 0x100>;
 450                 interrupts = <0 59 0>;
 451                 clocks = <&clock CLK_I2C1>;
 452                 clock-names = "i2c";
 453                 pinctrl-names = "default";
 454                 pinctrl-0 = <&i2c1_bus>;
 455                 status = "disabled";
 456         };
 457
 458         i2c_2: i2c@13880000 {
 459                 #address-cells = <1>;
 460                 #size-cells = <0>;
 461                 compatible = "samsung,s3c2440-i2c";
 462                 reg = <0x13880000 0x100>;
 463                 interrupts = <0 60 0>;
 464                 clocks = <&clock CLK_I2C2>;
 465                 clock-names = "i2c";
 466                 pinctrl-names = "default";
 467                 pinctrl-0 = <&i2c2_bus>;
 468                 status = "disabled";
 469         };
 470
 471         i2c_3: i2c@13890000 {
 472                 #address-cells = <1>;
 473                 #size-cells = <0>;
 474                 compatible = "samsung,s3c2440-i2c";
 475                 reg = <0x13890000 0x100>;
 476                 interrupts = <0 61 0>;
 477                 clocks = <&clock CLK_I2C3>;
 478                 clock-names = "i2c";
 479                 pinctrl-names = "default";
 480                 pinctrl-0 = <&i2c3_bus>;
 481                 status = "disabled";
 482         };
 483
 484         i2c_4: i2c@138A0000 {
 485                 #address-cells = <1>;
 486                 #size-cells = <0>;
 487                 compatible = "samsung,s3c2440-i2c";
 488                 reg = <0x138A0000 0x100>;
 489                 interrupts = <0 62 0>;
 490                 clocks = <&clock CLK_I2C4>;
 491                 clock-names = "i2c";
 492                 pinctrl-names = "default";
 493                 pinctrl-0 = <&i2c4_bus>;
 494                 status = "disabled";
 495         };
 496
 497         i2c_5: i2c@138B0000 {
 498                 #address-cells = <1>;
 499                 #size-cells = <0>;
 500                 compatible = "samsung,s3c2440-i2c";
 501                 reg = <0x138B0000 0x100>;
 502                 interrupts = <0 63 0>;
 503                 clocks = <&clock CLK_I2C5>;
 504                 clock-names = "i2c";
 505                 pinctrl-names = "default";
 506                 pinctrl-0 = <&i2c5_bus>;
 507                 status = "disabled";
 508         };
 509
 510         i2c_6: i2c@138C0000 {
 511                 #address-cells = <1>;
 512                 #size-cells = <0>;
 513                 compatible = "samsung,s3c2440-i2c";
 514                 reg = <0x138C0000 0x100>;
 515                 interrupts = <0 64 0>;
 516                 clocks = <&clock CLK_I2C6>;
 517                 clock-names = "i2c";
 518                 pinctrl-names = "default";
 519                 pinctrl-0 = <&i2c6_bus>;
 520                 status = "disabled";
 521         };
 522
 523         i2c_7: i2c@138D0000 {
 524                 #address-cells = <1>;
 525                 #size-cells = <0>;
 526                 compatible = "samsung,s3c2440-i2c";
 527                 reg = <0x138D0000 0x100>;
 528                 interrupts = <0 65 0>;
 529                 clocks = <&clock CLK_I2C7>;
 530                 clock-names = "i2c";
 531                 pinctrl-names = "default";
 532                 pinctrl-0 = <&i2c7_bus>;
 533                 status = "disabled";
 534         };
 535
 536         spi_0: spi@13920000 {
 537                 compatible = "samsung,exynos4210-spi";
 538                 reg = <0x13920000 0x100>;
 539                 interrupts = <0 66 0>;
 540                 dmas = <&pdma0 7>, <&pdma0 6>;
 541                 dma-names = "tx", "rx";
 542                 #address-cells = <1>;
 543                 #size-cells = <0>;
 544                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 545                 clock-names = "spi", "spi_busclk0";
 546                 pinctrl-names = "default";
 547                 pinctrl-0 = <&spi0_bus>;
 548                 status = "disabled";
 549         };
 550
 551         spi_1: spi@13930000 {
 552                 compatible = "samsung,exynos4210-spi";
 553                 reg = <0x13930000 0x100>;
 554                 interrupts = <0 67 0>;
 555                 dmas = <&pdma1 7>, <&pdma1 6>;
 556                 dma-names = "tx", "rx";
 557                 #address-cells = <1>;
 558                 #size-cells = <0>;
 559                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 560                 clock-names = "spi", "spi_busclk0";
 561                 pinctrl-names = "default";
 562                 pinctrl-0 = <&spi1_bus>;
 563                 status = "disabled";
 564         };
 565
 566         spi_2: spi@13940000 {
 567                 compatible = "samsung,exynos4210-spi";
 568                 reg = <0x13940000 0x100>;
 569                 interrupts = <0 68 0>;
 570                 dmas = <&pdma0 9>, <&pdma0 8>;
 571                 dma-names = "tx", "rx";
 572                 #address-cells = <1>;
 573                 #size-cells = <0>;
 574                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 575                 clock-names = "spi", "spi_busclk0";
 576                 pinctrl-names = "default";
 577                 pinctrl-0 = <&spi2_bus>;
 578                 status = "disabled";
 579         };
 580
 581         pwm@139D0000 {
 582                 compatible = "samsung,exynos4210-pwm";
 583                 reg = <0x139D0000 0x1000>;
 584                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 585                 clocks = <&clock CLK_PWM>;
 586                 clock-names = "timers";
 587                 #pwm-cells = <2>;
 588                 status = "disabled";
 589         };
 590
 591         amba {
 592                 #address-cells = <1>;
 593                 #size-cells = <1>;
 594                 compatible = "arm,amba-bus";
 595                 interrupt-parent = <&gic>;
 596                 ranges;
 597
 598                 pdma0: pdma@12680000 {
 599                         compatible = "arm,pl330", "arm,primecell";
 600                         reg = <0x12680000 0x1000>;
 601                         interrupts = <0 35 0>;
 602                         clocks = <&clock CLK_PDMA0>;
 603                         clock-names = "apb_pclk";
 604                         #dma-cells = <1>;
 605                         #dma-channels = <8>;
 606                         #dma-requests = <32>;
 607                 };
 608
 609                 pdma1: pdma@12690000 {
 610                         compatible = "arm,pl330", "arm,primecell";
 611                         reg = <0x12690000 0x1000>;
 612                         interrupts = <0 36 0>;
 613                         clocks = <&clock CLK_PDMA1>;
 614                         clock-names = "apb_pclk";
 615                         #dma-cells = <1>;
 616                         #dma-channels = <8>;
 617                         #dma-requests = <32>;
 618                 };
 619
 620                 mdma1: mdma@12850000 {
 621                         compatible = "arm,pl330", "arm,primecell";
 622                         reg = <0x12850000 0x1000>;
 623                         interrupts = <0 34 0>;
 624                         clocks = <&clock CLK_MDMA>;
 625                         clock-names = "apb_pclk";
 626                         #dma-cells = <1>;
 627                         #dma-channels = <8>;
 628                         #dma-requests = <1>;
 629                 };
 630         };
 631
 632         fimd: fimd@11c00000 {
 633                 compatible = "samsung,exynos4210-fimd";
 634                 interrupt-parent = <&combiner>;
 635                 reg = <0x11c00000 0x20000>;
 636                 interrupt-names = "fifo", "vsync", "lcd_sys";
 637                 interrupts = <11 0>, <11 1>, <11 2>;
 638                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 639                 clock-names = "sclk_fimd", "fimd";
 640                 samsung,power-domain = <&pd_lcd0>;
 641                 status = "disabled";
 642         };
 643 };