arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include <dt-bindings/clock/exynos-audss-clk.h>
  24 #include "skeleton.dtsi"
  25
  26 / {
  27         interrupt-parent = <&gic>;
  28
  29         aliases {
  30                 spi0 = &spi_0;
  31                 spi1 = &spi_1;
  32                 spi2 = &spi_2;
  33                 i2c0 = &i2c_0;
  34                 i2c1 = &i2c_1;
  35                 i2c2 = &i2c_2;
  36                 i2c3 = &i2c_3;
  37                 i2c4 = &i2c_4;
  38                 i2c5 = &i2c_5;
  39                 i2c6 = &i2c_6;
  40                 i2c7 = &i2c_7;
  41                 csis0 = &csis_0;
  42                 csis1 = &csis_1;
  43                 fimc0 = &fimc_0;
  44                 fimc1 = &fimc_1;
  45                 fimc2 = &fimc_2;
  46                 fimc3 = &fimc_3;
  47                 serial0 = &serial_0;
  48                 serial1 = &serial_1;
  49                 serial2 = &serial_2;
  50                 serial3 = &serial_3;
  51         };
  52
  53         clock_audss: clock-controller@03810000 {
  54                 compatible = "samsung,exynos4210-audss-clock";
  55                 reg = <0x03810000 0x0C>;
  56                 #clock-cells = <1>;
  57         };
  58
  59         i2s0: i2s@03830000 {
  60                 compatible = "samsung,s5pv210-i2s";
  61                 reg = <0x03830000 0x100>;
  62                 clocks = <&clock_audss EXYNOS_I2S_BUS>;
  63                 clock-names = "iis";
  64                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
  65                 dma-names = "tx", "rx", "tx-sec";
  66                 samsung,idma-addr = <0x03000000>;
  67                 status = "disabled";
  68         };
  69
  70         chipid@10000000 {
  71                 compatible = "samsung,exynos4210-chipid";
  72                 reg = <0x10000000 0x100>;
  73         };
  74
  75         mipi_phy: video-phy@10020710 {
  76                 compatible = "samsung,s5pv210-mipi-video-phy";
  77                 reg = <0x10020710 8>;
  78                 #phy-cells = <1>;
  79         };
  80
  81         pd_mfc: mfc-power-domain@10023C40 {
  82                 compatible = "samsung,exynos4210-pd";
  83                 reg = <0x10023C40 0x20>;
  84         };
  85
  86         pd_g3d: g3d-power-domain@10023C60 {
  87                 compatible = "samsung,exynos4210-pd";
  88                 reg = <0x10023C60 0x20>;
  89         };
  90
  91         pd_lcd0: lcd0-power-domain@10023C80 {
  92                 compatible = "samsung,exynos4210-pd";
  93                 reg = <0x10023C80 0x20>;
  94         };
  95
  96         pd_tv: tv-power-domain@10023C20 {
  97                 compatible = "samsung,exynos4210-pd";
  98                 reg = <0x10023C20 0x20>;
  99         };
 100
 101         pd_cam: cam-power-domain@10023C00 {
 102                 compatible = "samsung,exynos4210-pd";
 103                 reg = <0x10023C00 0x20>;
 104         };
 105
 106         pd_gps: gps-power-domain@10023CE0 {
 107                 compatible = "samsung,exynos4210-pd";
 108                 reg = <0x10023CE0 0x20>;
 109         };
 110
 111         pd_gps_alive: gps-alive-power-domain@10023D00 {
 112                 compatible = "samsung,exynos4210-pd";
 113                 reg = <0x10023D00 0x20>;
 114         };
 115
 116         gic: interrupt-controller@10490000 {
 117                 compatible = "arm,cortex-a9-gic";
 118                 #interrupt-cells = <3>;
 119                 interrupt-controller;
 120                 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
 121         };
 122
 123         combiner: interrupt-controller@10440000 {
 124                 compatible = "samsung,exynos4210-combiner";
 125                 #interrupt-cells = <2>;
 126                 interrupt-controller;
 127                 reg = <0x10440000 0x1000>;
 128         };
 129
 130         sys_reg: syscon@10010000 {
 131                 compatible = "samsung,exynos4-sysreg", "syscon";
 132                 reg = <0x10010000 0x400>;
 133         };
 134
 135         pmu_system_controller: system-controller@10020000 {
 136                 compatible = "samsung,exynos4210-pmu", "syscon";
 137                 reg = <0x10020000 0x4000>;
 138         };
 139
 140         dsi_0: dsi@11C80000 {
 141                 compatible = "samsung,exynos4210-mipi-dsi";
 142                 reg = <0x11C80000 0x10000>;
 143                 interrupts = <0 79 0>;
 144                 samsung,power-domain = <&pd_lcd0>;
 145                 phys = <&mipi_phy 1>;
 146                 phy-names = "dsim";
 147                 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
 148                 clock-names = "bus_clk", "pll_clk";
 149                 status = "disabled";
 150                 #address-cells = <1>;
 151                 #size-cells = <0>;
 152         };
 153
 154         camera {
 155                 compatible = "samsung,fimc", "simple-bus";
 156                 status = "disabled";
 157                 #address-cells = <1>;
 158                 #size-cells = <1>;
 159                 #clock-cells = <1>;
 160                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 161                 ranges;
 162
 163                 fimc_0: fimc@11800000 {
 164                         compatible = "samsung,exynos4210-fimc";
 165                         reg = <0x11800000 0x1000>;
 166                         interrupts = <0 84 0>;
 167                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 168                         clock-names = "fimc", "sclk_fimc";
 169                         samsung,power-domain = <&pd_cam>;
 170                         samsung,sysreg = <&sys_reg>;
 171                         status = "disabled";
 172                 };
 173
 174                 fimc_1: fimc@11810000 {
 175                         compatible = "samsung,exynos4210-fimc";
 176                         reg = <0x11810000 0x1000>;
 177                         interrupts = <0 85 0>;
 178                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 179                         clock-names = "fimc", "sclk_fimc";
 180                         samsung,power-domain = <&pd_cam>;
 181                         samsung,sysreg = <&sys_reg>;
 182                         status = "disabled";
 183                 };
 184
 185                 fimc_2: fimc@11820000 {
 186                         compatible = "samsung,exynos4210-fimc";
 187                         reg = <0x11820000 0x1000>;
 188                         interrupts = <0 86 0>;
 189                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 190                         clock-names = "fimc", "sclk_fimc";
 191                         samsung,power-domain = <&pd_cam>;
 192                         samsung,sysreg = <&sys_reg>;
 193                         status = "disabled";
 194                 };
 195
 196                 fimc_3: fimc@11830000 {
 197                         compatible = "samsung,exynos4210-fimc";
 198                         reg = <0x11830000 0x1000>;
 199                         interrupts = <0 87 0>;
 200                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 201                         clock-names = "fimc", "sclk_fimc";
 202                         samsung,power-domain = <&pd_cam>;
 203                         samsung,sysreg = <&sys_reg>;
 204                         status = "disabled";
 205                 };
 206
 207                 csis_0: csis@11880000 {
 208                         compatible = "samsung,exynos4210-csis";
 209                         reg = <0x11880000 0x4000>;
 210                         interrupts = <0 78 0>;
 211                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 212                         clock-names = "csis", "sclk_csis";
 213                         bus-width = <4>;
 214                         samsung,power-domain = <&pd_cam>;
 215                         phys = <&mipi_phy 0>;
 216                         phy-names = "csis";
 217                         status = "disabled";
 218                         #address-cells = <1>;
 219                         #size-cells = <0>;
 220                 };
 221
 222                 csis_1: csis@11890000 {
 223                         compatible = "samsung,exynos4210-csis";
 224                         reg = <0x11890000 0x4000>;
 225                         interrupts = <0 80 0>;
 226                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 227                         clock-names = "csis", "sclk_csis";
 228                         bus-width = <2>;
 229                         samsung,power-domain = <&pd_cam>;
 230                         phys = <&mipi_phy 2>;
 231                         phy-names = "csis";
 232                         status = "disabled";
 233                         #address-cells = <1>;
 234                         #size-cells = <0>;
 235                 };
 236         };
 237
 238         watchdog@10060000 {
 239                 compatible = "samsung,s3c2410-wdt";
 240                 reg = <0x10060000 0x100>;
 241                 interrupts = <0 43 0>;
 242                 clocks = <&clock CLK_WDT>;
 243                 clock-names = "watchdog";
 244                 status = "disabled";
 245         };
 246
 247         rtc@10070000 {
 248                 compatible = "samsung,s3c6410-rtc";
 249                 reg = <0x10070000 0x100>;
 250                 interrupts = <0 44 0>, <0 45 0>;
 251                 clocks = <&clock CLK_RTC>;
 252                 clock-names = "rtc";
 253                 status = "disabled";
 254         };
 255
 256         keypad@100A0000 {
 257                 compatible = "samsung,s5pv210-keypad";
 258                 reg = <0x100A0000 0x100>;
 259                 interrupts = <0 109 0>;
 260                 clocks = <&clock CLK_KEYIF>;
 261                 clock-names = "keypad";
 262                 status = "disabled";
 263         };
 264
 265         sdhci@12510000 {
 266                 compatible = "samsung,exynos4210-sdhci";
 267                 reg = <0x12510000 0x100>;
 268                 interrupts = <0 73 0>;
 269                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 270                 clock-names = "hsmmc", "mmc_busclk.2";
 271                 status = "disabled";
 272         };
 273
 274         sdhci@12520000 {
 275                 compatible = "samsung,exynos4210-sdhci";
 276                 reg = <0x12520000 0x100>;
 277                 interrupts = <0 74 0>;
 278                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 279                 clock-names = "hsmmc", "mmc_busclk.2";
 280                 status = "disabled";
 281         };
 282
 283         sdhci@12530000 {
 284                 compatible = "samsung,exynos4210-sdhci";
 285                 reg = <0x12530000 0x100>;
 286                 interrupts = <0 75 0>;
 287                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 288                 clock-names = "hsmmc", "mmc_busclk.2";
 289                 status = "disabled";
 290         };
 291
 292         sdhci@12540000 {
 293                 compatible = "samsung,exynos4210-sdhci";
 294                 reg = <0x12540000 0x100>;
 295                 interrupts = <0 76 0>;
 296                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 297                 clock-names = "hsmmc", "mmc_busclk.2";
 298                 status = "disabled";
 299         };
 300
 301         exynos_usbphy: exynos-usbphy@125B0000 {
 302                 compatible = "samsung,exynos4210-usb2-phy";
 303                 reg = <0x125B0000 0x100>;
 304                 samsung,pmureg-phandle = <&pmu_system_controller>;
 305                 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
 306                 clock-names = "phy", "ref";
 307                 #phy-cells = <1>;
 308                 status = "disabled";
 309         };
 310
 311         hsotg@12480000 {
 312                 compatible = "samsung,s3c6400-hsotg";
 313                 reg = <0x12480000 0x20000>;
 314                 interrupts = <0 71 0>;
 315                 clocks = <&clock CLK_USB_DEVICE>;
 316                 clock-names = "otg";
 317                 phys = <&exynos_usbphy 0>;
 318                 phy-names = "usb2-phy";
 319                 status = "disabled";
 320         };
 321
 322         ehci@12580000 {
 323                 compatible = "samsung,exynos4210-ehci";
 324                 reg = <0x12580000 0x100>;
 325                 interrupts = <0 70 0>;
 326                 clocks = <&clock CLK_USB_HOST>;
 327                 clock-names = "usbhost";
 328                 status = "disabled";
 329         };
 330
 331         ohci@12590000 {
 332                 compatible = "samsung,exynos4210-ohci";
 333                 reg = <0x12590000 0x100>;
 334                 interrupts = <0 70 0>;
 335                 clocks = <&clock CLK_USB_HOST>;
 336                 clock-names = "usbhost";
 337                 status = "disabled";
 338         };
 339
 340         i2s1: i2s@13960000 {
 341                 compatible = "samsung,s5pv210-i2s";
 342                 reg = <0x13960000 0x100>;
 343                 clocks = <&clock CLK_I2S1>;
 344                 clock-names = "iis";
 345                 dmas = <&pdma1 12>, <&pdma1 11>;
 346                 dma-names = "tx", "rx";
 347                 status = "disabled";
 348         };
 349
 350         i2s2: i2s@13970000 {
 351                 compatible = "samsung,s5pv210-i2s";
 352                 reg = <0x13970000 0x100>;
 353                 clocks = <&clock CLK_I2S2>;
 354                 clock-names = "iis";
 355                 dmas = <&pdma0 14>, <&pdma0 13>;
 356                 dma-names = "tx", "rx";
 357                 status = "disabled";
 358         };
 359
 360         mfc: codec@13400000 {
 361                 compatible = "samsung,mfc-v5";
 362                 reg = <0x13400000 0x10000>;
 363                 interrupts = <0 94 0>;
 364                 samsung,power-domain = <&pd_mfc>;
 365                 clocks = <&clock CLK_MFC>;
 366                 clock-names = "mfc";
 367                 status = "disabled";
 368         };
 369
 370         serial_0: serial@13800000 {
 371                 compatible = "samsung,exynos4210-uart";
 372                 reg = <0x13800000 0x100>;
 373                 interrupts = <0 52 0>;
 374                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 375                 clock-names = "uart", "clk_uart_baud0";
 376                 status = "disabled";
 377         };
 378
 379         serial_1: serial@13810000 {
 380                 compatible = "samsung,exynos4210-uart";
 381                 reg = <0x13810000 0x100>;
 382                 interrupts = <0 53 0>;
 383                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 384                 clock-names = "uart", "clk_uart_baud0";
 385                 status = "disabled";
 386         };
 387
 388         serial_2: serial@13820000 {
 389                 compatible = "samsung,exynos4210-uart";
 390                 reg = <0x13820000 0x100>;
 391                 interrupts = <0 54 0>;
 392                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 393                 clock-names = "uart", "clk_uart_baud0";
 394                 status = "disabled";
 395         };
 396
 397         serial_3: serial@13830000 {
 398                 compatible = "samsung,exynos4210-uart";
 399                 reg = <0x13830000 0x100>;
 400                 interrupts = <0 55 0>;
 401                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 402                 clock-names = "uart", "clk_uart_baud0";
 403                 status = "disabled";
 404         };
 405
 406         i2c_0: i2c@13860000 {
 407                 #address-cells = <1>;
 408                 #size-cells = <0>;
 409                 compatible = "samsung,s3c2440-i2c";
 410                 reg = <0x13860000 0x100>;
 411                 interrupts = <0 58 0>;
 412                 clocks = <&clock CLK_I2C0>;
 413                 clock-names = "i2c";
 414                 pinctrl-names = "default";
 415                 pinctrl-0 = <&i2c0_bus>;
 416                 status = "disabled";
 417         };
 418
 419         i2c_1: i2c@13870000 {
 420                 #address-cells = <1>;
 421                 #size-cells = <0>;
 422                 compatible = "samsung,s3c2440-i2c";
 423                 reg = <0x13870000 0x100>;
 424                 interrupts = <0 59 0>;
 425                 clocks = <&clock CLK_I2C1>;
 426                 clock-names = "i2c";
 427                 pinctrl-names = "default";
 428                 pinctrl-0 = <&i2c1_bus>;
 429                 status = "disabled";
 430         };
 431
 432         i2c_2: i2c@13880000 {
 433                 #address-cells = <1>;
 434                 #size-cells = <0>;
 435                 compatible = "samsung,s3c2440-i2c";
 436                 reg = <0x13880000 0x100>;
 437                 interrupts = <0 60 0>;
 438                 clocks = <&clock CLK_I2C2>;
 439                 clock-names = "i2c";
 440                 pinctrl-names = "default";
 441                 pinctrl-0 = <&i2c2_bus>;
 442                 status = "disabled";
 443         };
 444
 445         i2c_3: i2c@13890000 {
 446                 #address-cells = <1>;
 447                 #size-cells = <0>;
 448                 compatible = "samsung,s3c2440-i2c";
 449                 reg = <0x13890000 0x100>;
 450                 interrupts = <0 61 0>;
 451                 clocks = <&clock CLK_I2C3>;
 452                 clock-names = "i2c";
 453                 pinctrl-names = "default";
 454                 pinctrl-0 = <&i2c3_bus>;
 455                 status = "disabled";
 456         };
 457
 458         i2c_4: i2c@138A0000 {
 459                 #address-cells = <1>;
 460                 #size-cells = <0>;
 461                 compatible = "samsung,s3c2440-i2c";
 462                 reg = <0x138A0000 0x100>;
 463                 interrupts = <0 62 0>;
 464                 clocks = <&clock CLK_I2C4>;
 465                 clock-names = "i2c";
 466                 pinctrl-names = "default";
 467                 pinctrl-0 = <&i2c4_bus>;
 468                 status = "disabled";
 469         };
 470
 471         i2c_5: i2c@138B0000 {
 472                 #address-cells = <1>;
 473                 #size-cells = <0>;
 474                 compatible = "samsung,s3c2440-i2c";
 475                 reg = <0x138B0000 0x100>;
 476                 interrupts = <0 63 0>;
 477                 clocks = <&clock CLK_I2C5>;
 478                 clock-names = "i2c";
 479                 pinctrl-names = "default";
 480                 pinctrl-0 = <&i2c5_bus>;
 481                 status = "disabled";
 482         };
 483
 484         i2c_6: i2c@138C0000 {
 485                 #address-cells = <1>;
 486                 #size-cells = <0>;
 487                 compatible = "samsung,s3c2440-i2c";
 488                 reg = <0x138C0000 0x100>;
 489                 interrupts = <0 64 0>;
 490                 clocks = <&clock CLK_I2C6>;
 491                 clock-names = "i2c";
 492                 pinctrl-names = "default";
 493                 pinctrl-0 = <&i2c6_bus>;
 494                 status = "disabled";
 495         };
 496
 497         i2c_7: i2c@138D0000 {
 498                 #address-cells = <1>;
 499                 #size-cells = <0>;
 500                 compatible = "samsung,s3c2440-i2c";
 501                 reg = <0x138D0000 0x100>;
 502                 interrupts = <0 65 0>;
 503                 clocks = <&clock CLK_I2C7>;
 504                 clock-names = "i2c";
 505                 pinctrl-names = "default";
 506                 pinctrl-0 = <&i2c7_bus>;
 507                 status = "disabled";
 508         };
 509
 510         spi_0: spi@13920000 {
 511                 compatible = "samsung,exynos4210-spi";
 512                 reg = <0x13920000 0x100>;
 513                 interrupts = <0 66 0>;
 514                 dmas = <&pdma0 7>, <&pdma0 6>;
 515                 dma-names = "tx", "rx";
 516                 #address-cells = <1>;
 517                 #size-cells = <0>;
 518                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 519                 clock-names = "spi", "spi_busclk0";
 520                 pinctrl-names = "default";
 521                 pinctrl-0 = <&spi0_bus>;
 522                 status = "disabled";
 523         };
 524
 525         spi_1: spi@13930000 {
 526                 compatible = "samsung,exynos4210-spi";
 527                 reg = <0x13930000 0x100>;
 528                 interrupts = <0 67 0>;
 529                 dmas = <&pdma1 7>, <&pdma1 6>;
 530                 dma-names = "tx", "rx";
 531                 #address-cells = <1>;
 532                 #size-cells = <0>;
 533                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 534                 clock-names = "spi", "spi_busclk0";
 535                 pinctrl-names = "default";
 536                 pinctrl-0 = <&spi1_bus>;
 537                 status = "disabled";
 538         };
 539
 540         spi_2: spi@13940000 {
 541                 compatible = "samsung,exynos4210-spi";
 542                 reg = <0x13940000 0x100>;
 543                 interrupts = <0 68 0>;
 544                 dmas = <&pdma0 9>, <&pdma0 8>;
 545                 dma-names = "tx", "rx";
 546                 #address-cells = <1>;
 547                 #size-cells = <0>;
 548                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 549                 clock-names = "spi", "spi_busclk0";
 550                 pinctrl-names = "default";
 551                 pinctrl-0 = <&spi2_bus>;
 552                 status = "disabled";
 553         };
 554
 555         pwm@139D0000 {
 556                 compatible = "samsung,exynos4210-pwm";
 557                 reg = <0x139D0000 0x1000>;
 558                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 559                 clocks = <&clock CLK_PWM>;
 560                 clock-names = "timers";
 561                 #pwm-cells = <3>;
 562                 status = "disabled";
 563         };
 564
 565         amba {
 566                 #address-cells = <1>;
 567                 #size-cells = <1>;
 568                 compatible = "arm,amba-bus";
 569                 interrupt-parent = <&gic>;
 570                 ranges;
 571
 572                 pdma0: pdma@12680000 {
 573                         compatible = "arm,pl330", "arm,primecell";
 574                         reg = <0x12680000 0x1000>;
 575                         interrupts = <0 35 0>;
 576                         clocks = <&clock CLK_PDMA0>;
 577                         clock-names = "apb_pclk";
 578                         #dma-cells = <1>;
 579                         #dma-channels = <8>;
 580                         #dma-requests = <32>;
 581                 };
 582
 583                 pdma1: pdma@12690000 {
 584                         compatible = "arm,pl330", "arm,primecell";
 585                         reg = <0x12690000 0x1000>;
 586                         interrupts = <0 36 0>;
 587                         clocks = <&clock CLK_PDMA1>;
 588                         clock-names = "apb_pclk";
 589                         #dma-cells = <1>;
 590                         #dma-channels = <8>;
 591                         #dma-requests = <32>;
 592                 };
 593
 594                 mdma1: mdma@12850000 {
 595                         compatible = "arm,pl330", "arm,primecell";
 596                         reg = <0x12850000 0x1000>;
 597                         interrupts = <0 34 0>;
 598                         clocks = <&clock CLK_MDMA>;
 599                         clock-names = "apb_pclk";
 600                         #dma-cells = <1>;
 601                         #dma-channels = <8>;
 602                         #dma-requests = <1>;
 603                 };
 604         };
 605
 606         fimd: fimd@11c00000 {
 607                 compatible = "samsung,exynos4210-fimd";
 608                 interrupt-parent = <&combiner>;
 609                 reg = <0x11c00000 0x20000>;
 610                 interrupt-names = "fifo", "vsync", "lcd_sys";
 611                 interrupts = <11 0>, <11 1>, <11 2>;
 612                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 613                 clock-names = "sclk_fimd", "fimd";
 614                 samsung,power-domain = <&pd_lcd0>;
 615                 status = "disabled";
 616         };
 617 };