arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &mmc_0;
  37                 mshc1 = &mmc_1;
  38                 mshc2 = &mmc_2;
  39                 mshc3 = &mmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                         clock-frequency = <1700000000>;
  64                 };
  65                 cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1700000000>;
  70                 };
  71         };
  72
  73         pd_gsc: gsc-power-domain@10044000 {
  74                 compatible = "samsung,exynos4210-pd";
  75                 reg = <0x10044000 0x20>;
  76         };
  77
  78         pd_mfc: mfc-power-domain@10044040 {
  79                 compatible = "samsung,exynos4210-pd";
  80                 reg = <0x10044040 0x20>;
  81         };
  82
  83         clock: clock-controller@10010000 {
  84                 compatible = "samsung,exynos5250-clock";
  85                 reg = <0x10010000 0x30000>;
  86                 #clock-cells = <1>;
  87         };
  88
  89         clock_audss: audss-clock-controller@3810000 {
  90                 compatible = "samsung,exynos5250-audss-clock";
  91                 reg = <0x03810000 0x0C>;
  92                 #clock-cells = <1>;
  93                 clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>;
  94                 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
  95         };
  96
  97         timer {
  98                 compatible = "arm,armv7-timer";
  99                 interrupts = <1 13 0xf08>,
 100                              <1 14 0xf08>,
 101                              <1 11 0xf08>,
 102                              <1 10 0xf08>;
 103                 /* Unfortunately we need this since some versions of U-Boot
 104                  * on Exynos don't set the CNTFRQ register, so we need the
 105                  * value from DT.
 106                  */
 107                 clock-frequency = <24000000>;
 108         };
 109
 110         mct@101C0000 {
 111                 compatible = "samsung,exynos4210-mct";
 112                 reg = <0x101C0000 0x800>;
 113                 interrupt-controller;
 114                 #interrups-cells = <2>;
 115                 interrupt-parent = <&mct_map>;
 116                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 117                              <4 0>, <5 0>;
 118                 clocks = <&clock 1>, <&clock 335>;
 119                 clock-names = "fin_pll", "mct";
 120
 121                 mct_map: mct-map {
 122                         #interrupt-cells = <2>;
 123                         #address-cells = <0>;
 124                         #size-cells = <0>;
 125                         interrupt-map = <0x0 0 &combiner 23 3>,
 126                                         <0x1 0 &combiner 23 4>,
 127                                         <0x2 0 &combiner 25 2>,
 128                                         <0x3 0 &combiner 25 3>,
 129                                         <0x4 0 &gic 0 120 0>,
 130                                         <0x5 0 &gic 0 121 0>;
 131                 };
 132         };
 133
 134         pmu {
 135                 compatible = "arm,cortex-a15-pmu";
 136                 interrupt-parent = <&combiner>;
 137                 interrupts = <1 2>, <22 4>;
 138         };
 139
 140         pinctrl_0: pinctrl@11400000 {
 141                 compatible = "samsung,exynos5250-pinctrl";
 142                 reg = <0x11400000 0x1000>;
 143                 interrupts = <0 46 0>;
 144
 145                 wakup_eint: wakeup-interrupt-controller {
 146                         compatible = "samsung,exynos4210-wakeup-eint";
 147                         interrupt-parent = <&gic>;
 148                         interrupts = <0 32 0>;
 149                 };
 150         };
 151
 152         pinctrl_1: pinctrl@13400000 {
 153                 compatible = "samsung,exynos5250-pinctrl";
 154                 reg = <0x13400000 0x1000>;
 155                 interrupts = <0 45 0>;
 156         };
 157
 158         pinctrl_2: pinctrl@10d10000 {
 159                 compatible = "samsung,exynos5250-pinctrl";
 160                 reg = <0x10d10000 0x1000>;
 161                 interrupts = <0 50 0>;
 162         };
 163
 164         pinctrl_3: pinctrl@03860000 {
 165                 compatible = "samsung,exynos5250-pinctrl";
 166                 reg = <0x03860000 0x1000>;
 167                 interrupts = <0 47 0>;
 168         };
 169
 170         pmu_system_controller: system-controller@10040000 {
 171                 compatible = "samsung,exynos5250-pmu", "syscon";
 172                 reg = <0x10040000 0x5000>;
 173         };
 174
 175         watchdog@101D0000 {
 176                 compatible = "samsung,exynos5250-wdt";
 177                 reg = <0x101D0000 0x100>;
 178                 interrupts = <0 42 0>;
 179                 clocks = <&clock 336>;
 180                 clock-names = "watchdog";
 181                 samsung,syscon-phandle = <&pmu_system_controller>;
 182         };
 183
 184         g2d@10850000 {
 185                 compatible = "samsung,exynos5250-g2d";
 186                 reg = <0x10850000 0x1000>;
 187                 interrupts = <0 91 0>;
 188                 clocks = <&clock 345>;
 189                 clock-names = "fimg2d";
 190         };
 191
 192         codec@11000000 {
 193                 compatible = "samsung,mfc-v6";
 194                 reg = <0x11000000 0x10000>;
 195                 interrupts = <0 96 0>;
 196                 samsung,power-domain = <&pd_mfc>;
 197                 clocks = <&clock 266>;
 198                 clock-names = "mfc";
 199         };
 200
 201         rtc@101E0000 {
 202                 clocks = <&clock 337>;
 203                 clock-names = "rtc";
 204                 status = "disabled";
 205         };
 206
 207         tmu@10060000 {
 208                 compatible = "samsung,exynos5250-tmu";
 209                 reg = <0x10060000 0x100>;
 210                 interrupts = <0 65 0>;
 211                 clocks = <&clock 338>;
 212                 clock-names = "tmu_apbif";
 213         };
 214
 215         serial@12C00000 {
 216                 clocks = <&clock 289>, <&clock 146>;
 217                 clock-names = "uart", "clk_uart_baud0";
 218         };
 219
 220         serial@12C10000 {
 221                 clocks = <&clock 290>, <&clock 147>;
 222                 clock-names = "uart", "clk_uart_baud0";
 223         };
 224
 225         serial@12C20000 {
 226                 clocks = <&clock 291>, <&clock 148>;
 227                 clock-names = "uart", "clk_uart_baud0";
 228         };
 229
 230         serial@12C30000 {
 231                 clocks = <&clock 292>, <&clock 149>;
 232                 clock-names = "uart", "clk_uart_baud0";
 233         };
 234
 235         sata@122F0000 {
 236                 compatible = "samsung,exynos5-sata-ahci";
 237                 reg = <0x122F0000 0x1ff>;
 238                 interrupts = <0 115 0>;
 239                 clocks = <&clock 277>, <&clock 143>;
 240                 clock-names = "sata", "sclk_sata";
 241         };
 242
 243         sata-phy@12170000 {
 244                 compatible = "samsung,exynos5-sata-phy";
 245                 reg = <0x12170000 0x1ff>;
 246         };
 247
 248         i2c_0: i2c@12C60000 {
 249                 compatible = "samsung,s3c2440-i2c";
 250                 reg = <0x12C60000 0x100>;
 251                 interrupts = <0 56 0>;
 252                 #address-cells = <1>;
 253                 #size-cells = <0>;
 254                 clocks = <&clock 294>;
 255                 clock-names = "i2c";
 256                 pinctrl-names = "default";
 257                 pinctrl-0 = <&i2c0_bus>;
 258                 status = "disabled";
 259         };
 260
 261         i2c_1: i2c@12C70000 {
 262                 compatible = "samsung,s3c2440-i2c";
 263                 reg = <0x12C70000 0x100>;
 264                 interrupts = <0 57 0>;
 265                 #address-cells = <1>;
 266                 #size-cells = <0>;
 267                 clocks = <&clock 295>;
 268                 clock-names = "i2c";
 269                 pinctrl-names = "default";
 270                 pinctrl-0 = <&i2c1_bus>;
 271                 status = "disabled";
 272         };
 273
 274         i2c_2: i2c@12C80000 {
 275                 compatible = "samsung,s3c2440-i2c";
 276                 reg = <0x12C80000 0x100>;
 277                 interrupts = <0 58 0>;
 278                 #address-cells = <1>;
 279                 #size-cells = <0>;
 280                 clocks = <&clock 296>;
 281                 clock-names = "i2c";
 282                 pinctrl-names = "default";
 283                 pinctrl-0 = <&i2c2_bus>;
 284                 status = "disabled";
 285         };
 286
 287         i2c_3: i2c@12C90000 {
 288                 compatible = "samsung,s3c2440-i2c";
 289                 reg = <0x12C90000 0x100>;
 290                 interrupts = <0 59 0>;
 291                 #address-cells = <1>;
 292                 #size-cells = <0>;
 293                 clocks = <&clock 297>;
 294                 clock-names = "i2c";
 295                 pinctrl-names = "default";
 296                 pinctrl-0 = <&i2c3_bus>;
 297                 status = "disabled";
 298         };
 299
 300         i2c_4: i2c@12CA0000 {
 301                 compatible = "samsung,s3c2440-i2c";
 302                 reg = <0x12CA0000 0x100>;
 303                 interrupts = <0 60 0>;
 304                 #address-cells = <1>;
 305                 #size-cells = <0>;
 306                 clocks = <&clock 298>;
 307                 clock-names = "i2c";
 308                 pinctrl-names = "default";
 309                 pinctrl-0 = <&i2c4_bus>;
 310                 status = "disabled";
 311         };
 312
 313         i2c_5: i2c@12CB0000 {
 314                 compatible = "samsung,s3c2440-i2c";
 315                 reg = <0x12CB0000 0x100>;
 316                 interrupts = <0 61 0>;
 317                 #address-cells = <1>;
 318                 #size-cells = <0>;
 319                 clocks = <&clock 299>;
 320                 clock-names = "i2c";
 321                 pinctrl-names = "default";
 322                 pinctrl-0 = <&i2c5_bus>;
 323                 status = "disabled";
 324         };
 325
 326         i2c_6: i2c@12CC0000 {
 327                 compatible = "samsung,s3c2440-i2c";
 328                 reg = <0x12CC0000 0x100>;
 329                 interrupts = <0 62 0>;
 330                 #address-cells = <1>;
 331                 #size-cells = <0>;
 332                 clocks = <&clock 300>;
 333                 clock-names = "i2c";
 334                 pinctrl-names = "default";
 335                 pinctrl-0 = <&i2c6_bus>;
 336                 status = "disabled";
 337         };
 338
 339         i2c_7: i2c@12CD0000 {
 340                 compatible = "samsung,s3c2440-i2c";
 341                 reg = <0x12CD0000 0x100>;
 342                 interrupts = <0 63 0>;
 343                 #address-cells = <1>;
 344                 #size-cells = <0>;
 345                 clocks = <&clock 301>;
 346                 clock-names = "i2c";
 347                 pinctrl-names = "default";
 348                 pinctrl-0 = <&i2c7_bus>;
 349                 status = "disabled";
 350         };
 351
 352         i2c_8: i2c@12CE0000 {
 353                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 354                 reg = <0x12CE0000 0x1000>;
 355                 interrupts = <0 64 0>;
 356                 #address-cells = <1>;
 357                 #size-cells = <0>;
 358                 clocks = <&clock 302>;
 359                 clock-names = "i2c";
 360                 status = "disabled";
 361         };
 362
 363         i2c@121D0000 {
 364                 compatible = "samsung,exynos5-sata-phy-i2c";
 365                 reg = <0x121D0000 0x100>;
 366                 #address-cells = <1>;
 367                 #size-cells = <0>;
 368                 clocks = <&clock 288>;
 369                 clock-names = "i2c";
 370                 status = "disabled";
 371         };
 372
 373         spi_0: spi@12d20000 {
 374                 compatible = "samsung,exynos4210-spi";
 375                 status = "disabled";
 376                 reg = <0x12d20000 0x100>;
 377                 interrupts = <0 66 0>;
 378                 dmas = <&pdma0 5
 379                         &pdma0 4>;
 380                 dma-names = "tx", "rx";
 381                 #address-cells = <1>;
 382                 #size-cells = <0>;
 383                 clocks = <&clock 304>, <&clock 154>;
 384                 clock-names = "spi", "spi_busclk0";
 385                 pinctrl-names = "default";
 386                 pinctrl-0 = <&spi0_bus>;
 387         };
 388
 389         spi_1: spi@12d30000 {
 390                 compatible = "samsung,exynos4210-spi";
 391                 status = "disabled";
 392                 reg = <0x12d30000 0x100>;
 393                 interrupts = <0 67 0>;
 394                 dmas = <&pdma1 5
 395                         &pdma1 4>;
 396                 dma-names = "tx", "rx";
 397                 #address-cells = <1>;
 398                 #size-cells = <0>;
 399                 clocks = <&clock 305>, <&clock 155>;
 400                 clock-names = "spi", "spi_busclk0";
 401                 pinctrl-names = "default";
 402                 pinctrl-0 = <&spi1_bus>;
 403         };
 404
 405         spi_2: spi@12d40000 {
 406                 compatible = "samsung,exynos4210-spi";
 407                 status = "disabled";
 408                 reg = <0x12d40000 0x100>;
 409                 interrupts = <0 68 0>;
 410                 dmas = <&pdma0 7
 411                         &pdma0 6>;
 412                 dma-names = "tx", "rx";
 413                 #address-cells = <1>;
 414                 #size-cells = <0>;
 415                 clocks = <&clock 306>, <&clock 156>;
 416                 clock-names = "spi", "spi_busclk0";
 417                 pinctrl-names = "default";
 418                 pinctrl-0 = <&spi2_bus>;
 419         };
 420
 421         mmc_0: mmc@12200000 {
 422                 compatible = "samsung,exynos5250-dw-mshc";
 423                 interrupts = <0 75 0>;
 424                 #address-cells = <1>;
 425                 #size-cells = <0>;
 426                 reg = <0x12200000 0x1000>;
 427                 clocks = <&clock 280>, <&clock 139>;
 428                 clock-names = "biu", "ciu";
 429                 fifo-depth = <0x80>;
 430                 status = "disabled";
 431         };
 432
 433         mmc_1: mmc@12210000 {
 434                 compatible = "samsung,exynos5250-dw-mshc";
 435                 interrupts = <0 76 0>;
 436                 #address-cells = <1>;
 437                 #size-cells = <0>;
 438                 reg = <0x12210000 0x1000>;
 439                 clocks = <&clock 281>, <&clock 140>;
 440                 clock-names = "biu", "ciu";
 441                 fifo-depth = <0x80>;
 442                 status = "disabled";
 443         };
 444
 445         mmc_2: mmc@12220000 {
 446                 compatible = "samsung,exynos5250-dw-mshc";
 447                 interrupts = <0 77 0>;
 448                 #address-cells = <1>;
 449                 #size-cells = <0>;
 450                 reg = <0x12220000 0x1000>;
 451                 clocks = <&clock 282>, <&clock 141>;
 452                 clock-names = "biu", "ciu";
 453                 fifo-depth = <0x80>;
 454                 status = "disabled";
 455         };
 456
 457         mmc_3: mmc@12230000 {
 458                 compatible = "samsung,exynos5250-dw-mshc";
 459                 reg = <0x12230000 0x1000>;
 460                 interrupts = <0 78 0>;
 461                 #address-cells = <1>;
 462                 #size-cells = <0>;
 463                 clocks = <&clock 283>, <&clock 142>;
 464                 clock-names = "biu", "ciu";
 465                 fifo-depth = <0x80>;
 466                 status = "disabled";
 467         };
 468
 469         i2s0: i2s@03830000 {
 470                 compatible = "samsung,s5pv210-i2s";
 471                 status = "disabled";
 472                 reg = <0x03830000 0x100>;
 473                 dmas = <&pdma0 10
 474                         &pdma0 9
 475                         &pdma0 8>;
 476                 dma-names = "tx", "rx", "tx-sec";
 477                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 478                         <&clock_audss EXYNOS_I2S_BUS>,
 479                         <&clock_audss EXYNOS_SCLK_I2S>;
 480                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 481                 samsung,idma-addr = <0x03000000>;
 482                 pinctrl-names = "default";
 483                 pinctrl-0 = <&i2s0_bus>;
 484         };
 485
 486         i2s1: i2s@12D60000 {
 487                 compatible = "samsung,s3c6410-i2s";
 488                 status = "disabled";
 489                 reg = <0x12D60000 0x100>;
 490                 dmas = <&pdma1 12
 491                         &pdma1 11>;
 492                 dma-names = "tx", "rx";
 493                 clocks = <&clock 307>, <&clock 157>;
 494                 clock-names = "iis", "i2s_opclk0";
 495                 pinctrl-names = "default";
 496                 pinctrl-0 = <&i2s1_bus>;
 497         };
 498
 499         i2s2: i2s@12D70000 {
 500                 compatible = "samsung,s3c6410-i2s";
 501                 status = "disabled";
 502                 reg = <0x12D70000 0x100>;
 503                 dmas = <&pdma0 12
 504                         &pdma0 11>;
 505                 dma-names = "tx", "rx";
 506                 clocks = <&clock 308>, <&clock 158>;
 507                 clock-names = "iis", "i2s_opclk0";
 508                 pinctrl-names = "default";
 509                 pinctrl-0 = <&i2s2_bus>;
 510         };
 511
 512         usb@12000000 {
 513                 compatible = "samsung,exynos5250-dwusb3";
 514                 clocks = <&clock 286>;
 515                 clock-names = "usbdrd30";
 516                 #address-cells = <1>;
 517                 #size-cells = <1>;
 518                 ranges;
 519
 520                 dwc3 {
 521                         compatible = "synopsys,dwc3";
 522                         reg = <0x12000000 0x10000>;
 523                         interrupts = <0 72 0>;
 524                         usb-phy = <&usb2_phy &usb3_phy>;
 525                 };
 526         };
 527
 528         usb3_phy: usbphy@12100000 {
 529                 compatible = "samsung,exynos5250-usb3phy";
 530                 reg = <0x12100000 0x100>;
 531                 clocks = <&clock 1>, <&clock 286>;
 532                 clock-names = "ext_xtal", "usbdrd30";
 533                 #address-cells = <1>;
 534                 #size-cells = <1>;
 535                 ranges;
 536
 537                 usbphy-sys {
 538                         reg = <0x10040704 0x8>;
 539                 };
 540         };
 541
 542         usb@12110000 {
 543                 compatible = "samsung,exynos4210-ehci";
 544                 reg = <0x12110000 0x100>;
 545                 interrupts = <0 71 0>;
 546
 547                 clocks = <&clock 285>;
 548                 clock-names = "usbhost";
 549         };
 550
 551         usb@12120000 {
 552                 compatible = "samsung,exynos4210-ohci";
 553                 reg = <0x12120000 0x100>;
 554                 interrupts = <0 71 0>;
 555
 556                 clocks = <&clock 285>;
 557                 clock-names = "usbhost";
 558         };
 559
 560         usb2_phy: usbphy@12130000 {
 561                 compatible = "samsung,exynos5250-usb2phy";
 562                 reg = <0x12130000 0x100>;
 563                 clocks = <&clock 1>, <&clock 285>;
 564                 clock-names = "ext_xtal", "usbhost";
 565                 #address-cells = <1>;
 566                 #size-cells = <1>;
 567                 ranges;
 568
 569                 usbphy-sys {
 570                         reg = <0x10040704 0x8>,
 571                               <0x10050230 0x4>;
 572                 };
 573         };
 574
 575         pwm: pwm@12dd0000 {
 576                 compatible = "samsung,exynos4210-pwm";
 577                 reg = <0x12dd0000 0x100>;
 578                 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 579                 #pwm-cells = <3>;
 580                 clocks = <&clock 311>;
 581                 clock-names = "timers";
 582         };
 583
 584         amba {
 585                 #address-cells = <1>;
 586                 #size-cells = <1>;
 587                 compatible = "arm,amba-bus";
 588                 interrupt-parent = <&gic>;
 589                 ranges;
 590
 591                 pdma0: pdma@121A0000 {
 592                         compatible = "arm,pl330", "arm,primecell";
 593                         reg = <0x121A0000 0x1000>;
 594                         interrupts = <0 34 0>;
 595                         clocks = <&clock 275>;
 596                         clock-names = "apb_pclk";
 597                         #dma-cells = <1>;
 598                         #dma-channels = <8>;
 599                         #dma-requests = <32>;
 600                 };
 601
 602                 pdma1: pdma@121B0000 {
 603                         compatible = "arm,pl330", "arm,primecell";
 604                         reg = <0x121B0000 0x1000>;
 605                         interrupts = <0 35 0>;
 606                         clocks = <&clock 276>;
 607                         clock-names = "apb_pclk";
 608                         #dma-cells = <1>;
 609                         #dma-channels = <8>;
 610                         #dma-requests = <32>;
 611                 };
 612
 613                 mdma0: mdma@10800000 {
 614                         compatible = "arm,pl330", "arm,primecell";
 615                         reg = <0x10800000 0x1000>;
 616                         interrupts = <0 33 0>;
 617                         clocks = <&clock 346>;
 618                         clock-names = "apb_pclk";
 619                         #dma-cells = <1>;
 620                         #dma-channels = <8>;
 621                         #dma-requests = <1>;
 622                 };
 623
 624                 mdma1: mdma@11C10000 {
 625                         compatible = "arm,pl330", "arm,primecell";
 626                         reg = <0x11C10000 0x1000>;
 627                         interrupts = <0 124 0>;
 628                         clocks = <&clock 271>;
 629                         clock-names = "apb_pclk";
 630                         #dma-cells = <1>;
 631                         #dma-channels = <8>;
 632                         #dma-requests = <1>;
 633                 };
 634         };
 635
 636         gsc_0:  gsc@13e00000 {
 637                 compatible = "samsung,exynos5-gsc";
 638                 reg = <0x13e00000 0x1000>;
 639                 interrupts = <0 85 0>;
 640                 samsung,power-domain = <&pd_gsc>;
 641                 clocks = <&clock 256>;
 642                 clock-names = "gscl";
 643         };
 644
 645         gsc_1:  gsc@13e10000 {
 646                 compatible = "samsung,exynos5-gsc";
 647                 reg = <0x13e10000 0x1000>;
 648                 interrupts = <0 86 0>;
 649                 samsung,power-domain = <&pd_gsc>;
 650                 clocks = <&clock 257>;
 651                 clock-names = "gscl";
 652         };
 653
 654         gsc_2:  gsc@13e20000 {
 655                 compatible = "samsung,exynos5-gsc";
 656                 reg = <0x13e20000 0x1000>;
 657                 interrupts = <0 87 0>;
 658                 samsung,power-domain = <&pd_gsc>;
 659                 clocks = <&clock 258>;
 660                 clock-names = "gscl";
 661         };
 662
 663         gsc_3:  gsc@13e30000 {
 664                 compatible = "samsung,exynos5-gsc";
 665                 reg = <0x13e30000 0x1000>;
 666                 interrupts = <0 88 0>;
 667                 samsung,power-domain = <&pd_gsc>;
 668                 clocks = <&clock 259>;
 669                 clock-names = "gscl";
 670         };
 671
 672         hdmi {
 673                 compatible = "samsung,exynos4212-hdmi";
 674                 reg = <0x14530000 0x70000>;
 675                 interrupts = <0 95 0>;
 676                 clocks = <&clock 344>, <&clock 136>, <&clock 137>,
 677                                 <&clock 159>, <&clock 1024>;
 678                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 679                                 "sclk_hdmiphy", "mout_hdmi";
 680         };
 681
 682         mixer {
 683                 compatible = "samsung,exynos5250-mixer";
 684                 reg = <0x14450000 0x10000>;
 685                 interrupts = <0 94 0>;
 686                 clocks = <&clock 343>, <&clock 136>;
 687                 clock-names = "mixer", "sclk_hdmi";
 688         };
 689
 690         dp_phy: video-phy@10040720 {
 691                 compatible = "samsung,exynos5250-dp-video-phy";
 692                 reg = <0x10040720 4>;
 693                 #phy-cells = <0>;
 694         };
 695
 696         dp-controller@145B0000 {
 697                 clocks = <&clock 342>;
 698                 clock-names = "dp";
 699                 phys = <&dp_phy>;
 700                 phy-names = "dp";
 701         };
 702
 703         fimd@14400000 {
 704                 clocks = <&clock 133>, <&clock 339>;
 705                 clock-names = "sclk_fimd", "fimd";
 706         };
 707
 708         adc: adc@12D10000 {
 709                 compatible = "samsung,exynos-adc-v1";
 710                 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
 711                 interrupts = <0 106 0>;
 712                 clocks = <&clock 303>;
 713                 clock-names = "adc";
 714                 #io-channel-cells = <1>;
 715                 io-channel-ranges;
 716                 status = "disabled";
 717         };
 718 };