arch/arm/boot/dts/exynos5440.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5440 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 /include/ "skeleton.dtsi"
  13
  14 / {
  15         compatible = "samsung,exynos5440";
  16
  17         interrupt-parent = <&gic>;
  18
  19         clock: clock-controller@0x160000 {
  20                 compatible = "samsung,exynos5440-clock";
  21                 reg = <0x160000 0x1000>;
  22                 #clock-cells = <1>;
  23         };
  24
  25         gic:interrupt-controller@2E0000 {
  26                 compatible = "arm,cortex-a15-gic";
  27                 #interrupt-cells = <3>;
  28                 interrupt-controller;
  29                 reg =   <0x2E1000 0x1000>,
  30                         <0x2E2000 0x1000>,
  31                         <0x2E4000 0x2000>,
  32                         <0x2E6000 0x2000>;
  33                 interrupts = <1 9 0xf04>;
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 cpu@0 {
  41                         compatible = "arm,cortex-a15";
  42                         reg = <0>;
  43                 };
  44                 cpu@1 {
  45                         compatible = "arm,cortex-a15";
  46                         reg = <1>;
  47                 };
  48                 cpu@2 {
  49                         compatible = "arm,cortex-a15";
  50                         reg = <2>;
  51                 };
  52                 cpu@3 {
  53                         compatible = "arm,cortex-a15";
  54                         reg = <3>;
  55                 };
  56         };
  57
  58         arm-pmu {
  59                 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
  60                 interrupts = <0 52 4>,
  61                              <0 53 4>,
  62                              <0 54 4>,
  63                              <0 55 4>;
  64         };
  65
  66         timer {
  67                 compatible = "arm,cortex-a15-timer",
  68                              "arm,armv7-timer";
  69                 interrupts = <1 13 0xf08>,
  70                              <1 14 0xf08>,
  71                              <1 11 0xf08>,
  72                              <1 10 0xf08>;
  73                 clock-frequency = <50000000>;
  74         };
  75
  76         serial@B0000 {
  77                 compatible = "samsung,exynos4210-uart";
  78                 reg = <0xB0000 0x1000>;
  79                 interrupts = <0 2 0>;
  80                 clocks = <&clock 21>, <&clock 21>;
  81                 clock-names = "uart", "clk_uart_baud0";
  82         };
  83
  84         serial@C0000 {
  85                 compatible = "samsung,exynos4210-uart";
  86                 reg = <0xC0000 0x1000>;
  87                 interrupts = <0 3 0>;
  88                 clocks = <&clock 21>, <&clock 21>;
  89                 clock-names = "uart", "clk_uart_baud0";
  90         };
  91
  92         spi {
  93                 compatible = "samsung,exynos4210-spi";
  94                 reg = <0xD0000 0x1000>;
  95                 interrupts = <0 4 0>;
  96                 tx-dma-channel = <&pdma0 5>; /* preliminary */
  97                 rx-dma-channel = <&pdma0 4>; /* preliminary */
  98                 #address-cells = <1>;
  99                 #size-cells = <0>;
 100                 clocks = <&clock 21>, <&clock 16>;
 101                 clock-names = "spi", "spi_busclk0";
 102         };
 103
 104         pinctrl {
 105                 compatible = "samsung,exynos5440-pinctrl";
 106                 reg = <0xE0000 0x1000>;
 107                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
 108                              <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
 109                 interrupt-controller;
 110                 #interrupt-cells = <2>;
 111                 #gpio-cells = <2>;
 112
 113                 fan: fan {
 114                         samsung,exynos5440-pin-function = <1>;
 115                 };
 116
 117                 hdd_led0: hdd_led0 {
 118                         samsung,exynos5440-pin-function = <2>;
 119                 };
 120
 121                 hdd_led1: hdd_led1 {
 122                         samsung,exynos5440-pin-function = <3>;
 123                 };
 124
 125                 uart1: uart1 {
 126                         samsung,exynos5440-pin-function = <4>;
 127                 };
 128         };
 129
 130         i2c@F0000 {
 131                 compatible = "samsung,exynos5440-i2c";
 132                 reg = <0xF0000 0x1000>;
 133                 interrupts = <0 5 0>;
 134                 #address-cells = <1>;
 135                 #size-cells = <0>;
 136                 clocks = <&clock 21>;
 137                 clock-names = "i2c";
 138         };
 139
 140         i2c@100000 {
 141                 compatible = "samsung,exynos5440-i2c";
 142                 reg = <0x100000 0x1000>;
 143                 interrupts = <0 6 0>;
 144                 #address-cells = <1>;
 145                 #size-cells = <0>;
 146                 clocks = <&clock 21>;
 147                 clock-names = "i2c";
 148         };
 149
 150         watchdog {
 151                 compatible = "samsung,s3c2410-wdt";
 152                 reg = <0x110000 0x1000>;
 153                 interrupts = <0 1 0>;
 154                 clocks = <&clock 21>;
 155                 clock-names = "watchdog";
 156         };
 157
 158         gmac: ethernet@00230000 {
 159                 compatible = "snps,dwmac-3.70a";
 160                 reg = <0x00230000 0x8000>;
 161                 interrupt-parent = <&gic>;
 162                 interrupts = <0 31 4>;
 163                 interrupt-names = "macirq";
 164                 phy-mode = "sgmii";
 165                 clocks = <&clock 25>;
 166                 clock-names = "stmmaceth";
 167         };
 168
 169         amba {
 170                 #address-cells = <1>;
 171                 #size-cells = <1>;
 172                 compatible = "arm,amba-bus";
 173                 interrupt-parent = <&gic>;
 174                 ranges;
 175
 176                 pdma0: pdma@121A0000 {
 177                         compatible = "arm,pl330", "arm,primecell";
 178                         reg = <0x120000 0x1000>;
 179                         interrupts = <0 34 0>;
 180                         clocks = <&clock 21>;
 181                         clock-names = "apb_pclk";
 182                         #dma-cells = <1>;
 183                         #dma-channels = <8>;
 184                         #dma-requests = <32>;
 185                 };
 186
 187                 pdma1: pdma@121B0000 {
 188                         compatible = "arm,pl330", "arm,primecell";
 189                         reg = <0x121000 0x1000>;
 190                         interrupts = <0 35 0>;
 191                         clocks = <&clock 21>;
 192                         clock-names = "apb_pclk";
 193                         #dma-cells = <1>;
 194                         #dma-channels = <8>;
 195                         #dma-requests = <32>;
 196                 };
 197         };
 198
 199         rtc {
 200                 compatible = "samsung,s3c6410-rtc";
 201                 reg = <0x130000 0x1000>;
 202                 interrupts = <0 17 0>, <0 16 0>;
 203                 clocks = <&clock 21>;
 204                 clock-names = "rtc";
 205         };
 206 };