arch/arm/boot/dts/exynos5440.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5440 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         compatible = "samsung,exynos5440";
  16
  17         interrupt-parent = <&gic>;
  18
  19         aliases {
  20                 spi0 = &spi_0;
  21         };
  22
  23         clock: clock-controller@0x160000 {
  24                 compatible = "samsung,exynos5440-clock";
  25                 reg = <0x160000 0x1000>;
  26                 #clock-cells = <1>;
  27         };
  28
  29         gic:interrupt-controller@2E0000 {
  30                 compatible = "arm,cortex-a15-gic";
  31                 #interrupt-cells = <3>;
  32                 interrupt-controller;
  33                 reg =   <0x2E1000 0x1000>,
  34                         <0x2E2000 0x1000>,
  35                         <0x2E4000 0x2000>,
  36                         <0x2E6000 0x2000>;
  37                 interrupts = <1 9 0xf04>;
  38         };
  39
  40         cpus {
  41                 #address-cells = <1>;
  42                 #size-cells = <0>;
  43
  44                 cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a15";
  47                         reg = <0>;
  48                 };
  49                 cpu@1 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a15";
  52                         reg = <1>;
  53                 };
  54                 cpu@2 {
  55                         device_type = "cpu";
  56                         compatible = "arm,cortex-a15";
  57                         reg = <2>;
  58                 };
  59                 cpu@3 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <3>;
  63                 };
  64         };
  65
  66         arm-pmu {
  67                 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
  68                 interrupts = <0 52 4>,
  69                              <0 53 4>,
  70                              <0 54 4>,
  71                              <0 55 4>;
  72         };
  73
  74         timer {
  75                 compatible = "arm,cortex-a15-timer",
  76                              "arm,armv7-timer";
  77                 interrupts = <1 13 0xf08>,
  78                              <1 14 0xf08>,
  79                              <1 11 0xf08>,
  80                              <1 10 0xf08>;
  81                 clock-frequency = <50000000>;
  82         };
  83
  84         cpufreq@160000 {
  85                 compatible = "samsung,exynos5440-cpufreq";
  86                 reg = <0x160000 0x1000>;
  87                 interrupts = <0 57 0>;
  88                 operating-points = <
  89                                 /* KHz    uV */
  90                                 1500000 1100000
  91                                 1400000 1075000
  92                                 1300000 1050000
  93                                 1200000 1025000
  94                                 1100000 1000000
  95                                 1000000 975000
  96                                 900000  950000
  97                                 800000  925000
  98                 >;
  99         };
 100
 101         serial@B0000 {
 102                 compatible = "samsung,exynos4210-uart";
 103                 reg = <0xB0000 0x1000>;
 104                 interrupts = <0 2 0>;
 105                 clocks = <&clock 21>, <&clock 21>;
 106                 clock-names = "uart", "clk_uart_baud0";
 107         };
 108
 109         serial@C0000 {
 110                 compatible = "samsung,exynos4210-uart";
 111                 reg = <0xC0000 0x1000>;
 112                 interrupts = <0 3 0>;
 113                 clocks = <&clock 21>, <&clock 21>;
 114                 clock-names = "uart", "clk_uart_baud0";
 115         };
 116
 117         spi_0: spi@D0000 {
 118                 compatible = "samsung,exynos5440-spi";
 119                 reg = <0xD0000 0x100>;
 120                 interrupts = <0 4 0>;
 121                 #address-cells = <1>;
 122                 #size-cells = <0>;
 123                 samsung,spi-src-clk = <0>;
 124                 num-cs = <1>;
 125                 clocks = <&clock 21>, <&clock 16>;
 126                 clock-names = "spi", "spi_busclk0";
 127         };
 128
 129         pin_ctrl: pinctrl {
 130                 compatible = "samsung,exynos5440-pinctrl";
 131                 reg = <0xE0000 0x1000>;
 132                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
 133                              <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
 134                 interrupt-controller;
 135                 #interrupt-cells = <2>;
 136                 #gpio-cells = <2>;
 137
 138                 fan: fan {
 139                         samsung,exynos5440-pin-function = <1>;
 140                 };
 141
 142                 hdd_led0: hdd_led0 {
 143                         samsung,exynos5440-pin-function = <2>;
 144                 };
 145
 146                 hdd_led1: hdd_led1 {
 147                         samsung,exynos5440-pin-function = <3>;
 148                 };
 149
 150                 uart1: uart1 {
 151                         samsung,exynos5440-pin-function = <4>;
 152                 };
 153         };
 154
 155         i2c@F0000 {
 156                 compatible = "samsung,exynos5440-i2c";
 157                 reg = <0xF0000 0x1000>;
 158                 interrupts = <0 5 0>;
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161                 clocks = <&clock 21>;
 162                 clock-names = "i2c";
 163         };
 164
 165         i2c@100000 {
 166                 compatible = "samsung,exynos5440-i2c";
 167                 reg = <0x100000 0x1000>;
 168                 interrupts = <0 6 0>;
 169                 #address-cells = <1>;
 170                 #size-cells = <0>;
 171                 clocks = <&clock 21>;
 172                 clock-names = "i2c";
 173         };
 174
 175         watchdog {
 176                 compatible = "samsung,s3c2410-wdt";
 177                 reg = <0x110000 0x1000>;
 178                 interrupts = <0 1 0>;
 179                 clocks = <&clock 21>;
 180                 clock-names = "watchdog";
 181         };
 182
 183         gmac: ethernet@00230000 {
 184                 compatible = "snps,dwmac-3.70a";
 185                 reg = <0x00230000 0x8000>;
 186                 interrupt-parent = <&gic>;
 187                 interrupts = <0 31 4>;
 188                 interrupt-names = "macirq";
 189                 phy-mode = "sgmii";
 190                 clocks = <&clock 25>;
 191                 clock-names = "stmmaceth";
 192         };
 193
 194         amba {
 195                 #address-cells = <1>;
 196                 #size-cells = <1>;
 197                 compatible = "arm,amba-bus";
 198                 interrupt-parent = <&gic>;
 199                 ranges;
 200         };
 201
 202         rtc {
 203                 compatible = "samsung,s3c6410-rtc";
 204                 reg = <0x130000 0x1000>;
 205                 interrupts = <0 17 0>, <0 16 0>;
 206                 clocks = <&clock 21>;
 207                 clock-names = "rtc";
 208         };
 209
 210         sata@210000 {
 211                 compatible = "snps,exynos5440-ahci";
 212                 reg = <0x210000 0x10000>;
 213                 interrupts = <0 30 0>;
 214                 clocks = <&clock 23>;
 215                 clock-names = "sata";
 216         };
 217
 218         ohci@220000 {
 219                 compatible = "samsung,exynos5440-ohci";
 220                 reg = <0x220000 0x1000>;
 221                 interrupts = <0 29 0>;
 222                 clocks = <&clock 24>;
 223                 clock-names = "usbhost";
 224         };
 225
 226         ehci@221000 {
 227                 compatible = "samsung,exynos5440-ehci";
 228                 reg = <0x221000 0x1000>;
 229                 interrupts = <0 29 0>;
 230                 clocks = <&clock 24>;
 231                 clock-names = "usbhost";
 232         };
 233
 234         pcie@290000 {
 235                 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
 236                 reg = <0x290000 0x1000
 237                         0x270000 0x1000
 238                         0x271000 0x40>;
 239                 interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
 240                 clocks = <&clock 28>, <&clock 27>;
 241                 clock-names = "pcie", "pcie_bus";
 242                 #address-cells = <3>;
 243                 #size-cells = <2>;
 244                 device_type = "pci";
 245                 ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000   /* configuration space */
 246                           0x81000000 0 0          0x40001000 0 0x00010000   /* downstream I/O */
 247                           0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
 248                 #interrupt-cells = <1>;
 249                 interrupt-map-mask = <0 0 0 0>;
 250                 interrupt-map = <0x0 0 &gic 53>;
 251         };
 252
 253         pcie@2a0000 {
 254                 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
 255                 reg = <0x2a0000 0x1000
 256                         0x272000 0x1000
 257                         0x271040 0x40>;
 258                 interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
 259                 clocks = <&clock 29>, <&clock 27>;
 260                 clock-names = "pcie", "pcie_bus";
 261                 #address-cells = <3>;
 262                 #size-cells = <2>;
 263                 device_type = "pci";
 264                 ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000   /* configuration space */
 265                           0x81000000 0 0          0x60001000 0 0x00010000   /* downstream I/O */
 266                           0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
 267                 #interrupt-cells = <1>;
 268                 interrupt-map-mask = <0 0 0 0>;
 269                 interrupt-map = <0x0 0 &gic 56>;
 270         };
 271 };