ARM: dts: enable display controller for exynos5800-peach-pi
[cascardo/linux.git] / arch / arm / boot / dts / exynos5800-peach-pi.dts
1 /*
2  * Google Peach Pi Rev 10+ board device tree source
3  *
4  * Copyright (c) 2014 Google, Inc
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 /dts-v1/;
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5800.dtsi"
15
16 / {
17         model = "Google Peach Pi Rev 10+";
18
19         compatible = "google,pi-rev16",
20                 "google,pi-rev15", "google,pi-rev14",
21                 "google,pi-rev13", "google,pi-rev12",
22                 "google,pi-rev11", "google,pi-rev10",
23                 "google,pi", "google,peach", "samsung,exynos5800",
24                 "samsung,exynos5";
25
26         memory {
27                 reg = <0x20000000 0x80000000>;
28         };
29
30         fixed-rate-clocks {
31                 oscclk {
32                         compatible = "samsung,exynos5420-oscclk";
33                         clock-frequency = <24000000>;
34                 };
35         };
36
37         gpio-keys {
38                 compatible = "gpio-keys";
39
40                 pinctrl-names = "default";
41                 pinctrl-0 = <&power_key_irq>;
42
43                 power {
44                         label = "Power";
45                         gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
46                         linux,code = <KEY_POWER>;
47                         gpio-key,wakeup;
48                 };
49         };
50
51         backlight {
52                 compatible = "pwm-backlight";
53                 pwms = <&pwm 0 1000000 0>;
54                 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
55                 default-brightness-level = <7>;
56                 pinctrl-0 = <&pwm0_out>;
57                 pinctrl-names = "default";
58         };
59 };
60
61 &pinctrl_0 {
62         tpm_irq: tpm-irq {
63                 samsung,pins = "gpx1-0";
64                 samsung,pin-function = <0>;
65                 samsung,pin-pud = <0>;
66                 samsung,pin-drv = <0>;
67         };
68
69         power_key_irq: power-key-irq {
70                 samsung,pins = "gpx1-2";
71                 samsung,pin-function = <0>;
72                 samsung,pin-pud = <0>;
73                 samsung,pin-drv = <0>;
74         };
75
76         dp_hpd_gpio: dp_hpd_gpio {
77                 samsung,pins = "gpx2-6";
78                 samsung,pin-function = <0>;
79                 samsung,pin-pud = <3>;
80                 samsung,pin-drv = <0>;
81         };
82
83         hdmi_hpd_irq: hdmi-hpd-irq {
84                 samsung,pins = "gpx3-7";
85                 samsung,pin-function = <0>;
86                 samsung,pin-pud = <1>;
87                 samsung,pin-drv = <0>;
88         };
89 };
90
91 &rtc {
92         status = "okay";
93 };
94
95 &uart_3 {
96         status = "okay";
97 };
98
99 &mmc_0 {
100         status = "okay";
101         num-slots = <1>;
102         broken-cd;
103         caps2-mmc-hs200-1_8v;
104         supports-highspeed;
105         non-removable;
106         card-detect-delay = <200>;
107         clock-frequency = <400000000>;
108         samsung,dw-mshc-ciu-div = <3>;
109         samsung,dw-mshc-sdr-timing = <0 4>;
110         samsung,dw-mshc-ddr-timing = <0 2>;
111         pinctrl-names = "default";
112         pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
113
114         slot@0 {
115                 reg = <0>;
116                 bus-width = <8>;
117         };
118 };
119
120 &mmc_2 {
121         status = "okay";
122         num-slots = <1>;
123         supports-highspeed;
124         card-detect-delay = <200>;
125         clock-frequency = <400000000>;
126         samsung,dw-mshc-ciu-div = <3>;
127         samsung,dw-mshc-sdr-timing = <2 3>;
128         samsung,dw-mshc-ddr-timing = <1 2>;
129         pinctrl-names = "default";
130         pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
131
132         slot@0 {
133                 reg = <0>;
134                 bus-width = <4>;
135         };
136 };
137
138 &dp {
139         status = "okay";
140         pinctrl-names = "default";
141         pinctrl-0 = <&dp_hpd_gpio>;
142         samsung,color-space = <0>;
143         samsung,dynamic-range = <0>;
144         samsung,ycbcr-coeff = <0>;
145         samsung,color-depth = <1>;
146         samsung,link-rate = <0x0a>;
147         samsung,lane-count = <2>;
148         samsung,hpd-gpio = <&gpx2 6 0>;
149
150         display-timings {
151                 native-mode = <&timing1>;
152
153                 timing1: timing@1 {
154                         clock-frequency = <150660000>;
155                         hactive = <1920>;
156                         vactive = <1080>;
157                         hfront-porch = <60>;
158                         hback-porch = <172>;
159                         hsync-len = <80>;
160                         vback-porch = <25>;
161                         vfront-porch = <10>;
162                         vsync-len = <10>;
163                 };
164         };
165 };
166
167 &hsi2c_9 {
168         status = "okay";
169         clock-frequency = <400000>;
170
171         tpm@20 {
172                 compatible = "infineon,slb9645tt";
173                 reg = <0x20>;
174                 /* Unused irq; but still need to configure the pins */
175                 pinctrl-names = "default";
176                 pinctrl-0 = <&tpm_irq>;
177         };
178 };
179
180 &i2c_2 {
181         status = "okay";
182         samsung,i2c-sda-delay = <100>;
183         samsung,i2c-max-bus-freq = <66000>;
184         samsung,i2c-slave-addr = <0x50>;
185 };
186
187 &hdmi {
188         status = "okay";
189         hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
190         pinctrl-names = "default";
191         pinctrl-0 = <&hdmi_hpd_irq>;
192         ddc = <&i2c_2>;
193 };
194
195 /*
196  * Use longest HW watchdog in SoC (32 seconds) since the hardware
197  * watchdog provides no debugging information (compared to soft/hard
198  * lockup detectors) and so should be last resort.
199  */
200 &watchdog {
201         timeout-sec = <32>;
202 };