arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts

   1 /*
   2  * Copyright 2013 Data Modul AG
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 /dts-v1/;
  13
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include "imx6q.dtsi"
  16
  17 / {
  18         model = "Data Modul eDM-QMX6 Board";
  19         compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
  20
  21         chosen {
  22                 stdout-path = &uart2;
  23         };
  24
  25         aliases {
  26                 gpio7 = &stmpe_gpio1;
  27                 gpio8 = &stmpe_gpio2;
  28                 stmpe-i2c0 = &stmpe1;
  29                 stmpe-i2c1 = &stmpe2;
  30         };
  31
  32         memory {
  33                 reg = <0x10000000 0x80000000>;
  34         };
  35
  36         regulators {
  37                 compatible = "simple-bus";
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40
  41                 reg_3p3v: regulator@0 {
  42                         compatible = "regulator-fixed";
  43                         reg = <0>;
  44                         regulator-name = "3P3V";
  45                         regulator-min-microvolt = <3300000>;
  46                         regulator-max-microvolt = <3300000>;
  47                         regulator-always-on;
  48                 };
  49
  50                 reg_usb_otg_switch: regulator@1 {
  51                         compatible = "regulator-fixed";
  52                         reg = <1>;
  53                         regulator-name = "usb_otg_switch";
  54                         regulator-min-microvolt = <5000000>;
  55                         regulator-max-microvolt = <5000000>;
  56                         gpio = <&gpio7 12 0>;
  57                         regulator-boot-on;
  58                         regulator-always-on;
  59                 };
  60
  61                 reg_usb_host1: regulator@2 {
  62                         compatible = "regulator-fixed";
  63                         reg = <2>;
  64                         regulator-name = "usb_host1_en";
  65                         regulator-min-microvolt = <3300000>;
  66                         regulator-max-microvolt = <3300000>;
  67                         gpio = <&gpio3 31 0>;
  68                         enable-active-high;
  69                 };
  70         };
  71
  72         gpio-leds {
  73                 compatible = "gpio-leds";
  74
  75                 led-blue {
  76                         label = "blue";
  77                         gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
  78                         linux,default-trigger = "heartbeat";
  79                 };
  80
  81                 led-green {
  82                         label = "green";
  83                         gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
  84                 };
  85
  86                 led-pink {
  87                         label = "pink";
  88                         gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
  89                 };
  90
  91                 led-red {
  92                         label = "red";
  93                         gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
  94                 };
  95         };
  96 };
  97
  98 &ecspi5 {
  99         pinctrl-names = "default";
 100         pinctrl-0 = <&pinctrl_ecspi5>;
 101         fsl,spi-num-chipselects = <1>;
 102         cs-gpios = <&gpio1 12 0>;
 103         status = "okay";
 104
 105         flash: m25p80@0 {
 106                 compatible = "m25p80";
 107                 spi-max-frequency = <40000000>;
 108                 reg = <0>;
 109         };
 110 };
 111
 112 &fec {
 113         pinctrl-names = "default";
 114         pinctrl-0 = <&pinctrl_enet>;
 115         phy-mode = "rgmii";
 116         phy-reset-gpios = <&gpio3 23 0>;
 117         phy-supply = <&vgen2_1v2_eth>;
 118         status = "okay";
 119 };
 120
 121 &i2c1 {
 122         clock-frequency = <100000>;
 123         pinctrl-names = "default";
 124         pinctrl-0 = <&pinctrl_i2c1>;
 125         status = "okay";
 126 };
 127
 128 &i2c2 {
 129         clock-frequency = <100000>;
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_i2c2
 132                      &pinctrl_stmpe1
 133                      &pinctrl_stmpe2
 134                      &pinctrl_pfuze>;
 135         status = "okay";
 136
 137         pmic: pfuze100@08 {
 138                 compatible = "fsl,pfuze100";
 139                 reg = <0x08>;
 140                 interrupt-parent = <&gpio3>;
 141                 interrupts = <20 8>;
 142
 143                 regulators {
 144                         sw1a_reg: sw1ab {
 145                                 regulator-min-microvolt = <300000>;
 146                                 regulator-max-microvolt = <1875000>;
 147                                 regulator-boot-on;
 148                                 regulator-always-on;
 149                         };
 150
 151                         sw1c_reg: sw1c {
 152                                 regulator-min-microvolt = <300000>;
 153                                 regulator-max-microvolt = <1875000>;
 154                                 regulator-boot-on;
 155                                 regulator-always-on;
 156                         };
 157
 158                         sw2_reg: sw2 {
 159                                 regulator-min-microvolt = <800000>;
 160                                 regulator-max-microvolt = <3300000>;
 161                                 regulator-boot-on;
 162                                 regulator-always-on;
 163                         };
 164
 165                         sw3a_reg: sw3a {
 166                                 regulator-min-microvolt = <400000>;
 167                                 regulator-max-microvolt = <1975000>;
 168                                 regulator-boot-on;
 169                                 regulator-always-on;
 170                         };
 171
 172                         sw3b_reg: sw3b {
 173                                 regulator-min-microvolt = <400000>;
 174                                 regulator-max-microvolt = <1975000>;
 175                                 regulator-boot-on;
 176                                 regulator-always-on;
 177                         };
 178
 179                         sw4_reg: sw4 {
 180                                 regulator-min-microvolt = <400000>;
 181                                 regulator-max-microvolt = <1975000>;
 182                                 regulator-always-on;
 183                         };
 184
 185                         swbst_reg: swbst {
 186                                 regulator-min-microvolt = <5000000>;
 187                                 regulator-max-microvolt = <5150000>;
 188                                 regulator-always-on;
 189                         };
 190
 191                         snvs_reg: vsnvs {
 192                                 regulator-min-microvolt = <1000000>;
 193                                 regulator-max-microvolt = <3000000>;
 194                                 regulator-boot-on;
 195                                 regulator-always-on;
 196                         };
 197
 198                         vref_reg: vrefddr {
 199                                 regulator-boot-on;
 200                                 regulator-always-on;
 201                         };
 202
 203                         vgen1_reg: vgen1 {
 204                                 regulator-min-microvolt = <800000>;
 205                                 regulator-max-microvolt = <1550000>;
 206                         };
 207
 208                         vgen2_1v2_eth: vgen2 {
 209                                 regulator-min-microvolt = <800000>;
 210                                 regulator-max-microvolt = <1550000>;
 211                         };
 212
 213                         vdd_high_in: vgen3 {
 214                                 regulator-min-microvolt = <1800000>;
 215                                 regulator-max-microvolt = <3300000>;
 216                                 regulator-boot-on;
 217                                 regulator-always-on;
 218                         };
 219
 220                         vgen4_reg: vgen4 {
 221                                 regulator-min-microvolt = <1800000>;
 222                                 regulator-max-microvolt = <3300000>;
 223                                 regulator-always-on;
 224                         };
 225
 226                         vgen5_reg: vgen5 {
 227                                 regulator-min-microvolt = <1800000>;
 228                                 regulator-max-microvolt = <3300000>;
 229                                 regulator-always-on;
 230                         };
 231
 232                         vgen6_reg: vgen6 {
 233                                 regulator-min-microvolt = <1800000>;
 234                                 regulator-max-microvolt = <3300000>;
 235                                 regulator-always-on;
 236                         };
 237                 };
 238         };
 239
 240         stmpe1: stmpe1601@40 {
 241                 compatible = "st,stmpe1601";
 242                 reg = <0x40>;
 243                 interrupts = <30 0>;
 244                 interrupt-parent = <&gpio3>;
 245                 vcc-supply = <&sw2_reg>;
 246                 vio-supply = <&sw2_reg>;
 247
 248                 stmpe_gpio1: stmpe_gpio {
 249                         #gpio-cells = <2>;
 250                         compatible = "st,stmpe-gpio";
 251                 };
 252         };
 253
 254         stmpe2: stmpe1601@44 {
 255                 compatible = "st,stmpe1601";
 256                 reg = <0x44>;
 257                 interrupts = <2 0>;
 258                 interrupt-parent = <&gpio5>;
 259                 vcc-supply = <&sw2_reg>;
 260                 vio-supply = <&sw2_reg>;
 261
 262                 stmpe_gpio2: stmpe_gpio {
 263                         #gpio-cells = <2>;
 264                         compatible = "st,stmpe-gpio";
 265                 };
 266         };
 267
 268         temp1: ad7414@4c {
 269                 compatible = "ad,ad7414";
 270                 reg = <0x4c>;
 271         };
 272
 273         temp2: ad7414@4d {
 274                 compatible = "ad,ad7414";
 275                 reg = <0x4d>;
 276         };
 277
 278         rtc: m41t62@68 {
 279                 compatible = "stm,m41t62";
 280                 reg = <0x68>;
 281         };
 282 };
 283
 284 &i2c3 {
 285         clock-frequency = <100000>;
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_i2c3>;
 288         status = "okay";
 289 };
 290
 291 &iomuxc {
 292         pinctrl-names = "default";
 293         pinctrl-0 = <&pinctrl_hog>;
 294
 295         imx6q-dmo-edmqmx6 {
 296                 pinctrl_hog: hoggrp {
 297                         fsl,pins = <
 298                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
 299                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
 300                         >;
 301                 };
 302
 303                 pinctrl_ecspi5: ecspi5rp-1 {
 304                         fsl,pins = <
 305                                 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x80000000
 306                                 MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI         0x80000000
 307                                 MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK         0x80000000
 308                                 MX6QDL_PAD_SD2_DAT3__GPIO1_IO12         0x80000000
 309                         >;
 310                 };
 311
 312                 pinctrl_enet: enetgrp {
 313                         fsl,pins = <
 314                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 315                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 316                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 317                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 318                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 319                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 320                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 321                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 322                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 323                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 324                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 325                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 326                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 327                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 328                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 329                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 330                         >;
 331                 };
 332
 333                 pinctrl_i2c1: i2c1grp {
 334                         fsl,pins = <
 335                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 336                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 337                         >;
 338                 };
 339
 340                 pinctrl_i2c2: i2c2grp {
 341                         fsl,pins = <
 342                                 MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
 343                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 344                         >;
 345                 };
 346
 347                 pinctrl_i2c3: i2c3grp {
 348                         fsl,pins = <
 349                                 MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
 350                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 351                         >;
 352                 };
 353
 354                 pinctrl_pcie: pciegrp {
 355                         fsl,pins = <
 356                                 MX6QDL_PAD_KEY_COL1__GPIO4_IO08         0x100b1
 357                         >;
 358                 };
 359
 360                 pinctrl_pfuze: pfuze100grp1 {
 361                         fsl,pins = <
 362                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20          0x80000000
 363                         >;
 364                 };
 365
 366                 pinctrl_stmpe1: stmpe1grp {
 367                         fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
 368                 };
 369
 370                 pinctrl_stmpe2: stmpe2grp {
 371                         fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
 372                 };
 373
 374                 pinctrl_uart1: uart1grp {
 375                         fsl,pins = <
 376                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 377                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 378                         >;
 379                 };
 380
 381                 pinctrl_uart2: uart2grp {
 382                         fsl,pins = <
 383                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 384                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 385                         >;
 386                 };
 387
 388                 pinctrl_usbotg: usbotggrp {
 389                         fsl,pins = <
 390                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 391                         >;
 392                 };
 393
 394                 pinctrl_usdhc3: usdhc3grp {
 395                         fsl,pins = <
 396                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 397                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 398                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 399                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 400                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 401                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 402                         >;
 403                 };
 404
 405                 pinctrl_usdhc4: usdhc4grp {
 406                         fsl,pins = <
 407                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 408                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 409                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 410                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 411                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 412                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 413                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 414                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 415                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 416                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 417                         >;
 418                 };
 419         };
 420 };
 421
 422 &pcie {
 423         pinctrl-names = "default";
 424         pinctrl-0 = <&pinctrl_pcie>;
 425         reset-gpio = <&gpio4 8 0>;
 426         status = "okay";
 427 };
 428
 429 &sata {
 430         status = "okay";
 431 };
 432
 433 &uart1 {
 434         pinctrl-names = "default";
 435         pinctrl-0 = <&pinctrl_uart1>;
 436         status = "okay";
 437 };
 438
 439 &uart2 {
 440         pinctrl-names = "default";
 441         pinctrl-0 = <&pinctrl_uart2>;
 442         status = "okay";
 443 };
 444
 445 &usbh1 {
 446         vbus-supply = <&reg_usb_host1>;
 447         disable-over-current;
 448         dr_mode = "host";
 449         status = "okay";
 450 };
 451
 452 &usbotg {
 453         pinctrl-names = "default";
 454         pinctrl-0 = <&pinctrl_usbotg>;
 455         disable-over-current;
 456         status = "okay";
 457 };
 458
 459 &usdhc3 {
 460         pinctrl-names = "default";
 461         pinctrl-0 = <&pinctrl_usdhc3>;
 462         vmmc-supply = <&reg_3p3v>;
 463         status = "okay";
 464 };
 465
 466 &usdhc4 {
 467         pinctrl-names = "default";
 468         pinctrl-0 = <&pinctrl_usdhc4>;
 469         vmmc-supply = <&reg_3p3v>;
 470         non-removable;
 471         bus-width = <8>;
 472         status = "okay";
 473 };