arch/arm/boot/dts/imx6qdl-gw53xx.dtsi

   1 /*
   2  * Copyright 2013 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 / {
  13         /* these are used by bootloader for disabling nodes */
  14         aliases {
  15                 can0 = &can1;
  16                 ethernet0 = &fec;
  17                 ethernet1 = &eth1;
  18                 led0 = &led0;
  19                 led1 = &led1;
  20                 led2 = &led2;
  21                 nand = &gpmi;
  22                 sky2 = &eth1;
  23                 ssi0 = &ssi1;
  24                 usb0 = &usbh1;
  25                 usb1 = &usbotg;
  26                 usdhc2 = &usdhc3;
  27         };
  28
  29         chosen {
  30                 bootargs = "console=ttymxc1,115200";
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 led0: user1 {
  37                         label = "user1";
  38                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
  39                         default-state = "on";
  40                         linux,default-trigger = "heartbeat";
  41                 };
  42
  43                 led1: user2 {
  44                         label = "user2";
  45                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
  46                         default-state = "off";
  47                 };
  48
  49                 led2: user3 {
  50                         label = "user3";
  51                         gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
  52                         default-state = "off";
  53                 };
  54         };
  55
  56         memory {
  57                 reg = <0x10000000 0x40000000>;
  58         };
  59
  60         pps {
  61                 compatible = "pps-gpio";
  62                 gpios = <&gpio1 26 0>;
  63                 status = "okay";
  64         };
  65
  66         regulators {
  67                 compatible = "simple-bus";
  68                 #address-cells = <1>;
  69                 #size-cells = <0>;
  70
  71                 reg_1p0v: regulator@0 {
  72                         compatible = "regulator-fixed";
  73                         reg = <0>;
  74                         regulator-name = "1P0V";
  75                         regulator-min-microvolt = <1000000>;
  76                         regulator-max-microvolt = <1000000>;
  77                         regulator-always-on;
  78                 };
  79
  80                 /* remove when pmic 1p8 regulator available */
  81                 reg_1p8v: regulator@1 {
  82                         compatible = "regulator-fixed";
  83                         reg = <1>;
  84                         regulator-name = "1P8V";
  85                         regulator-min-microvolt = <1800000>;
  86                         regulator-max-microvolt = <1800000>;
  87                         regulator-always-on;
  88                 };
  89
  90                 reg_3p3v: regulator@2 {
  91                         compatible = "regulator-fixed";
  92                         reg = <2>;
  93                         regulator-name = "3P3V";
  94                         regulator-min-microvolt = <3300000>;
  95                         regulator-max-microvolt = <3300000>;
  96                         regulator-always-on;
  97                 };
  98
  99                 reg_usb_h1_vbus: regulator@3 {
 100                         compatible = "regulator-fixed";
 101                         reg = <3>;
 102                         regulator-name = "usb_h1_vbus";
 103                         regulator-min-microvolt = <5000000>;
 104                         regulator-max-microvolt = <5000000>;
 105                         regulator-always-on;
 106                 };
 107
 108                 reg_usb_otg_vbus: regulator@4 {
 109                         compatible = "regulator-fixed";
 110                         reg = <4>;
 111                         regulator-name = "usb_otg_vbus";
 112                         regulator-min-microvolt = <5000000>;
 113                         regulator-max-microvolt = <5000000>;
 114                         gpio = <&gpio3 22 0>;
 115                         enable-active-high;
 116                 };
 117         };
 118
 119         sound {
 120                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 121                              "fsl,imx-audio-sgtl5000";
 122                 model = "imx6q-sabrelite-sgtl5000";
 123                 ssi-controller = <&ssi1>;
 124                 audio-codec = <&codec>;
 125                 audio-routing =
 126                         "MIC_IN", "Mic Jack",
 127                         "Mic Jack", "Mic Bias",
 128                         "Headphone Jack", "HP_OUT";
 129                 mux-int-port = <1>;
 130                 mux-ext-port = <4>;
 131         };
 132 };
 133
 134 &audmux {
 135         pinctrl-names = "default";
 136         pinctrl-0 = <&pinctrl_audmux>;
 137         status = "okay";
 138 };
 139
 140 &can1 {
 141         pinctrl-names = "default";
 142         pinctrl-0 = <&pinctrl_flexcan1>;
 143         status = "okay";
 144 };
 145
 146 &fec {
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&pinctrl_enet>;
 149         phy-mode = "rgmii";
 150         phy-reset-gpios = <&gpio1 30 0>;
 151         status = "okay";
 152 };
 153
 154 &gpmi {
 155         pinctrl-names = "default";
 156         pinctrl-0 = <&pinctrl_gpmi_nand>;
 157         status = "okay";
 158 };
 159
 160 &i2c1 {
 161         clock-frequency = <100000>;
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pinctrl_i2c1>;
 164         status = "okay";
 165
 166         eeprom1: eeprom@50 {
 167                 compatible = "atmel,24c02";
 168                 reg = <0x50>;
 169                 pagesize = <16>;
 170         };
 171
 172         eeprom2: eeprom@51 {
 173                 compatible = "atmel,24c02";
 174                 reg = <0x51>;
 175                 pagesize = <16>;
 176         };
 177
 178         eeprom3: eeprom@52 {
 179                 compatible = "atmel,24c02";
 180                 reg = <0x52>;
 181                 pagesize = <16>;
 182         };
 183
 184         eeprom4: eeprom@53 {
 185                 compatible = "atmel,24c02";
 186                 reg = <0x53>;
 187                 pagesize = <16>;
 188         };
 189
 190         gpio: pca9555@23 {
 191                 compatible = "nxp,pca9555";
 192                 reg = <0x23>;
 193                 gpio-controller;
 194                 #gpio-cells = <2>;
 195         };
 196
 197         hwmon: gsc@29 {
 198                 compatible = "gw,gsp";
 199                 reg = <0x29>;
 200         };
 201
 202         rtc: ds1672@68 {
 203                 compatible = "dallas,ds1672";
 204                 reg = <0x68>;
 205         };
 206 };
 207
 208 &i2c2 {
 209         clock-frequency = <100000>;
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&pinctrl_i2c2>;
 212         status = "okay";
 213
 214         pciclkgen: si53156@6b {
 215                 compatible = "sil,si53156";
 216                 reg = <0x6b>;
 217         };
 218
 219         pciswitch: pex8606@3f {
 220                 compatible = "plx,pex8606";
 221                 reg = <0x3f>;
 222         };
 223
 224         pmic: ltc3676@3c {
 225                 compatible = "ltc,ltc3676";
 226                 reg = <0x3c>;
 227
 228                 regulators {
 229                         /* VDD_SOC */
 230                         sw1_reg: ltc3676__sw1 {
 231                                 regulator-min-microvolt = <1175000>;
 232                                 regulator-max-microvolt = <1175000>;
 233                                 regulator-boot-on;
 234                                 regulator-always-on;
 235                         };
 236
 237                         /* VDD_1P8 */
 238                         sw2_reg: ltc3676__sw2 {
 239                                 regulator-min-microvolt = <1800000>;
 240                                 regulator-max-microvolt = <1800000>;
 241                                 regulator-boot-on;
 242                                 regulator-always-on;
 243                         };
 244
 245                         /* VDD_ARM */
 246                         sw3_reg: ltc3676__sw3 {
 247                                 regulator-min-microvolt = <1175000>;
 248                                 regulator-max-microvolt = <1175000>;
 249                                 regulator-boot-on;
 250                                 regulator-always-on;
 251                         };
 252
 253                         /* VDD_DDR */
 254                         sw4_reg: ltc3676__sw4 {
 255                                 regulator-min-microvolt = <1500000>;
 256                                 regulator-max-microvolt = <1500000>;
 257                                 regulator-boot-on;
 258                                 regulator-always-on;
 259                         };
 260
 261                         /* VDD_2P5 */
 262                         ldo2_reg: ltc3676__ldo2 {
 263                                 regulator-min-microvolt = <2500000>;
 264                                 regulator-max-microvolt = <2500000>;
 265                                 regulator-boot-on;
 266                                 regulator-always-on;
 267                         };
 268
 269                         /* VDD_1P8 */
 270                         ldo3_reg: ltc3676__ldo3 {
 271                                 regulator-min-microvolt = <1800000>;
 272                                 regulator-max-microvolt = <1800000>;
 273                                 regulator-boot-on;
 274                                 regulator-always-on;
 275                         };
 276
 277                         /* VDD_HIGH */
 278                         ldo4_reg: ltc3676__ldo4 {
 279                                 regulator-min-microvolt = <3000000>;
 280                                 regulator-max-microvolt = <3000000>;
 281                         };
 282                 };
 283         };
 284 };
 285
 286 &i2c3 {
 287         clock-frequency = <100000>;
 288         pinctrl-names = "default";
 289         pinctrl-0 = <&pinctrl_i2c3>;
 290         status = "okay";
 291
 292         accelerometer: fxos8700@1e {
 293                 compatible = "fsl,fxos8700";
 294                 reg = <0x1e>;
 295         };
 296
 297         codec: sgtl5000@0a {
 298                 compatible = "fsl,sgtl5000";
 299                 reg = <0x0a>;
 300                 clocks = <&clks 201>;
 301                 VDDA-supply = <&reg_1p8v>;
 302                 VDDIO-supply = <&reg_3p3v>;
 303         };
 304
 305         hdmiin: adv7611@4c {
 306                 compatible = "adi,adv7611";
 307                 reg = <0x4c>;
 308         };
 309
 310         touchscreen: egalax_ts@04 {
 311                 compatible = "eeti,egalax_ts";
 312                 reg = <0x04>;
 313                 interrupt-parent = <&gpio1>;
 314                 interrupts = <11 2>; /* gpio1_11 active low */
 315                 wakeup-gpios = <&gpio1 11 0>;
 316         };
 317
 318         videoout: adv7393@2a {
 319                 compatible = "adi,adv7393";
 320                 reg = <0x2a>;
 321         };
 322
 323         videoin: adv7180@20 {
 324                 compatible = "adi,adv7180";
 325                 reg = <0x20>;
 326         };
 327 };
 328
 329 &iomuxc {
 330         pinctrl-names = "default";
 331         pinctrl-0 = <&pinctrl_hog>;
 332
 333         imx6qdl-gw53xx {
 334                 pinctrl_hog: hoggrp {
 335                         fsl,pins = <
 336                                 MX6QDL_PAD_EIM_A19__GPIO2_IO19    0x80000000 /* PCIE6EXP_DIO0 */
 337                                 MX6QDL_PAD_EIM_A20__GPIO2_IO18    0x80000000 /* PCIE6EXP_DIO1 */
 338                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
 339                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27  0x80000000 /* GPS_SHDN */
 340                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26  0x80000000 /* GPS_PPS */
 341                                 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
 342                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
 343                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
 344                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02     0x80000000 /* CAN_STBY */
 345                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08     0x80000000 /* PMIC_IRQ# */
 346                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* HUB_RST# */
 347                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIE_WDIS# */
 348                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05    0x80000000 /* ACCEL_IRQ# */
 349                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
 350                                 MX6QDL_PAD_KEY_COL4__GPIO4_IO14   0x80000000 /* USBOTG_OC# */
 351                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
 352                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
 353                                 MX6QDL_PAD_SD2_CMD__GPIO1_IO11    0x80000000 /* TOUCH_IRQ# */
 354                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00   0x80000000 /* SD3_DET# */
 355                          >;
 356                 };
 357
 358                 pinctrl_audmux: audmuxgrp {
 359                         fsl,pins = <
 360                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 361                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 362                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 363                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 364                         >;
 365                 };
 366
 367                 pinctrl_enet: enetgrp {
 368                         fsl,pins = <
 369                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 370                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 371                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 372                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 373                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 374                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 375                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 376                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 377                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 378                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 379                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 380                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 381                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 382                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 383                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 384                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 385                         >;
 386                 };
 387
 388                 pinctrl_flexcan1: flexcan1grp {
 389                         fsl,pins = <
 390                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x80000000
 391                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x80000000
 392                         >;
 393                 };
 394
 395                 pinctrl_gpmi_nand: gpminandgrp {
 396                         fsl,pins = <
 397                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 398                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 399                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 400                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 401                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 402                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
 403                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 404                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 405                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 406                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 407                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 408                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 409                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 410                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 411                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 412                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 413                         >;
 414                 };
 415
 416                 pinctrl_i2c1: i2c1grp {
 417                         fsl,pins = <
 418                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 419                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 420                         >;
 421                 };
 422
 423                 pinctrl_i2c2: i2c2grp {
 424                         fsl,pins = <
 425                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 426                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 427                         >;
 428                 };
 429
 430                 pinctrl_i2c3: i2c3grp {
 431                         fsl,pins = <
 432                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 433                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 434                         >;
 435                 };
 436
 437                 pinctrl_uart1: uart1grp {
 438                         fsl,pins = <
 439                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 440                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 441                         >;
 442                 };
 443
 444                 pinctrl_uart2: uart2grp {
 445                         fsl,pins = <
 446                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 447                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 448                         >;
 449                 };
 450
 451                 pinctrl_uart5: uart5grp {
 452                         fsl,pins = <
 453                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 454                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 455                         >;
 456                 };
 457
 458                 pinctrl_usbotg: usbotggrp {
 459                         fsl,pins = <
 460                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 461                         >;
 462                 };
 463
 464                 pinctrl_usdhc3: usdhc3grp {
 465                         fsl,pins = <
 466                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 467                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 468                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 469                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 470                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 471                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 472                         >;
 473                 };
 474         };
 475 };
 476
 477 &ldb {
 478         status = "okay";
 479
 480         lvds-channel@1 {
 481                 fsl,data-mapping = "spwg";
 482                 fsl,data-width = <18>;
 483                 status = "okay";
 484
 485                 display-timings {
 486                         native-mode = <&timing0>;
 487                         timing0: hsd100pxn1 {
 488                                 clock-frequency = <65000000>;
 489                                 hactive = <1024>;
 490                                 vactive = <768>;
 491                                 hback-porch = <220>;
 492                                 hfront-porch = <40>;
 493                                 vback-porch = <21>;
 494                                 vfront-porch = <7>;
 495                                 hsync-len = <60>;
 496                                 vsync-len = <10>;
 497                         };
 498                 };
 499         };
 500 };
 501
 502 &pcie {
 503         reset-gpio = <&gpio1 29 0>;
 504         status = "okay";
 505
 506         eth1: sky2@8 { /* MAC/PHY on bus 8 */
 507                 compatible = "marvell,sky2";
 508         };
 509 };
 510
 511 &ssi1 {
 512         fsl,mode = "i2s-slave";
 513         status = "okay";
 514 };
 515
 516 &uart1 {
 517         pinctrl-names = "default";
 518         pinctrl-0 = <&pinctrl_uart1>;
 519         status = "okay";
 520 };
 521
 522 &uart2 {
 523         pinctrl-names = "default";
 524         pinctrl-0 = <&pinctrl_uart2>;
 525         status = "okay";
 526 };
 527
 528 &uart5 {
 529         pinctrl-names = "default";
 530         pinctrl-0 = <&pinctrl_uart5>;
 531         status = "okay";
 532 };
 533
 534 &usbotg {
 535         vbus-supply = <&reg_usb_otg_vbus>;
 536         pinctrl-names = "default";
 537         pinctrl-0 = <&pinctrl_usbotg>;
 538         disable-over-current;
 539         status = "okay";
 540 };
 541
 542 &usbh1 {
 543         vbus-supply = <&reg_usb_h1_vbus>;
 544         status = "okay";
 545 };
 546
 547 &usdhc3 {
 548         pinctrl-names = "default";
 549         pinctrl-0 = <&pinctrl_usdhc3>;
 550         cd-gpios = <&gpio7 0 0>;
 551         vmmc-supply = <&reg_3p3v>;
 552         status = "okay";
 553 };