arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi

   1 /*
   2  * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 / {
  13         chosen {
  14                 linux,stdout-path = &uart4;
  15         };
  16 };
  17
  18 &fec {
  19         status = "okay";
  20 };
  21
  22 &gpmi {
  23         status = "okay";
  24 };
  25
  26 &i2c2 {
  27         pinctrl-names = "default";
  28         pinctrl-0 = <&pinctrl_i2c2>;
  29         clock-frequency = <100000>;
  30         status = "okay";
  31 };
  32
  33 &i2c3 {
  34         pinctrl-names = "default";
  35         pinctrl-0 = <&pinctrl_i2c3>;
  36         clock-frequency = <100000>;
  37         status = "okay";
  38 };
  39
  40 &uart4 {
  41         status = "okay";
  42 };
  43
  44 &usbh1 {
  45         status = "okay";
  46 };
  47
  48 &usbotg {
  49         status = "okay";
  50 };
  51
  52 &usdhc2 {
  53         status = "okay";
  54 };
  55
  56 &usdhc3 {
  57         status = "okay";
  58 };
  59
  60 &iomuxc {
  61         pinctrl_i2c2: i2c2grp {
  62                 fsl,pins = <
  63                         MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
  64                         MX6QDL_PAD_EIM_D16__I2C2_SDA            0x4001b8b1
  65                 >;
  66         };
  67
  68         pinctrl_i2c3: i2c3grp {
  69                 fsl,pins = <
  70                         MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
  71                         MX6QDL_PAD_EIM_D18__I2C3_SDA            0x4001b8b1
  72                 >;
  73         };
  74 };