arch/arm/boot/dts/imx6sl-evk.dts

   1 /*
   2  * Copyright (C) 2013 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13 #include "imx6sl.dtsi"
  14
  15 / {
  16         model = "Freescale i.MX6 SoloLite EVK Board";
  17         compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
  18
  19         memory {
  20                 reg = <0x80000000 0x40000000>;
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25                 pinctrl-names = "default";
  26                 pinctrl-0 = <&pinctrl_led>;
  27
  28                 user {
  29                         label = "debug";
  30                         gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
  31                         linux,default-trigger = "heartbeat";
  32                 };
  33         };
  34
  35         regulators {
  36                 compatible = "simple-bus";
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 reg_usb_otg1_vbus: regulator@0 {
  41                         compatible = "regulator-fixed";
  42                         reg = <0>;
  43                         regulator-name = "usb_otg1_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio4 0 0>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_usb_otg2_vbus: regulator@1 {
  51                         compatible = "regulator-fixed";
  52                         reg = <1>;
  53                         regulator-name = "usb_otg2_vbus";
  54                         regulator-min-microvolt = <5000000>;
  55                         regulator-max-microvolt = <5000000>;
  56                         gpio = <&gpio4 2 0>;
  57                         enable-active-high;
  58                 };
  59
  60                 reg_aud3v: regulator@2 {
  61                         compatible = "regulator-fixed";
  62                         reg = <2>;
  63                         regulator-name = "wm8962-supply-3v15";
  64                         regulator-min-microvolt = <3150000>;
  65                         regulator-max-microvolt = <3150000>;
  66                         regulator-boot-on;
  67                 };
  68
  69                 reg_aud4v: regulator@3 {
  70                         compatible = "regulator-fixed";
  71                         reg = <3>;
  72                         regulator-name = "wm8962-supply-4v2";
  73                         regulator-min-microvolt = <4325000>;
  74                         regulator-max-microvolt = <4325000>;
  75                         regulator-boot-on;
  76                 };
  77         };
  78
  79         sound {
  80                 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
  81                 model = "wm8962-audio";
  82                 ssi-controller = <&ssi2>;
  83                 audio-codec = <&codec>;
  84                 audio-routing =
  85                         "Headphone Jack", "HPOUTL",
  86                         "Headphone Jack", "HPOUTR",
  87                         "Ext Spk", "SPKOUTL",
  88                         "Ext Spk", "SPKOUTR",
  89                         "AMIC", "MICBIAS",
  90                         "IN3R", "AMIC";
  91                 mux-int-port = <2>;
  92                 mux-ext-port = <3>;
  93         };
  94 };
  95
  96 &audmux {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&pinctrl_audmux3>;
  99         status = "okay";
 100 };
 101
 102 &ecspi1 {
 103         fsl,spi-num-chipselects = <1>;
 104         cs-gpios = <&gpio4 11 0>;
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&pinctrl_ecspi1>;
 107         status = "okay";
 108
 109         flash: m25p80@0 {
 110                 #address-cells = <1>;
 111                 #size-cells = <1>;
 112                 compatible = "st,m25p32";
 113                 spi-max-frequency = <20000000>;
 114                 reg = <0>;
 115         };
 116 };
 117
 118 &fec {
 119         pinctrl-names = "default", "sleep";
 120         pinctrl-0 = <&pinctrl_fec>;
 121         pinctrl-1 = <&pinctrl_fec_sleep>;
 122         phy-mode = "rmii";
 123         status = "okay";
 124 };
 125
 126 &i2c1 {
 127         clock-frequency = <100000>;
 128         pinctrl-names = "default";
 129         pinctrl-0 = <&pinctrl_i2c1>;
 130         status = "okay";
 131
 132         pmic: pfuze100@08 {
 133                 compatible = "fsl,pfuze100";
 134                 reg = <0x08>;
 135
 136                 regulators {
 137                         sw1a_reg: sw1ab {
 138                                 regulator-min-microvolt = <300000>;
 139                                 regulator-max-microvolt = <1875000>;
 140                                 regulator-boot-on;
 141                                 regulator-always-on;
 142                                 regulator-ramp-delay = <6250>;
 143                         };
 144
 145                         sw1c_reg: sw1c {
 146                                 regulator-min-microvolt = <300000>;
 147                                 regulator-max-microvolt = <1875000>;
 148                                 regulator-boot-on;
 149                                 regulator-always-on;
 150                                 regulator-ramp-delay = <6250>;
 151                         };
 152
 153                         sw2_reg: sw2 {
 154                                 regulator-min-microvolt = <800000>;
 155                                 regulator-max-microvolt = <3300000>;
 156                                 regulator-boot-on;
 157                                 regulator-always-on;
 158                         };
 159
 160                         sw3a_reg: sw3a {
 161                                 regulator-min-microvolt = <400000>;
 162                                 regulator-max-microvolt = <1975000>;
 163                                 regulator-boot-on;
 164                                 regulator-always-on;
 165                         };
 166
 167                         sw3b_reg: sw3b {
 168                                 regulator-min-microvolt = <400000>;
 169                                 regulator-max-microvolt = <1975000>;
 170                                 regulator-boot-on;
 171                                 regulator-always-on;
 172                         };
 173
 174                         sw4_reg: sw4 {
 175                                 regulator-min-microvolt = <800000>;
 176                                 regulator-max-microvolt = <3300000>;
 177                         };
 178
 179                         swbst_reg: swbst {
 180                                 regulator-min-microvolt = <5000000>;
 181                                 regulator-max-microvolt = <5150000>;
 182                         };
 183
 184                         snvs_reg: vsnvs {
 185                                 regulator-min-microvolt = <1000000>;
 186                                 regulator-max-microvolt = <3000000>;
 187                                 regulator-boot-on;
 188                                 regulator-always-on;
 189                         };
 190
 191                         vref_reg: vrefddr {
 192                                 regulator-boot-on;
 193                                 regulator-always-on;
 194                         };
 195
 196                         vgen1_reg: vgen1 {
 197                                 regulator-min-microvolt = <800000>;
 198                                 regulator-max-microvolt = <1550000>;
 199                                 regulator-always-on;
 200                         };
 201
 202                         vgen2_reg: vgen2 {
 203                                 regulator-min-microvolt = <800000>;
 204                                 regulator-max-microvolt = <1550000>;
 205                         };
 206
 207                         vgen3_reg: vgen3 {
 208                                 regulator-min-microvolt = <1800000>;
 209                                 regulator-max-microvolt = <3300000>;
 210                         };
 211
 212                         vgen4_reg: vgen4 {
 213                                 regulator-min-microvolt = <1800000>;
 214                                 regulator-max-microvolt = <3300000>;
 215                                 regulator-always-on;
 216                         };
 217
 218                         vgen5_reg: vgen5 {
 219                                 regulator-min-microvolt = <1800000>;
 220                                 regulator-max-microvolt = <3300000>;
 221                                 regulator-always-on;
 222                         };
 223
 224                         vgen6_reg: vgen6 {
 225                                 regulator-min-microvolt = <1800000>;
 226                                 regulator-max-microvolt = <3300000>;
 227                                 regulator-always-on;
 228                         };
 229                 };
 230         };
 231 };
 232
 233 &i2c2 {
 234         clock-frequency = <100000>;
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&pinctrl_i2c2>;
 237         status = "okay";
 238
 239         codec: wm8962@1a {
 240                 compatible = "wlf,wm8962";
 241                 reg = <0x1a>;
 242                 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
 243                 DCVDD-supply = <&vgen3_reg>;
 244                 DBVDD-supply = <&reg_aud3v>;
 245                 AVDD-supply = <&vgen3_reg>;
 246                 CPVDD-supply = <&vgen3_reg>;
 247                 MICVDD-supply = <&reg_aud3v>;
 248                 PLLVDD-supply = <&vgen3_reg>;
 249                 SPKVDD1-supply = <&reg_aud4v>;
 250                 SPKVDD2-supply = <&reg_aud4v>;
 251         };
 252 };
 253
 254 &iomuxc {
 255         pinctrl-names = "default";
 256         pinctrl-0 = <&pinctrl_hog>;
 257
 258         imx6sl-evk {
 259                 pinctrl_hog: hoggrp {
 260                         fsl,pins = <
 261                                 MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
 262                                 MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059
 263                                 MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
 264                                 MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
 265                                 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
 266                                 MX6SL_PAD_KEY_COL4__GPIO4_IO00  0x80000000
 267                                 MX6SL_PAD_KEY_COL5__GPIO4_IO02  0x80000000
 268                                 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
 269                         >;
 270                 };
 271
 272                 pinctrl_audmux3: audmux3grp {
 273                         fsl,pins = <
 274                                 MX6SL_PAD_AUD_RXD__AUD3_RXD       0x4130b0
 275                                 MX6SL_PAD_AUD_TXC__AUD3_TXC       0x4130b0
 276                                 MX6SL_PAD_AUD_TXD__AUD3_TXD       0x4110b0
 277                                 MX6SL_PAD_AUD_TXFS__AUD3_TXFS     0x4130b0
 278                         >;
 279                 };
 280
 281                 pinctrl_ecspi1: ecspi1grp {
 282                         fsl,pins = <
 283                                 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO      0x100b1
 284                                 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI      0x100b1
 285                                 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK      0x100b1
 286                                 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11        0x80000000
 287                         >;
 288                 };
 289
 290                 pinctrl_fec: fecgrp {
 291                         fsl,pins = <
 292                                 MX6SL_PAD_FEC_MDC__FEC_MDC              0x1b0b0
 293                                 MX6SL_PAD_FEC_MDIO__FEC_MDIO            0x1b0b0
 294                                 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV         0x1b0b0
 295                                 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0        0x1b0b0
 296                                 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1        0x1b0b0
 297                                 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN          0x1b0b0
 298                                 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0        0x1b0b0
 299                                 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1        0x1b0b0
 300                                 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT      0x4001b0a8
 301                         >;
 302                 };
 303
 304                 pinctrl_fec_sleep: fecgrp-sleep {
 305                         fsl,pins = <
 306                                 MX6SL_PAD_FEC_MDC__GPIO4_IO23      0x3080
 307                                 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25   0x3080
 308                                 MX6SL_PAD_FEC_RXD0__GPIO4_IO17     0x3080
 309                                 MX6SL_PAD_FEC_RXD1__GPIO4_IO18     0x3080
 310                                 MX6SL_PAD_FEC_TX_EN__GPIO4_IO22    0x3080
 311                                 MX6SL_PAD_FEC_TXD0__GPIO4_IO24     0x3080
 312                                 MX6SL_PAD_FEC_TXD1__GPIO4_IO16     0x3080
 313                                 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26  0x3080
 314                         >;
 315                 };
 316
 317                 pinctrl_i2c1: i2c1grp {
 318                         fsl,pins = <
 319                                 MX6SL_PAD_I2C1_SCL__I2C1_SCL    0x4001b8b1
 320                                 MX6SL_PAD_I2C1_SDA__I2C1_SDA    0x4001b8b1
 321                         >;
 322                 };
 323
 324
 325                 pinctrl_i2c2: i2c2grp {
 326                         fsl,pins = <
 327                                 MX6SL_PAD_I2C2_SCL__I2C2_SCL    0x4001b8b1
 328                                 MX6SL_PAD_I2C2_SDA__I2C2_SDA    0x4001b8b1
 329                         >;
 330                 };
 331
 332                 pinctrl_led: ledgrp {
 333                         fsl,pins = <
 334                                 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
 335                         >;
 336                 };
 337
 338                 pinctrl_kpp: kppgrp {
 339                         fsl,pins = <
 340                                 MX6SL_PAD_KEY_ROW0__KEY_ROW0    0x1b010
 341                                 MX6SL_PAD_KEY_ROW1__KEY_ROW1    0x1b010
 342                                 MX6SL_PAD_KEY_ROW2__KEY_ROW2    0x1b0b0
 343                                 MX6SL_PAD_KEY_COL0__KEY_COL0    0x110b0
 344                                 MX6SL_PAD_KEY_COL1__KEY_COL1    0x110b0
 345                                 MX6SL_PAD_KEY_COL2__KEY_COL2    0x110b0
 346                         >;
 347                 };
 348
 349                 pinctrl_uart1: uart1grp {
 350                         fsl,pins = <
 351                                 MX6SL_PAD_UART1_RXD__UART1_RX_DATA      0x1b0b1
 352                                 MX6SL_PAD_UART1_TXD__UART1_TX_DATA      0x1b0b1
 353                         >;
 354                 };
 355
 356                 pinctrl_usbotg1: usbotg1grp {
 357                         fsl,pins = <
 358                                 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID      0x17059
 359                         >;
 360                 };
 361
 362                 pinctrl_usdhc1: usdhc1grp {
 363                         fsl,pins = <
 364                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x17059
 365                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x10059
 366                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x17059
 367                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x17059
 368                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x17059
 369                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x17059
 370                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x17059
 371                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x17059
 372                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x17059
 373                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x17059
 374                         >;
 375                 };
 376
 377                 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
 378                         fsl,pins = <
 379                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170b9
 380                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100b9
 381                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170b9
 382                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170b9
 383                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170b9
 384                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170b9
 385                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170b9
 386                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170b9
 387                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170b9
 388                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170b9
 389                         >;
 390                 };
 391
 392                 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
 393                         fsl,pins = <
 394                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170f9
 395                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100f9
 396                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170f9
 397                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170f9
 398                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170f9
 399                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170f9
 400                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170f9
 401                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170f9
 402                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170f9
 403                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170f9
 404                         >;
 405                 };
 406
 407                 pinctrl_usdhc2: usdhc2grp {
 408                         fsl,pins = <
 409                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x17059
 410                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x10059
 411                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x17059
 412                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x17059
 413                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x17059
 414                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x17059
 415                         >;
 416                 };
 417
 418                 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
 419                         fsl,pins = <
 420                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170b9
 421                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100b9
 422                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170b9
 423                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170b9
 424                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170b9
 425                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170b9
 426                         >;
 427                 };
 428
 429                 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
 430                         fsl,pins = <
 431                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170f9
 432                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100f9
 433                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170f9
 434                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170f9
 435                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170f9
 436                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170f9
 437                         >;
 438                 };
 439
 440                 pinctrl_usdhc3: usdhc3grp {
 441                         fsl,pins = <
 442                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x17059
 443                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x10059
 444                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x17059
 445                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x17059
 446                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x17059
 447                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x17059
 448                         >;
 449                 };
 450
 451                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 452                         fsl,pins = <
 453                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170b9
 454                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100b9
 455                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170b9
 456                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170b9
 457                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170b9
 458                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170b9
 459                         >;
 460                 };
 461
 462                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 463                         fsl,pins = <
 464                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170f9
 465                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100f9
 466                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170f9
 467                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170f9
 468                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170f9
 469                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170f9
 470                         >;
 471                 };
 472         };
 473 };
 474
 475 &kpp {
 476         pinctrl-names = "default";
 477         pinctrl-0 = <&pinctrl_kpp>;
 478         linux,keymap = <
 479                         MATRIX_KEY(0x0, 0x0, KEY_UP)         /* ROW0, COL0 */
 480                         MATRIX_KEY(0x0, 0x1, KEY_DOWN)       /* ROW0, COL1 */
 481                         MATRIX_KEY(0x0, 0x2, KEY_ENTER)      /* ROW0, COL2 */
 482                         MATRIX_KEY(0x1, 0x0, KEY_HOME)       /* ROW1, COL0 */
 483                         MATRIX_KEY(0x1, 0x1, KEY_RIGHT)      /* ROW1, COL1 */
 484                         MATRIX_KEY(0x1, 0x2, KEY_LEFT)       /* ROW1, COL2 */
 485                         MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
 486                         MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP)   /* ROW2, COL1 */
 487         >;
 488         status = "okay";
 489 };
 490
 491 &ssi2 {
 492         status = "okay";
 493 };
 494
 495 &uart1 {
 496         pinctrl-names = "default";
 497         pinctrl-0 = <&pinctrl_uart1>;
 498         status = "okay";
 499 };
 500
 501 &usbotg1 {
 502         vbus-supply = <&reg_usb_otg1_vbus>;
 503         pinctrl-names = "default";
 504         pinctrl-0 = <&pinctrl_usbotg1>;
 505         disable-over-current;
 506         status = "okay";
 507 };
 508
 509 &usbotg2 {
 510         vbus-supply = <&reg_usb_otg2_vbus>;
 511         dr_mode = "host";
 512         disable-over-current;
 513         status = "okay";
 514 };
 515
 516 &usdhc1 {
 517         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 518         pinctrl-0 = <&pinctrl_usdhc1>;
 519         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
 520         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 521         bus-width = <8>;
 522         cd-gpios = <&gpio4 7 0>;
 523         wp-gpios = <&gpio4 6 0>;
 524         status = "okay";
 525 };
 526
 527 &usdhc2 {
 528         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 529         pinctrl-0 = <&pinctrl_usdhc2>;
 530         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 531         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 532         cd-gpios = <&gpio5 0 0>;
 533         wp-gpios = <&gpio4 29 0>;
 534         status = "okay";
 535 };
 536
 537 &usdhc3 {
 538         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 539         pinctrl-0 = <&pinctrl_usdhc3>;
 540         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 541         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 542         cd-gpios = <&gpio3 22 0>;
 543         status = "okay";
 544 };