arch/arm/boot/dts/integrator.dtsi

   1 /*
   2  * SoC core Device Tree for the ARM Integrator platforms
   3  */
   4
   5 /include/ "skeleton.dtsi"
   6
   7 / {
   8         timer@13000000 {
   9                 reg = <0x13000000 0x100>;
  10                 interrupt-parent = <&pic>;
  11                 interrupts = <5>;
  12         };
  13
  14         timer@13000100 {
  15                 reg = <0x13000100 0x100>;
  16                 interrupt-parent = <&pic>;
  17                 interrupts = <6>;
  18         };
  19
  20         timer@13000200 {
  21                 reg = <0x13000200 0x100>;
  22                 interrupt-parent = <&pic>;
  23                 interrupts = <7>;
  24         };
  25
  26         pic@14000000 {
  27                 compatible = "arm,versatile-fpga-irq";
  28                 #interrupt-cells = <1>;
  29                 interrupt-controller;
  30                 reg = <0x14000000 0x100>;
  31                 clear-mask = <0xffffffff>;
  32         };
  33
  34         fpga {
  35                 compatible = "arm,amba-bus", "simple-bus";
  36                 #address-cells = <1>;
  37                 #size-cells = <1>;
  38                 ranges;
  39                 interrupt-parent = <&pic>;
  40
  41                 /*
  42                  * These PrimeCells are in the same locations and using the
  43                  * same interrupts in all Integrators, however the silicon
  44                  * version deployed is different.
  45                  */
  46                 rtc@15000000 {
  47                         reg = <0x15000000 0x1000>;
  48                         interrupts = <8>;
  49                 };
  50
  51                 uart@16000000 {
  52                         reg = <0x16000000 0x1000>;
  53                         interrupts = <1>;
  54                 };
  55
  56                 uart@17000000 {
  57                         reg = <0x17000000 0x1000>;
  58                         interrupts = <2>;
  59                 };
  60
  61                 kmi@18000000 {
  62                         reg = <0x18000000 0x1000>;
  63                         interrupts = <3>;
  64                 };
  65
  66                 kmi@19000000 {
  67                         reg = <0x19000000 0x1000>;
  68                         interrupts = <4>;
  69                 };
  70         };
  71 };