arch/arm/boot/dts/keystone-k2g.dtsi

   1 /*
   2  * Device Tree Source for K2G SOC
   3  *
   4  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <dt-bindings/interrupt-controller/arm-gic.h>
  17 #include "skeleton.dtsi"
  18
  19 / {
  20         compatible = "ti,k2g","ti,keystone";
  21         model = "Texas Instruments K2G SoC";
  22         #address-cells = <2>;
  23         #size-cells = <2>;
  24         interrupt-parent = <&gic>;
  25
  26         aliases {
  27                 serial0 = &uart0;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a15";
  36                         device_type = "cpu";
  37                         reg = <0>;
  38                 };
  39         };
  40
  41         gic: interrupt-controller@02561000 {
  42                 compatible = "arm,cortex-a15-gic";
  43                 #interrupt-cells = <3>;
  44                 interrupt-controller;
  45                 reg = <0x0 0x02561000 0x0 0x1000>,
  46                       <0x0 0x02562000 0x0 0x2000>,
  47                       <0x0 0x02564000 0x0 0x1000>,
  48                       <0x0 0x02566000 0x0 0x2000>;
  49                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  50                                 IRQ_TYPE_LEVEL_HIGH)>;
  51         };
  52
  53         timer {
  54                 compatible = "arm,armv7-timer";
  55                 interrupts =
  56                         <GIC_PPI 13
  57                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  58                         <GIC_PPI 14
  59                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  60                         <GIC_PPI 11
  61                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  62                         <GIC_PPI 10
  63                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  64         };
  65
  66         pmu {
  67                 compatible = "arm,cortex-a15-pmu";
  68                 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
  69         };
  70
  71         soc {
  72                 #address-cells = <1>;
  73                 #size-cells = <1>;
  74                 compatible = "ti,keystone","simple-bus";
  75                 ranges = <0x0 0x0 0x0 0xc0000000>;
  76                 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
  77
  78                 uart0: serial@02530c00 {
  79                         compatible = "ns16550a";
  80                         current-speed = <115200>;
  81                         reg-shift = <2>;
  82                         reg-io-width = <4>;
  83                         reg = <0x02530c00 0x100>;
  84                         interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
  85                         clock-frequency = <200000000>;
  86                         status = "disabled";
  87                 };
  88         };
  89 };