1 /include/ "skeleton.dtsi"
4 compatible = "marvell,kirkwood";
5 interrupt-parent = <&intc>;
13 compatible = "marvell,feroceon";
14 clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
15 clock-names = "cpu_clk", "ddrclk", "powersave";
23 intc: interrupt-controller {
24 compatible = "marvell,orion-intc", "marvell,intc";
26 #interrupt-cells = <1>;
27 reg = <0xf1020204 0x04>,
32 compatible = "simple-bus";
33 ranges = <0x00000000 0xf1000000 0x0100000
34 0xe0000000 0xe0000000 0x8100000 /* PCIE */
35 0xf4000000 0xf4000000 0x0000400
36 0xf5000000 0xf5000000 0x0000400>;
40 core_clk: core-clocks@10030 {
41 compatible = "marvell,kirkwood-core-clock";
47 compatible = "marvell,orion-gpio";
53 #interrupt-cells = <2>;
54 interrupts = <35>, <36>, <37>, <38>;
55 clocks = <&gate_clk 7>;
59 compatible = "marvell,orion-gpio";
65 #interrupt-cells = <2>;
66 interrupts = <39>, <40>, <41>;
67 clocks = <&gate_clk 7>;
71 compatible = "ns16550a";
72 reg = <0x12000 0x100>;
75 clocks = <&gate_clk 7>;
80 compatible = "ns16550a";
81 reg = <0x12100 0x100>;
84 clocks = <&gate_clk 7>;
89 compatible = "marvell,orion-spi";
95 clocks = <&gate_clk 7>;
99 gate_clk: clock-gating-control@2011c {
100 compatible = "marvell,kirkwood-gating-clock";
102 clocks = <&core_clk 0>;
107 compatible = "marvell,orion-wdt";
108 reg = <0x20300 0x28>;
109 clocks = <&gate_clk 7>;
114 compatible = "marvell,orion-xor";
118 clocks = <&gate_clk 8>;
134 compatible = "marvell,orion-xor";
138 clocks = <&gate_clk 16>;
154 compatible = "marvell,orion-ehci";
155 reg = <0x50000 0x1000>;
157 clocks = <&gate_clk 3>;
162 #address-cells = <1>;
167 compatible = "marvell,orion-nand";
168 reg = <0xf4000000 0x400>;
170 /* set partition map and/or chip-delay in board dts */
171 clocks = <&gate_clk 7>;
176 compatible = "marvell,mv64xxx-i2c";
177 reg = <0x11000 0x20>;
178 #address-cells = <1>;
181 clock-frequency = <100000>;
182 clocks = <&gate_clk 7>;
187 compatible = "marvell,orion-crypto";
188 reg = <0x30000 0x10000>,
190 reg-names = "regs", "sram";
192 clocks = <&gate_clk 17>;
196 mdio: mdio-bus@72004 {
197 compatible = "marvell,orion-mdio";
198 #address-cells = <1>;
200 reg = <0x72004 0x84>;
202 clocks = <&gate_clk 0>;
205 /* add phy nodes in board file */
208 eth0: ethernet-controller@72000 {
209 compatible = "marvell,kirkwood-eth";
210 #address-cells = <1>;
212 reg = <0x72000 0x4000>;
213 clocks = <&gate_clk 0>;
214 marvell,tx-checksum-limit = <1600>;
218 device_type = "network";
219 compatible = "marvell,kirkwood-eth-port";
222 /* overwrite MAC address in bootloader */
223 local-mac-address = [00 00 00 00 00 00];
224 /* set phy-handle property in board file */
228 eth1: ethernet-controller@76000 {
229 compatible = "marvell,kirkwood-eth";
230 #address-cells = <1>;
232 reg = <0x76000 0x4000>;
233 clocks = <&gate_clk 19>;
234 marvell,tx-checksum-limit = <1600>;
238 device_type = "network";
239 compatible = "marvell,kirkwood-eth-port";
242 /* overwrite MAC address in bootloader */
243 local-mac-address = [00 00 00 00 00 00];
244 /* set phy-handle property in board file */