2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include "omap36xx.dtsi"
11 #include "omap3-evm-common.dtsi"
15 model = "TI OMAP37XX EVM (TMDSEVM3730)";
16 compatible = "ti,omap3-evm-37xx", "ti,omap36xx";
19 device_type = "memory";
20 reg = <0x80000000 0x10000000>; /* 256 MB */
23 wl12xx_vmmc: wl12xx_vmmc {
24 pinctrl-names = "default";
25 pinctrl-0 = <&wl12xx_gpio>;
30 mmc1_pins: pinmux_mmc1_pins {
31 pinctrl-single,pins = <
32 0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
33 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
34 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
35 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
36 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
37 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
38 0x120 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
39 0x122 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
40 0x124 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
41 0x126 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
45 /* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
46 mmc2_pins: pinmux_mmc2_pins {
47 pinctrl-single,pins = <
48 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
49 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
50 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
51 0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
52 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
53 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
57 uart3_pins: pinmux_uart3_pins {
58 pinctrl-single,pins = <
59 0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
60 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
64 wl12xx_gpio: pinmux_wl12xx_gpio {
65 pinctrl-single,pins = <
66 0x150 (PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
67 0x14e (PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
71 smsc911x_pins: pinmux_smsc911x_pins {
72 pinctrl-single,pins = <
73 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
79 pinctrl-names = "default";
80 pinctrl-0 = <&mmc1_pins>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&mmc2_pins>;
93 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
97 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
101 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&uart3_pins>;
107 ranges = <0 0 0x00000000 0x20000000>,
108 <5 0 0x2c000000 0x01000000>;
111 linux,mtd-name= "hynix,h8kds0un0mer-4em";
113 nand-bus-width = <16>;
114 ti,nand-ecc-opt = "bch8";
116 gpmc,sync-clk-ps = <0>;
118 gpmc,cs-rd-off-ns = <44>;
119 gpmc,cs-wr-off-ns = <44>;
120 gpmc,adv-on-ns = <6>;
121 gpmc,adv-rd-off-ns = <34>;
122 gpmc,adv-wr-off-ns = <44>;
123 gpmc,we-off-ns = <40>;
124 gpmc,oe-off-ns = <54>;
125 gpmc,access-ns = <64>;
126 gpmc,rd-cycle-ns = <82>;
127 gpmc,wr-cycle-ns = <82>;
128 gpmc,wr-access-ns = <40>;
129 gpmc,wr-data-mux-bus-ns = <0>;
131 #address-cells = <1>;
140 reg = <0x80000 0x1c0000>;
143 label = "Environment";
144 reg = <0x240000 0x40000>;
148 reg = <0x280000 0x500000>;
151 label = "Filesystem";
152 reg = <0x780000 0x1f880000>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&smsc911x_pins>;