arch/arm/boot/dts/r8a73a4.dtsi

   1 /*
   2  * Device Tree Source for the r8a73a4 SoC
   3  *
   4  * Copyright (C) 2013 Renesas Solutions Corp.
   5  * Copyright (C) 2013 Magnus Damm
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14
  15 / {
  16         compatible = "renesas,r8a73a4";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a15";
  28                         reg = <0>;
  29                         clock-frequency = <1500000000>;
  30                 };
  31         };
  32
  33         timer {
  34                 compatible = "arm,armv7-timer";
  35                 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  36                              <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  37                              <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  38                              <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  39         };
  40
  41         dmac: dma-multiplexer {
  42                 compatible = "renesas,shdma-mux";
  43                 #dma-cells = <1>;
  44                 dma-channels = <20>;
  45                 dma-requests = <256>;
  46                 #address-cells = <2>;
  47                 #size-cells = <2>;
  48                 ranges;
  49
  50                 dma0: dma-controller@e6700020 {
  51                         compatible = "renesas,shdma-r8a73a4";
  52                         reg = <0 0xe6700020 0 0x89e0>;
  53                         interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
  54                                         0 200 IRQ_TYPE_LEVEL_HIGH
  55                                         0 201 IRQ_TYPE_LEVEL_HIGH
  56                                         0 202 IRQ_TYPE_LEVEL_HIGH
  57                                         0 203 IRQ_TYPE_LEVEL_HIGH
  58                                         0 204 IRQ_TYPE_LEVEL_HIGH
  59                                         0 205 IRQ_TYPE_LEVEL_HIGH
  60                                         0 206 IRQ_TYPE_LEVEL_HIGH
  61                                         0 207 IRQ_TYPE_LEVEL_HIGH
  62                                         0 208 IRQ_TYPE_LEVEL_HIGH
  63                                         0 209 IRQ_TYPE_LEVEL_HIGH
  64                                         0 210 IRQ_TYPE_LEVEL_HIGH
  65                                         0 211 IRQ_TYPE_LEVEL_HIGH
  66                                         0 212 IRQ_TYPE_LEVEL_HIGH
  67                                         0 213 IRQ_TYPE_LEVEL_HIGH
  68                                         0 214 IRQ_TYPE_LEVEL_HIGH
  69                                         0 215 IRQ_TYPE_LEVEL_HIGH
  70                                         0 216 IRQ_TYPE_LEVEL_HIGH
  71                                         0 217 IRQ_TYPE_LEVEL_HIGH
  72                                         0 218 IRQ_TYPE_LEVEL_HIGH
  73                                         0 219 IRQ_TYPE_LEVEL_HIGH>;
  74                         interrupt-names = "error",
  75                                         "ch0", "ch1", "ch2", "ch3",
  76                                         "ch4", "ch5", "ch6", "ch7",
  77                                         "ch8", "ch9", "ch10", "ch11",
  78                                         "ch12", "ch13", "ch14", "ch15",
  79                                         "ch16", "ch17", "ch18", "ch19";
  80                 };
  81         };
  82
  83         pfc: pfc@e6050000 {
  84                 compatible = "renesas,pfc-r8a73a4";
  85                 reg = <0 0xe6050000 0 0x9000>;
  86                 gpio-controller;
  87                 #gpio-cells = <2>;
  88                 interrupts-extended =
  89                         <&irqc0  0 0>, <&irqc0  1 0>, <&irqc0  2 0>, <&irqc0  3 0>,
  90                         <&irqc0  4 0>, <&irqc0  5 0>, <&irqc0  6 0>, <&irqc0  7 0>,
  91                         <&irqc0  8 0>, <&irqc0  9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
  92                         <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
  93                         <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
  94                         <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
  95                         <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
  96                         <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
  97                         <&irqc1  0 0>, <&irqc1  1 0>, <&irqc1  2 0>, <&irqc1  3 0>,
  98                         <&irqc1  4 0>, <&irqc1  5 0>, <&irqc1  6 0>, <&irqc1  7 0>,
  99                         <&irqc1  8 0>, <&irqc1  9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
 100                         <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
 101                         <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
 102                         <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
 103                         <&irqc1 24 0>, <&irqc1 25 0>;
 104         };
 105
 106         i2c5: i2c@e60b0000 {
 107                 #address-cells = <1>;
 108                 #size-cells = <0>;
 109                 compatible = "renesas,rmobile-iic";
 110                 reg = <0 0xe60b0000 0 0x428>;
 111                 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
 112                 status = "disabled";
 113         };
 114
 115         irqc0: interrupt-controller@e61c0000 {
 116                 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
 117                 #interrupt-cells = <2>;
 118                 interrupt-controller;
 119                 reg = <0 0xe61c0000 0 0x200>;
 120                 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
 121                              <0 1 IRQ_TYPE_LEVEL_HIGH>,
 122                              <0 2 IRQ_TYPE_LEVEL_HIGH>,
 123                              <0 3 IRQ_TYPE_LEVEL_HIGH>,
 124                              <0 4 IRQ_TYPE_LEVEL_HIGH>,
 125                              <0 5 IRQ_TYPE_LEVEL_HIGH>,
 126                              <0 6 IRQ_TYPE_LEVEL_HIGH>,
 127                              <0 7 IRQ_TYPE_LEVEL_HIGH>,
 128                              <0 8 IRQ_TYPE_LEVEL_HIGH>,
 129                              <0 9 IRQ_TYPE_LEVEL_HIGH>,
 130                              <0 10 IRQ_TYPE_LEVEL_HIGH>,
 131                              <0 11 IRQ_TYPE_LEVEL_HIGH>,
 132                              <0 12 IRQ_TYPE_LEVEL_HIGH>,
 133                              <0 13 IRQ_TYPE_LEVEL_HIGH>,
 134                              <0 14 IRQ_TYPE_LEVEL_HIGH>,
 135                              <0 15 IRQ_TYPE_LEVEL_HIGH>,
 136                              <0 16 IRQ_TYPE_LEVEL_HIGH>,
 137                              <0 17 IRQ_TYPE_LEVEL_HIGH>,
 138                              <0 18 IRQ_TYPE_LEVEL_HIGH>,
 139                              <0 19 IRQ_TYPE_LEVEL_HIGH>,
 140                              <0 20 IRQ_TYPE_LEVEL_HIGH>,
 141                              <0 21 IRQ_TYPE_LEVEL_HIGH>,
 142                              <0 22 IRQ_TYPE_LEVEL_HIGH>,
 143                              <0 23 IRQ_TYPE_LEVEL_HIGH>,
 144                              <0 24 IRQ_TYPE_LEVEL_HIGH>,
 145                              <0 25 IRQ_TYPE_LEVEL_HIGH>,
 146                              <0 26 IRQ_TYPE_LEVEL_HIGH>,
 147                              <0 27 IRQ_TYPE_LEVEL_HIGH>,
 148                              <0 28 IRQ_TYPE_LEVEL_HIGH>,
 149                              <0 29 IRQ_TYPE_LEVEL_HIGH>,
 150                              <0 30 IRQ_TYPE_LEVEL_HIGH>,
 151                              <0 31 IRQ_TYPE_LEVEL_HIGH>;
 152         };
 153
 154         irqc1: interrupt-controller@e61c0200 {
 155                 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
 156                 #interrupt-cells = <2>;
 157                 interrupt-controller;
 158                 reg = <0 0xe61c0200 0 0x200>;
 159                 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
 160                              <0 33 IRQ_TYPE_LEVEL_HIGH>,
 161                              <0 34 IRQ_TYPE_LEVEL_HIGH>,
 162                              <0 35 IRQ_TYPE_LEVEL_HIGH>,
 163                              <0 36 IRQ_TYPE_LEVEL_HIGH>,
 164                              <0 37 IRQ_TYPE_LEVEL_HIGH>,
 165                              <0 38 IRQ_TYPE_LEVEL_HIGH>,
 166                              <0 39 IRQ_TYPE_LEVEL_HIGH>,
 167                              <0 40 IRQ_TYPE_LEVEL_HIGH>,
 168                              <0 41 IRQ_TYPE_LEVEL_HIGH>,
 169                              <0 42 IRQ_TYPE_LEVEL_HIGH>,
 170                              <0 43 IRQ_TYPE_LEVEL_HIGH>,
 171                              <0 44 IRQ_TYPE_LEVEL_HIGH>,
 172                              <0 45 IRQ_TYPE_LEVEL_HIGH>,
 173                              <0 46 IRQ_TYPE_LEVEL_HIGH>,
 174                              <0 47 IRQ_TYPE_LEVEL_HIGH>,
 175                              <0 48 IRQ_TYPE_LEVEL_HIGH>,
 176                              <0 49 IRQ_TYPE_LEVEL_HIGH>,
 177                              <0 50 IRQ_TYPE_LEVEL_HIGH>,
 178                              <0 51 IRQ_TYPE_LEVEL_HIGH>,
 179                              <0 52 IRQ_TYPE_LEVEL_HIGH>,
 180                              <0 53 IRQ_TYPE_LEVEL_HIGH>,
 181                              <0 54 IRQ_TYPE_LEVEL_HIGH>,
 182                              <0 55 IRQ_TYPE_LEVEL_HIGH>,
 183                              <0 56 IRQ_TYPE_LEVEL_HIGH>,
 184                              <0 57 IRQ_TYPE_LEVEL_HIGH>;
 185         };
 186
 187         thermal@e61f0000 {
 188                 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
 189                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
 190                          <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
 191                 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
 192         };
 193
 194         i2c0: i2c@e6500000 {
 195                 #address-cells = <1>;
 196                 #size-cells = <0>;
 197                 compatible = "renesas,rmobile-iic";
 198                 reg = <0 0xe6500000 0 0x428>;
 199                 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
 200                 status = "disabled";
 201         };
 202
 203         i2c1: i2c@e6510000 {
 204                 #address-cells = <1>;
 205                 #size-cells = <0>;
 206                 compatible = "renesas,rmobile-iic";
 207                 reg = <0 0xe6510000 0 0x428>;
 208                 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
 209                 status = "disabled";
 210         };
 211
 212         i2c2: i2c@e6520000 {
 213                 #address-cells = <1>;
 214                 #size-cells = <0>;
 215                 compatible = "renesas,rmobile-iic";
 216                 reg = <0 0xe6520000 0 0x428>;
 217                 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
 218                 status = "disabled";
 219         };
 220
 221         i2c3: i2c@e6530000 {
 222                 #address-cells = <1>;
 223                 #size-cells = <0>;
 224                 compatible = "renesas,rmobile-iic";
 225                 reg = <0 0xe6530000 0 0x428>;
 226                 interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
 227                 status = "disabled";
 228         };
 229
 230         i2c4: i2c@e6540000 {
 231                 #address-cells = <1>;
 232                 #size-cells = <0>;
 233                 compatible = "renesas,rmobile-iic";
 234                 reg = <0 0xe6540000 0 0x428>;
 235                 interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
 236                 status = "disabled";
 237         };
 238
 239         i2c6: i2c@e6550000 {
 240                 #address-cells = <1>;
 241                 #size-cells = <0>;
 242                 compatible = "renesas,rmobile-iic";
 243                 reg = <0 0xe6550000 0 0x428>;
 244                 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
 245                 status = "disabled";
 246         };
 247
 248         i2c7: i2c@e6560000 {
 249                 #address-cells = <1>;
 250                 #size-cells = <0>;
 251                 compatible = "renesas,rmobile-iic";
 252                 reg = <0 0xe6560000 0 0x428>;
 253                 interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
 254                 status = "disabled";
 255         };
 256
 257         i2c8: i2c@e6570000 {
 258                 #address-cells = <1>;
 259                 #size-cells = <0>;
 260                 compatible = "renesas,rmobile-iic";
 261                 reg = <0 0xe6570000 0 0x428>;
 262                 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
 263                 status = "disabled";
 264         };
 265
 266         scifb2: serial@e6c20000 {
 267                 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
 268                 reg = <0 0xe6c20000 0 0x100>;
 269                 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
 270                 status = "disabled";
 271         };
 272
 273         scifb3: serial@e6c30000 {
 274                 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
 275                 reg = <0 0xe6c30000 0 0x100>;
 276                 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
 277                 status = "disabled";
 278         };
 279
 280         scifa0: serial@e6c40000 {
 281                 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
 282                 reg = <0 0xe6c40000 0 0x100>;
 283                 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
 284                 status = "disabled";
 285         };
 286
 287         scifa1: serial@e6c50000 {
 288                 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
 289                 reg = <0 0xe6c50000 0 0x100>;
 290                 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
 291                 status = "disabled";
 292         };
 293
 294         scifb4: serial@e6ce0000 {
 295                 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
 296                 reg = <0 0xe6ce0000 0 0x100>;
 297                 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
 298                 status = "disabled";
 299         };
 300
 301         scifb5: serial@e6cf0000 {
 302                 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
 303                 reg = <0 0xe6cf0000 0 0x100>;
 304                 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
 305                 status = "disabled";
 306         };
 307
 308         sdhi0: sd@ee100000 {
 309                 compatible = "renesas,sdhi-r8a73a4";
 310                 reg = <0 0xee100000 0 0x100>;
 311                 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
 312                 cap-sd-highspeed;
 313                 status = "disabled";
 314         };
 315
 316         sdhi1: sd@ee120000 {
 317                 compatible = "renesas,sdhi-r8a73a4";
 318                 reg = <0 0xee120000 0 0x100>;
 319                 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
 320                 cap-sd-highspeed;
 321                 status = "disabled";
 322         };
 323
 324         sdhi2: sd@ee140000 {
 325                 compatible = "renesas,sdhi-r8a73a4";
 326                 reg = <0 0xee140000 0 0x100>;
 327                 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
 328                 cap-sd-highspeed;
 329                 status = "disabled";
 330         };
 331
 332         mmcif0: mmc@ee200000 {
 333                 compatible = "renesas,sh-mmcif";
 334                 reg = <0 0xee200000 0 0x80>;
 335                 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
 336                 reg-io-width = <4>;
 337                 status = "disabled";
 338         };
 339
 340         mmcif1: mmc@ee220000 {
 341                 compatible = "renesas,sh-mmcif";
 342                 reg = <0 0xee220000 0 0x80>;
 343                 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
 344                 reg-io-width = <4>;
 345                 status = "disabled";
 346         };
 347
 348         gic: interrupt-controller@f1001000 {
 349                 compatible = "arm,cortex-a15-gic";
 350                 #interrupt-cells = <3>;
 351                 #address-cells = <0>;
 352                 interrupt-controller;
 353                 reg = <0 0xf1001000 0 0x1000>,
 354                         <0 0xf1002000 0 0x1000>,
 355                         <0 0xf1004000 0 0x2000>,
 356                         <0 0xf1006000 0 0x2000>;
 357                 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 358         };
 359 };