arch/arm/boot/dts/sama5d3.dtsi

   1 /*
   2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
   3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
   4  *
   5  *  Copyright (C) 2013 Atmel,
   6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/dma/at91.h>
  13 #include <dt-bindings/pinctrl/at91.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         model = "Atmel SAMA5D3 family SoC";
  19         compatible = "atmel,sama5d3", "atmel,sama5";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 gpio0 = &pioA;
  29                 gpio1 = &pioB;
  30                 gpio2 = &pioC;
  31                 gpio3 = &pioD;
  32                 gpio4 = &pioE;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 ssc1 = &ssc1;
  40         };
  41         cpus {
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a5";
  47                         reg = <0x0>;
  48                 };
  49         };
  50
  51         pmu {
  52                 compatible = "arm,cortex-a5-pmu";
  53                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
  54         };
  55
  56         memory {
  57                 reg = <0x20000000 0x8000000>;
  58         };
  59
  60         ahb {
  61                 compatible = "simple-bus";
  62                 #address-cells = <1>;
  63                 #size-cells = <1>;
  64                 ranges;
  65
  66                 apb {
  67                         compatible = "simple-bus";
  68                         #address-cells = <1>;
  69                         #size-cells = <1>;
  70                         ranges;
  71
  72                         mmc0: mmc@f0000000 {
  73                                 compatible = "atmel,hsmci";
  74                                 reg = <0xf0000000 0x600>;
  75                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
  76                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
  77                                 dma-names = "rxtx";
  78                                 pinctrl-names = "default";
  79                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
  80                                 status = "disabled";
  81                                 #address-cells = <1>;
  82                                 #size-cells = <0>;
  83                         };
  84
  85                         spi0: spi@f0004000 {
  86                                 #address-cells = <1>;
  87                                 #size-cells = <0>;
  88                                 compatible = "atmel,at91rm9200-spi";
  89                                 reg = <0xf0004000 0x100>;
  90                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
  91                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
  92                                        <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
  93                                 dma-names = "tx", "rx";
  94                                 pinctrl-names = "default";
  95                                 pinctrl-0 = <&pinctrl_spi0>;
  96                                 status = "disabled";
  97                         };
  98
  99                         ssc0: ssc@f0008000 {
 100                                 compatible = "atmel,at91sam9g45-ssc";
 101                                 reg = <0xf0008000 0x4000>;
 102                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
 103                                 pinctrl-names = "default";
 104                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 105                                 status = "disabled";
 106                         };
 107
 108                         can0: can@f000c000 {
 109                                 compatible = "atmel,at91sam9x5-can";
 110                                 reg = <0xf000c000 0x300>;
 111                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
 112                                 pinctrl-names = "default";
 113                                 pinctrl-0 = <&pinctrl_can0_rx_tx>;
 114                                 status = "disabled";
 115                         };
 116
 117                         tcb0: timer@f0010000 {
 118                                 compatible = "atmel,at91sam9x5-tcb";
 119                                 reg = <0xf0010000 0x100>;
 120                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 121                         };
 122
 123                         i2c0: i2c@f0014000 {
 124                                 compatible = "atmel,at91sam9x5-i2c";
 125                                 reg = <0xf0014000 0x4000>;
 126                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
 127                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
 128                                        <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
 129                                 dma-names = "tx", "rx";
 130                                 pinctrl-names = "default";
 131                                 pinctrl-0 = <&pinctrl_i2c0>;
 132                                 #address-cells = <1>;
 133                                 #size-cells = <0>;
 134                                 status = "disabled";
 135                         };
 136
 137                         i2c1: i2c@f0018000 {
 138                                 compatible = "atmel,at91sam9x5-i2c";
 139                                 reg = <0xf0018000 0x4000>;
 140                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
 141                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
 142                                        <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
 143                                 dma-names = "tx", "rx";
 144                                 pinctrl-names = "default";
 145                                 pinctrl-0 = <&pinctrl_i2c1>;
 146                                 #address-cells = <1>;
 147                                 #size-cells = <0>;
 148                                 status = "disabled";
 149                         };
 150
 151                         usart0: serial@f001c000 {
 152                                 compatible = "atmel,at91sam9260-usart";
 153                                 reg = <0xf001c000 0x100>;
 154                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 155                                 pinctrl-names = "default";
 156                                 pinctrl-0 = <&pinctrl_usart0>;
 157                                 status = "disabled";
 158                         };
 159
 160                         usart1: serial@f0020000 {
 161                                 compatible = "atmel,at91sam9260-usart";
 162                                 reg = <0xf0020000 0x100>;
 163                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 164                                 pinctrl-names = "default";
 165                                 pinctrl-0 = <&pinctrl_usart1>;
 166                                 status = "disabled";
 167                         };
 168
 169                         macb0: ethernet@f0028000 {
 170                                 compatible = "cdns,pc302-gem", "cdns,gem";
 171                                 reg = <0xf0028000 0x100>;
 172                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
 173                                 pinctrl-names = "default";
 174                                 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
 175                                 status = "disabled";
 176                         };
 177
 178                         isi: isi@f0034000 {
 179                                 compatible = "atmel,at91sam9g45-isi";
 180                                 reg = <0xf0034000 0x4000>;
 181                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
 182                                 status = "disabled";
 183                         };
 184
 185                         mmc1: mmc@f8000000 {
 186                                 compatible = "atmel,hsmci";
 187                                 reg = <0xf8000000 0x600>;
 188                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
 189                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
 190                                 dma-names = "rxtx";
 191                                 pinctrl-names = "default";
 192                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 193                                 status = "disabled";
 194                                 #address-cells = <1>;
 195                                 #size-cells = <0>;
 196                         };
 197
 198                         mmc2: mmc@f8004000 {
 199                                 compatible = "atmel,hsmci";
 200                                 reg = <0xf8004000 0x600>;
 201                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
 202                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>;
 203                                 dma-names = "rxtx";
 204                                 pinctrl-names = "default";
 205                                 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
 206                                 status = "disabled";
 207                                 #address-cells = <1>;
 208                                 #size-cells = <0>;
 209                         };
 210
 211                         spi1: spi@f8008000 {
 212                                 #address-cells = <1>;
 213                                 #size-cells = <0>;
 214                                 compatible = "atmel,at91rm9200-spi";
 215                                 reg = <0xf8008000 0x100>;
 216                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
 217                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
 218                                        <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
 219                                 dma-names = "tx", "rx";
 220                                 pinctrl-names = "default";
 221                                 pinctrl-0 = <&pinctrl_spi1>;
 222                                 status = "disabled";
 223                         };
 224
 225                         ssc1: ssc@f800c000 {
 226                                 compatible = "atmel,at91sam9g45-ssc";
 227                                 reg = <0xf800c000 0x4000>;
 228                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
 229                                 pinctrl-names = "default";
 230                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 231                                 status = "disabled";
 232                         };
 233
 234                         can1: can@f8010000 {
 235                                 compatible = "atmel,at91sam9x5-can";
 236                                 reg = <0xf8010000 0x300>;
 237                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
 238                                 pinctrl-names = "default";
 239                                 pinctrl-0 = <&pinctrl_can1_rx_tx>;
 240                         };
 241
 242                         tcb1: timer@f8014000 {
 243                                 compatible = "atmel,at91sam9x5-tcb";
 244                                 reg = <0xf8014000 0x100>;
 245                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
 246                         };
 247
 248                         adc0: adc@f8018000 {
 249                                 compatible = "atmel,at91sam9260-adc";
 250                                 reg = <0xf8018000 0x100>;
 251                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 252                                 pinctrl-names = "default";
 253                                 pinctrl-0 = <
 254                                         &pinctrl_adc0_adtrg
 255                                         &pinctrl_adc0_ad0
 256                                         &pinctrl_adc0_ad1
 257                                         &pinctrl_adc0_ad2
 258                                         &pinctrl_adc0_ad3
 259                                         &pinctrl_adc0_ad4
 260                                         &pinctrl_adc0_ad5
 261                                         &pinctrl_adc0_ad6
 262                                         &pinctrl_adc0_ad7
 263                                         &pinctrl_adc0_ad8
 264                                         &pinctrl_adc0_ad9
 265                                         &pinctrl_adc0_ad10
 266                                         &pinctrl_adc0_ad11
 267                                         >;
 268                                 atmel,adc-channel-base = <0x50>;
 269                                 atmel,adc-channels-used = <0xfff>;
 270                                 atmel,adc-drdy-mask = <0x1000000>;
 271                                 atmel,adc-num-channels = <12>;
 272                                 atmel,adc-startup-time = <40>;
 273                                 atmel,adc-status-register = <0x30>;
 274                                 atmel,adc-trigger-register = <0xc0>;
 275                                 atmel,adc-use-external;
 276                                 atmel,adc-vref = <3000>;
 277                                 atmel,adc-res = <10 12>;
 278                                 atmel,adc-res-names = "lowres", "highres";
 279                                 status = "disabled";
 280
 281                                 trigger@0 {
 282                                         trigger-name = "external-rising";
 283                                         trigger-value = <0x1>;
 284                                         trigger-external;
 285                                 };
 286                                 trigger@1 {
 287                                         trigger-name = "external-falling";
 288                                         trigger-value = <0x2>;
 289                                         trigger-external;
 290                                 };
 291                                 trigger@2 {
 292                                         trigger-name = "external-any";
 293                                         trigger-value = <0x3>;
 294                                         trigger-external;
 295                                 };
 296                                 trigger@3 {
 297                                         trigger-name = "continuous";
 298                                         trigger-value = <0x6>;
 299                                 };
 300                         };
 301
 302                         tsadcc: tsadcc@f8018000 {
 303                                 compatible = "atmel,at91sam9x5-tsadcc";
 304                                 reg = <0xf8018000 0x4000>;
 305                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 306                                 atmel,tsadcc_clock = <300000>;
 307                                 atmel,filtering_average = <0x03>;
 308                                 atmel,pendet_debounce = <0x08>;
 309                                 atmel,pendet_sensitivity = <0x02>;
 310                                 atmel,ts_sample_hold_time = <0x0a>;
 311                                 status = "disabled";
 312                         };
 313
 314                         i2c2: i2c@f801c000 {
 315                                 compatible = "atmel,at91sam9x5-i2c";
 316                                 reg = <0xf801c000 0x4000>;
 317                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
 318                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
 319                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
 320                                 dma-names = "tx", "rx";
 321                                 #address-cells = <1>;
 322                                 #size-cells = <0>;
 323                                 status = "disabled";
 324                         };
 325
 326                         usart2: serial@f8020000 {
 327                                 compatible = "atmel,at91sam9260-usart";
 328                                 reg = <0xf8020000 0x100>;
 329                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 330                                 pinctrl-names = "default";
 331                                 pinctrl-0 = <&pinctrl_usart2>;
 332                                 status = "disabled";
 333                         };
 334
 335                         usart3: serial@f8024000 {
 336                                 compatible = "atmel,at91sam9260-usart";
 337                                 reg = <0xf8024000 0x100>;
 338                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 339                                 pinctrl-names = "default";
 340                                 pinctrl-0 = <&pinctrl_usart3>;
 341                                 status = "disabled";
 342                         };
 343
 344                         macb1: ethernet@f802c000 {
 345                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 346                                 reg = <0xf802c000 0x100>;
 347                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
 348                                 pinctrl-names = "default";
 349                                 pinctrl-0 = <&pinctrl_macb1_rmii>;
 350                                 status = "disabled";
 351                         };
 352
 353                         sha@f8034000 {
 354                                 compatible = "atmel,sam9g46-sha";
 355                                 reg = <0xf8034000 0x100>;
 356                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
 357                         };
 358
 359                         aes@f8038000 {
 360                                 compatible = "atmel,sam9g46-aes";
 361                                 reg = <0xf8038000 0x100>;
 362                                 interrupts = <43 4 0>;
 363                         };
 364
 365                         tdes@f803c000 {
 366                                 compatible = "atmel,sam9g46-tdes";
 367                                 reg = <0xf803c000 0x100>;
 368                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
 369                         };
 370
 371                         dma0: dma-controller@ffffe600 {
 372                                 compatible = "atmel,at91sam9g45-dma";
 373                                 reg = <0xffffe600 0x200>;
 374                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
 375                                 #dma-cells = <2>;
 376                         };
 377
 378                         dma1: dma-controller@ffffe800 {
 379                                 compatible = "atmel,at91sam9g45-dma";
 380                                 reg = <0xffffe800 0x200>;
 381                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 382                                 #dma-cells = <2>;
 383                         };
 384
 385                         ramc0: ramc@ffffea00 {
 386                                 compatible = "atmel,at91sam9g45-ddramc";
 387                                 reg = <0xffffea00 0x200>;
 388                         };
 389
 390                         dbgu: serial@ffffee00 {
 391                                 compatible = "atmel,at91sam9260-usart";
 392                                 reg = <0xffffee00 0x200>;
 393                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 394                                 pinctrl-names = "default";
 395                                 pinctrl-0 = <&pinctrl_dbgu>;
 396                                 status = "disabled";
 397                         };
 398
 399                         aic: interrupt-controller@fffff000 {
 400                                 #interrupt-cells = <3>;
 401                                 compatible = "atmel,sama5d3-aic";
 402                                 interrupt-controller;
 403                                 reg = <0xfffff000 0x200>;
 404                                 atmel,external-irqs = <47>;
 405                         };
 406
 407                         pinctrl@fffff200 {
 408                                 #address-cells = <1>;
 409                                 #size-cells = <1>;
 410                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 411                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 412                                 atmel,mux-mask = <
 413                                         /*   A          B          C  */
 414                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
 415                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
 416                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
 417                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
 418                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
 419                                         >;
 420
 421                                 /* shared pinctrl settings */
 422                                 adc0 {
 423                                         pinctrl_adc0_adtrg: adc0_adtrg {
 424                                                 atmel,pins =
 425                                                         <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
 426                                         };
 427                                         pinctrl_adc0_ad0: adc0_ad0 {
 428                                                 atmel,pins =
 429                                                         <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
 430                                         };
 431                                         pinctrl_adc0_ad1: adc0_ad1 {
 432                                                 atmel,pins =
 433                                                         <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
 434                                         };
 435                                         pinctrl_adc0_ad2: adc0_ad2 {
 436                                                 atmel,pins =
 437                                                         <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
 438                                         };
 439                                         pinctrl_adc0_ad3: adc0_ad3 {
 440                                                 atmel,pins =
 441                                                         <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
 442                                         };
 443                                         pinctrl_adc0_ad4: adc0_ad4 {
 444                                                 atmel,pins =
 445                                                         <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
 446                                         };
 447                                         pinctrl_adc0_ad5: adc0_ad5 {
 448                                                 atmel,pins =
 449                                                         <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
 450                                         };
 451                                         pinctrl_adc0_ad6: adc0_ad6 {
 452                                                 atmel,pins =
 453                                                         <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
 454                                         };
 455                                         pinctrl_adc0_ad7: adc0_ad7 {
 456                                                 atmel,pins =
 457                                                         <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
 458                                         };
 459                                         pinctrl_adc0_ad8: adc0_ad8 {
 460                                                 atmel,pins =
 461                                                         <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
 462                                         };
 463                                         pinctrl_adc0_ad9: adc0_ad9 {
 464                                                 atmel,pins =
 465                                                         <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
 466                                         };
 467                                         pinctrl_adc0_ad10: adc0_ad10 {
 468                                                 atmel,pins =
 469                                                         <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
 470                                         };
 471                                         pinctrl_adc0_ad11: adc0_ad11 {
 472                                                 atmel,pins =
 473                                                         <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
 474                                         };
 475                                 };
 476
 477                                 can0 {
 478                                         pinctrl_can0_rx_tx: can0_rx_tx {
 479                                                 atmel,pins =
 480                                                         <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
 481                                                          AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
 482                                         };
 483                                 };
 484
 485                                 can1 {
 486                                         pinctrl_can1_rx_tx: can1_rx_tx {
 487                                                 atmel,pins =
 488                                                         <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB14 periph B RX, conflicts with GCRS */
 489                                                          AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
 490                                         };
 491                                 };
 492
 493                                 dbgu {
 494                                         pinctrl_dbgu: dbgu-0 {
 495                                                 atmel,pins =
 496                                                         <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB30 periph A */
 497                                                          AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB31 periph A with pullup */
 498                                         };
 499                                 };
 500
 501                                 i2c0 {
 502                                         pinctrl_i2c0: i2c0-0 {
 503                                                 atmel,pins =
 504                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
 505                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
 506                                         };
 507                                 };
 508
 509                                 i2c1 {
 510                                         pinctrl_i2c1: i2c1-0 {
 511                                                 atmel,pins =
 512                                                         <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
 513                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
 514                                         };
 515                                 };
 516
 517                                 isi {
 518                                         pinctrl_isi: isi-0 {
 519                                                 atmel,pins =
 520                                                         <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
 521                                                          AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
 522                                                          AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
 523                                                          AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
 524                                                          AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
 525                                                          AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
 526                                                          AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
 527                                                          AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
 528                                                          AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
 529                                                          AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
 530                                                          AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
 531                                                          AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
 532                                                          AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
 533                                         };
 534                                         pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
 535                                                 atmel,pins =
 536                                                         <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
 537                                         };
 538                                 };
 539
 540                                 lcd {
 541                                         pinctrl_lcd: lcd-0 {
 542                                                 atmel,pins =
 543                                                         <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA24 periph A LCDPWM */
 544                                                          AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA26 periph A LCDVSYNC */
 545                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA27 periph A LCDHSYNC */
 546                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA25 periph A LCDDISP */
 547                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA29 periph A LCDDEN */
 548                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA28 periph A LCDPCK */
 549                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A LCDD0 pin */
 550                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A LCDD1 pin */
 551                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA2 periph A LCDD2 pin */
 552                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA3 periph A LCDD3 pin */
 553                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA4 periph A LCDD4 pin */
 554                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA5 periph A LCDD5 pin */
 555                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA6 periph A LCDD6 pin */
 556                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA7 periph A LCDD7 pin */
 557                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA8 periph A LCDD8 pin */
 558                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A LCDD9 pin */
 559                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A LCDD10 pin */
 560                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A LCDD11 pin */
 561                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A LCDD12 pin */
 562                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A LCDD13 pin */
 563                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A LCDD14 pin */
 564                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A LCDD15 pin */
 565                                                          AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC14 periph C LCDD16 pin */
 566                                                          AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC13 periph C LCDD17 pin */
 567                                                          AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC12 periph C LCDD18 pin */
 568                                                          AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC11 periph C LCDD19 pin */
 569                                                          AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC10 periph C LCDD20 pin */
 570                                                          AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC15 periph C LCDD21 pin */
 571                                                          AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PE27 periph C LCDD22 pin */
 572                                                          AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
 573                                         };
 574                                 };
 575
 576                                 macb0 {
 577                                         pinctrl_macb0_data_rgmii: macb0_data_rgmii {
 578                                                 atmel,pins =
 579                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A GTX0, conflicts with PWMH0 */
 580                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A GTX1, conflicts with PWML0 */
 581                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB2 periph A GTX2, conflicts with TK1 */
 582                                                          AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB3 periph A GTX3, conflicts with TF1 */
 583                                                          AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A GRX0, conflicts with PWMH1 */
 584                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB5 periph A GRX1, conflicts with PWML1 */
 585                                                          AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A GRX2, conflicts with TD1 */
 586                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A GRX3, conflicts with RK1 */
 587                                         };
 588                                         pinctrl_macb0_data_gmii: macb0_data_gmii {
 589                                                 atmel,pins =
 590                                                         <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB19 periph B GTX4, conflicts with MCI1_CDA */
 591                                                          AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
 592                                                          AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
 593                                                          AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
 594                                                          AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
 595                                                          AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB24 periph B GRX5, conflicts with MCI1_CK */
 596                                                          AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB25 periph B GRX6, conflicts with SCK1 */
 597                                                          AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
 598                                         };
 599                                         pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
 600                                                 atmel,pins =
 601                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB8 periph A GTXCK, conflicts with PWMH2 */
 602                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A GTXEN, conflicts with PWML2 */
 603                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A GRXCK, conflicts with RD1 */
 604                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A GRXER, conflicts with PWML3 */
 605                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A GMDC */
 606                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A GMDIO */
 607                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
 608                                         };
 609                                         pinctrl_macb0_signal_gmii: macb0_signal_gmii {
 610                                                 atmel,pins =
 611                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A GTXEN, conflicts with PWML2 */
 612                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A GTXER, conflicts with RF1 */
 613                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A GRXCK, conflicts with RD1 */
 614                                                          AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A GRXDV, conflicts with PWMH3 */
 615                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A GRXER, conflicts with PWML3 */
 616                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A GCRS, conflicts with CANRX1 */
 617                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A GCOL, conflicts with CANTX1 */
 618                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A GMDC */
 619                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A GMDIO */
 620                                                          AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
 621                                         };
 622
 623                                 };
 624
 625                                 macb1 {
 626                                         pinctrl_macb1_rmii: macb1_rmii-0 {
 627                                                 atmel,pins =
 628                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC0 periph A ETX0, conflicts with TIOA3 */
 629                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC1 periph A ETX1, conflicts with TIOB3 */
 630                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC2 periph A ERX0, conflicts with TCLK3 */
 631                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC3 periph A ERX1, conflicts with TIOA4 */
 632                                                          AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC4 periph A ETXEN, conflicts with TIOB4 */
 633                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC5 periph A ECRSDV,conflicts with TCLK4 */
 634                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 periph A ERXER, conflicts with TIOA5 */
 635                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 periph A EREFCK, conflicts with TIOB5 */
 636                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 periph A EMDC, conflicts with TCLK5 */
 637                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PC9 periph A EMDIO  */
 638                                         };
 639                                 };
 640
 641                                 mmc0 {
 642                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 643                                                 atmel,pins =
 644                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A MCI0_CK */
 645                                                          AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
 646                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD1 periph A MCI0_DA0 with pullup */
 647                                         };
 648                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 649                                                 atmel,pins =
 650                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
 651                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
 652                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD4 periph A MCI0_DA3 with pullup */
 653                                         };
 654                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
 655                                                 atmel,pins =
 656                                                         <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
 657                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
 658                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
 659                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
 660                                         };
 661                                 };
 662
 663                                 mmc1 {
 664                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
 665                                                 atmel,pins =
 666                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
 667                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
 668                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
 669                                         };
 670                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
 671                                                 atmel,pins =
 672                                                         <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
 673                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
 674                                                          AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
 675                                         };
 676                                 };
 677
 678                                 mmc2 {
 679                                         pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
 680                                                 atmel,pins =
 681                                                         <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC15 periph A MCI2_CK, conflicts with PCK2 */
 682                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC10 periph A MCI2_CDA with pullup */
 683                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PC11 periph A MCI2_DA0 with pullup */
 684                                         };
 685                                         pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
 686                                                 atmel,pins =
 687                                                         <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
 688                                                          AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
 689                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
 690                                         };
 691                                 };
 692
 693                                 nand0 {
 694                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
 695                                                 atmel,pins =
 696                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PE21 periph A with pullup */
 697                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PE22 periph A with pullup */
 698                                         };
 699                                 };
 700
 701                                 spi0 {
 702                                         pinctrl_spi0: spi0-0 {
 703                                                 atmel,pins =
 704                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A SPI0_MISO pin */
 705                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A SPI0_MOSI pin */
 706                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
 707                                         };
 708                                 };
 709
 710                                 spi1 {
 711                                         pinctrl_spi1: spi1-0 {
 712                                                 atmel,pins =
 713                                                         <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A SPI1_MISO pin */
 714                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A SPI1_MOSI pin */
 715                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
 716                                         };
 717                                 };
 718
 719                                 ssc0 {
 720                                         pinctrl_ssc0_tx: ssc0_tx {
 721                                                 atmel,pins =
 722                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A TK0 */
 723                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC17 periph A TF0 */
 724                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
 725                                         };
 726
 727                                         pinctrl_ssc0_rx: ssc0_rx {
 728                                                 atmel,pins =
 729                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A RK0 */
 730                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC20 periph A RF0 */
 731                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
 732                                         };
 733                                 };
 734
 735                                 ssc1 {
 736                                         pinctrl_ssc1_tx: ssc1_tx {
 737                                                 atmel,pins =
 738                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB2 periph B TK1, conflicts with GTX2 */
 739                                                          AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B TF1, conflicts with GTX3 */
 740                                                          AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB6 periph B TD1, conflicts with TD1 */
 741                                         };
 742
 743                                         pinctrl_ssc1_rx: ssc1_rx {
 744                                                 atmel,pins =
 745                                                         <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB7 periph B RK1, conflicts with EREFCK */
 746                                                          AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB10 periph B RF1, conflicts with GTXER */
 747                                                          AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
 748                                         };
 749                                 };
 750
 751                                 uart0 {
 752                                         pinctrl_uart0: uart0-0 {
 753                                                 atmel,pins =
 754                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
 755                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PC30 periph A with pullup, conflicts with ISI_PCK */
 756                                         };
 757                                 };
 758
 759                                 uart1 {
 760                                         pinctrl_uart1: uart1-0 {
 761                                                 atmel,pins =
 762                                                         <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
 763                                                          AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
 764                                         };
 765                                 };
 766
 767                                 usart0 {
 768                                         pinctrl_usart0: usart0-0 {
 769                                                 atmel,pins =
 770                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A */
 771                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PD18 periph A with pullup */
 772                                         };
 773
 774                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
 775                                                 atmel,pins =
 776                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
 777                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
 778                                         };
 779                                 };
 780
 781                                 usart1 {
 782                                         pinctrl_usart1: usart1-0 {
 783                                                 atmel,pins =
 784                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB28 periph A */
 785                                                          AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB29 periph A with pullup */
 786                                         };
 787
 788                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
 789                                                 atmel,pins =
 790                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB26 periph A, conflicts with GRX7 */
 791                                                          AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
 792                                         };
 793                                 };
 794
 795                                 usart2 {
 796                                         pinctrl_usart2: usart2-0 {
 797                                                 atmel,pins =
 798                                                         <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE25 periph B, conflicts with A25 */
 799                                                          AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE26 periph B with pullup, conflicts NCS0 */
 800                                         };
 801
 802                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
 803                                                 atmel,pins =
 804                                                         <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE23 periph B, conflicts with A23 */
 805                                                          AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
 806                                         };
 807                                 };
 808
 809                                 usart3 {
 810                                         pinctrl_usart3: usart3-0 {
 811                                                 atmel,pins =
 812                                                         <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE18 periph B, conflicts with A18 */
 813                                                          AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE19 periph B with pullup, conflicts with A19 */
 814                                         };
 815
 816                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
 817                                                 atmel,pins =
 818                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE16 periph B, conflicts with A16 */
 819                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
 820                                         };
 821                                 };
 822
 823
 824                                 pioA: gpio@fffff200 {
 825                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 826                                         reg = <0xfffff200 0x100>;
 827                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
 828                                         #gpio-cells = <2>;
 829                                         gpio-controller;
 830                                         interrupt-controller;
 831                                         #interrupt-cells = <2>;
 832                                 };
 833
 834                                 pioB: gpio@fffff400 {
 835                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 836                                         reg = <0xfffff400 0x100>;
 837                                         interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
 838                                         #gpio-cells = <2>;
 839                                         gpio-controller;
 840                                         interrupt-controller;
 841                                         #interrupt-cells = <2>;
 842                                 };
 843
 844                                 pioC: gpio@fffff600 {
 845                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 846                                         reg = <0xfffff600 0x100>;
 847                                         interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
 848                                         #gpio-cells = <2>;
 849                                         gpio-controller;
 850                                         interrupt-controller;
 851                                         #interrupt-cells = <2>;
 852                                 };
 853
 854                                 pioD: gpio@fffff800 {
 855                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 856                                         reg = <0xfffff800 0x100>;
 857                                         interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
 858                                         #gpio-cells = <2>;
 859                                         gpio-controller;
 860                                         interrupt-controller;
 861                                         #interrupt-cells = <2>;
 862                                 };
 863
 864                                 pioE: gpio@fffffa00 {
 865                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 866                                         reg = <0xfffffa00 0x100>;
 867                                         interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
 868                                         #gpio-cells = <2>;
 869                                         gpio-controller;
 870                                         interrupt-controller;
 871                                         #interrupt-cells = <2>;
 872                                 };
 873                         };
 874
 875                         pmc: pmc@fffffc00 {
 876                                 compatible = "atmel,at91rm9200-pmc";
 877                                 reg = <0xfffffc00 0x120>;
 878                         };
 879
 880                         rstc@fffffe00 {
 881                                 compatible = "atmel,at91sam9g45-rstc";
 882                                 reg = <0xfffffe00 0x10>;
 883                         };
 884
 885                         pit: timer@fffffe30 {
 886                                 compatible = "atmel,at91sam9260-pit";
 887                                 reg = <0xfffffe30 0xf>;
 888                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
 889                         };
 890
 891                         watchdog@fffffe40 {
 892                                 compatible = "atmel,at91sam9260-wdt";
 893                                 reg = <0xfffffe40 0x10>;
 894                                 status = "disabled";
 895                         };
 896
 897                         rtc@fffffeb0 {
 898                                 compatible = "atmel,at91rm9200-rtc";
 899                                 reg = <0xfffffeb0 0x30>;
 900                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 901                         };
 902                 };
 903
 904                 usb0: gadget@00500000 {
 905                         #address-cells = <1>;
 906                         #size-cells = <0>;
 907                         compatible = "atmel,at91sam9rl-udc";
 908                         reg = <0x00500000 0x100000
 909                                0xf8030000 0x4000>;
 910                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
 911                         status = "disabled";
 912
 913                         ep0 {
 914                                 reg = <0>;
 915                                 atmel,fifo-size = <64>;
 916                                 atmel,nb-banks = <1>;
 917                         };
 918
 919                         ep1 {
 920                                 reg = <1>;
 921                                 atmel,fifo-size = <1024>;
 922                                 atmel,nb-banks = <3>;
 923                                 atmel,can-dma;
 924                                 atmel,can-isoc;
 925                         };
 926
 927                         ep2 {
 928                                 reg = <2>;
 929                                 atmel,fifo-size = <1024>;
 930                                 atmel,nb-banks = <3>;
 931                                 atmel,can-dma;
 932                                 atmel,can-isoc;
 933                         };
 934
 935                         ep3 {
 936                                 reg = <3>;
 937                                 atmel,fifo-size = <1024>;
 938                                 atmel,nb-banks = <2>;
 939                                 atmel,can-dma;
 940                         };
 941
 942                         ep4 {
 943                                 reg = <4>;
 944                                 atmel,fifo-size = <1024>;
 945                                 atmel,nb-banks = <2>;
 946                                 atmel,can-dma;
 947                         };
 948
 949                         ep5 {
 950                                 reg = <5>;
 951                                 atmel,fifo-size = <1024>;
 952                                 atmel,nb-banks = <2>;
 953                                 atmel,can-dma;
 954                         };
 955
 956                         ep6 {
 957                                 reg = <6>;
 958                                 atmel,fifo-size = <1024>;
 959                                 atmel,nb-banks = <2>;
 960                                 atmel,can-dma;
 961                         };
 962
 963                         ep7 {
 964                                 reg = <7>;
 965                                 atmel,fifo-size = <1024>;
 966                                 atmel,nb-banks = <2>;
 967                                 atmel,can-dma;
 968                         };
 969
 970                         ep8 {
 971                                 reg = <8>;
 972                                 atmel,fifo-size = <1024>;
 973                                 atmel,nb-banks = <2>;
 974                         };
 975
 976                         ep9 {
 977                                 reg = <9>;
 978                                 atmel,fifo-size = <1024>;
 979                                 atmel,nb-banks = <2>;
 980                         };
 981
 982                         ep10 {
 983                                 reg = <10>;
 984                                 atmel,fifo-size = <1024>;
 985                                 atmel,nb-banks = <2>;
 986                         };
 987
 988                         ep11 {
 989                                 reg = <11>;
 990                                 atmel,fifo-size = <1024>;
 991                                 atmel,nb-banks = <2>;
 992                         };
 993
 994                         ep12 {
 995                                 reg = <12>;
 996                                 atmel,fifo-size = <1024>;
 997                                 atmel,nb-banks = <2>;
 998                         };
 999
1000                         ep13 {
1001                                 reg = <13>;
1002                                 atmel,fifo-size = <1024>;
1003                                 atmel,nb-banks = <2>;
1004                         };
1005
1006                         ep14 {
1007                                 reg = <14>;
1008                                 atmel,fifo-size = <1024>;
1009                                 atmel,nb-banks = <2>;
1010                         };
1011
1012                         ep15 {
1013                                 reg = <15>;
1014                                 atmel,fifo-size = <1024>;
1015                                 atmel,nb-banks = <2>;
1016                         };
1017                 };
1018
1019                 usb1: ohci@00600000 {
1020                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1021                         reg = <0x00600000 0x100000>;
1022                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1023                         status = "disabled";
1024                 };
1025
1026                 usb2: ehci@00700000 {
1027                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1028                         reg = <0x00700000 0x100000>;
1029                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1030                         status = "disabled";
1031                 };
1032
1033                 nand0: nand@60000000 {
1034                         compatible = "atmel,at91rm9200-nand";
1035                         #address-cells = <1>;
1036                         #size-cells = <1>;
1037                         ranges;
1038                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
1039                                 0xffffc070 0x00000490   /* SMC PMECC regs */
1040                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
1041                                 0x00110000 0x00018000   /* ROM code */
1042                                 >;
1043                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1044                         atmel,nand-addr-offset = <21>;
1045                         atmel,nand-cmd-offset = <22>;
1046                         pinctrl-names = "default";
1047                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1048                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1049                         status = "disabled";
1050
1051                         nfc@70000000 {
1052                                 compatible = "atmel,sama5d3-nfc";
1053                                 #address-cells = <1>;
1054                                 #size-cells = <1>;
1055                                 reg = <
1056                                         0x70000000 0x10000000   /* NFC Command Registers */
1057                                         0xffffc000 0x00000070   /* NFC HSMC regs */
1058                                         0x00200000 0x00100000   /* NFC SRAM banks */
1059                                         >;
1060                         };
1061                 };
1062         };
1063 };