3 /include/ "tegra20.dtsi"
6 model = "NVIDIA Seaboard";
7 compatible = "nvidia,seaboard", "nvidia,tegra20";
10 reg = <0x00000000 0x40000000>;
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
26 pinctrl-names = "default";
27 pinctrl-0 = <&state_default>;
29 state_default: pinmux {
32 nvidia,function = "ide";
35 nvidia,pins = "atb", "gma", "gme";
36 nvidia,function = "sdio4";
40 nvidia,function = "nand";
43 nvidia,pins = "atd", "ate", "gmb", "spia",
45 nvidia,function = "gmi";
48 nvidia,pins = "cdev1";
49 nvidia,function = "plla_out";
52 nvidia,pins = "cdev2";
53 nvidia,function = "pllp_out4";
56 nvidia,pins = "crtp", "lm1";
57 nvidia,function = "crt";
61 nvidia,function = "vi_sensor_clk";
65 nvidia,function = "dap1";
69 nvidia,function = "dap2";
73 nvidia,function = "dap3";
77 nvidia,function = "dap4";
80 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
81 nvidia,function = "vi";
85 nvidia,function = "i2c3";
89 nvidia,function = "uartd";
93 nvidia,function = "sflash";
97 nvidia,function = "pwm";
100 nvidia,pins = "gpu7";
101 nvidia,function = "rtck";
104 nvidia,pins = "gpv", "slxa", "slxk";
105 nvidia,function = "pcie";
108 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
110 nvidia,function = "hdmi";
113 nvidia,pins = "i2cp";
114 nvidia,function = "i2cp";
117 nvidia,pins = "irrx", "irtx";
118 nvidia,function = "uartb";
121 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
123 nvidia,function = "kbc";
126 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
128 nvidia,function = "rsvd4";
131 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
132 "ld5", "ld6", "ld7", "ld8", "ld9",
133 "ld10", "ld11", "ld12", "ld13", "ld14",
134 "ld15", "ld16", "ld17", "ldi", "lhp0",
135 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
136 "lspi", "lvp1", "lvs";
137 nvidia,function = "displaya";
140 nvidia,pins = "owc", "spdi", "spdo", "uac";
141 nvidia,function = "rsvd2";
145 nvidia,function = "pwr_on";
149 nvidia,function = "i2c1";
152 nvidia,pins = "sdb", "sdc", "sdd";
153 nvidia,function = "sdio3";
156 nvidia,pins = "sdio1";
157 nvidia,function = "sdio1";
160 nvidia,pins = "slxc", "slxd";
161 nvidia,function = "spdif";
164 nvidia,pins = "spid", "spie", "spif";
165 nvidia,function = "spi1";
168 nvidia,pins = "spig", "spih";
169 nvidia,function = "spi2_alt";
172 nvidia,pins = "uaa", "uab", "uda";
173 nvidia,function = "ulpi";
177 nvidia,function = "irda";
180 nvidia,pins = "uca", "ucb";
181 nvidia,function = "uartc";
184 nvidia,pins = "ata", "atb", "atc", "atd",
185 "cdev1", "cdev2", "dap1", "dap2",
186 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
187 "gme", "gpu", "gpu7", "i2cp", "irrx",
188 "irtx", "pta", "rm", "sdc", "sdd",
189 "slxd", "slxk", "spdi", "spdo", "uac",
190 "uad", "uca", "ucb", "uda";
192 nvidia,tristate = <0>;
195 nvidia,pins = "ate", "csus", "dap3",
196 "gpv", "owc", "slxc", "spib", "spid",
199 nvidia,tristate = <1>;
202 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
203 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
207 nvidia,pins = "crtp", "gmb", "slxa", "spia",
210 nvidia,tristate = <1>;
213 nvidia,pins = "dta", "dtb", "dtc", "dtd";
215 nvidia,tristate = <0>;
218 nvidia,pins = "dte", "spif";
220 nvidia,tristate = <1>;
223 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
224 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
226 nvidia,tristate = <1>;
229 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
230 "kbce", "kbcf", "sdio1", "spic", "uaa",
233 nvidia,tristate = <0>;
236 nvidia,pins = "lc", "ls";
240 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
241 "ld5", "ld6", "ld7", "ld8", "ld9",
242 "ld10", "ld11", "ld12", "ld13", "ld14",
243 "ld15", "ld16", "ld17", "ldi", "lhp0",
244 "lhp1", "lhp2", "lhs", "lm0", "lpp",
245 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
247 nvidia,tristate = <0>;
250 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
255 nvidia,pins = "drive_sdio1";
256 nvidia,high-speed-mode = <0>;
257 nvidia,schmitt = <0>;
258 nvidia,low-power-mode = <3>;
259 nvidia,pull-down-strength = <31>;
260 nvidia,pull-up-strength = <31>;
261 nvidia,slew-rate-rising = <3>;
262 nvidia,slew-rate-falling = <3>;
266 state_i2cmux_ddc: pinmux_i2cmux_ddc {
269 nvidia,function = "i2c2";
273 nvidia,function = "rsvd4";
277 state_i2cmux_pta: pinmux_i2cmux_pta {
280 nvidia,function = "rsvd4";
284 nvidia,function = "i2c2";
288 state_i2cmux_idle: pinmux_i2cmux_idle {
291 nvidia,function = "rsvd4";
295 nvidia,function = "rsvd4";
310 clock-frequency = <400000>;
313 compatible = "wlf,wm8903";
315 interrupt-parent = <&gpio>;
316 interrupts = <187 0x04>;
322 micdet-delay = <100>;
323 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
326 /* ALS and proximity sensor */
328 compatible = "isil,isl29018";
330 interrupt-parent = <&gpio>;
331 interrupts = <202 0x04>; /* GPIO PZ2 */
335 compatible = "invn,mpu3050";
337 interrupt-parent = <&gpio>;
338 interrupts = <204 0x04>; /* gpio PZ4 */
344 clock-frequency = <100000>;
348 compatible = "i2c-mux-pinctrl";
349 #address-cells = <1>;
352 i2c-parent = <&{/i2c@7000c400}>;
354 pinctrl-names = "ddc", "pta", "idle";
355 pinctrl-0 = <&state_i2cmux_ddc>;
356 pinctrl-1 = <&state_i2cmux_pta>;
357 pinctrl-2 = <&state_i2cmux_idle>;
361 #address-cells = <1>;
367 #address-cells = <1>;
371 compatible = "ti,bq20z75", "smart-battery-1.1";
373 ti,i2c-retry-count = <2>;
374 ti,poll-retry-count = <10>;
381 clock-frequency = <400000>;
386 clock-frequency = <400000>;
389 compatible = "ti,tps6586x";
391 interrupts = <0 86 0x4>;
393 ti,system-power-controller;
398 sys-supply = <&vdd_5v0_reg>;
399 vin-sm0-supply = <&sys_reg>;
400 vin-sm1-supply = <&sys_reg>;
401 vin-sm2-supply = <&sys_reg>;
402 vinldo01-supply = <&sm2_reg>;
403 vinldo23-supply = <&sm2_reg>;
404 vinldo4-supply = <&sm2_reg>;
405 vinldo678-supply = <&sm2_reg>;
406 vinldo9-supply = <&sm2_reg>;
410 regulator-name = "vdd_sys";
415 regulator-name = "vdd_sm0,vdd_core";
416 regulator-min-microvolt = <1300000>;
417 regulator-max-microvolt = <1300000>;
422 regulator-name = "vdd_sm1,vdd_cpu";
423 regulator-min-microvolt = <1125000>;
424 regulator-max-microvolt = <1125000>;
429 regulator-name = "vdd_sm2,vin_ldo*";
430 regulator-min-microvolt = <3700000>;
431 regulator-max-microvolt = <3700000>;
435 /* LDO0 is not connected to anything */
438 regulator-name = "vdd_ldo1,avdd_pll*";
439 regulator-min-microvolt = <1100000>;
440 regulator-max-microvolt = <1100000>;
445 regulator-name = "vdd_ldo2,vdd_rtc";
446 regulator-min-microvolt = <1200000>;
447 regulator-max-microvolt = <1200000>;
451 regulator-name = "vdd_ldo3,avdd_usb*";
452 regulator-min-microvolt = <3300000>;
453 regulator-max-microvolt = <3300000>;
458 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
465 regulator-name = "vdd_ldo5,vcore_mmc";
466 regulator-min-microvolt = <2850000>;
467 regulator-max-microvolt = <2850000>;
472 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
473 regulator-min-microvolt = <1800000>;
474 regulator-max-microvolt = <1800000>;
478 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
479 regulator-min-microvolt = <3300000>;
480 regulator-max-microvolt = <3300000>;
484 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
485 regulator-min-microvolt = <1800000>;
486 regulator-max-microvolt = <1800000>;
490 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
491 regulator-min-microvolt = <2850000>;
492 regulator-max-microvolt = <2850000>;
497 regulator-name = "vdd_rtc_out,vdd_cell";
498 regulator-min-microvolt = <3300000>;
499 regulator-max-microvolt = <3300000>;
505 temperature-sensor@4c {
506 compatible = "onnn,nct1008";
511 compatible = "ak,ak8975";
513 interrupt-parent = <&gpio>;
514 interrupts = <109 0x04>; /* gpio PN5 */
519 nvidia,invert-interrupt;
522 memory-controller@7000f400 {
525 compatible = "nvidia,tegra20-emc-table";
526 clock-frequency = <190000>;
527 nvidia,emc-registers = <0x0000000c 0x00000026
528 0x00000009 0x00000003 0x00000004 0x00000004
529 0x00000002 0x0000000c 0x00000003 0x00000003
530 0x00000002 0x00000001 0x00000004 0x00000005
531 0x00000004 0x00000009 0x0000000d 0x0000059f
532 0x00000000 0x00000003 0x00000003 0x00000003
533 0x00000003 0x00000001 0x0000000b 0x000000c8
534 0x00000003 0x00000007 0x00000004 0x0000000f
535 0x00000002 0x00000000 0x00000000 0x00000002
536 0x00000000 0x00000000 0x00000083 0xa06204ae
537 0x007dc010 0x00000000 0x00000000 0x00000000
538 0x00000000 0x00000000 0x00000000 0x00000000>;
543 compatible = "nvidia,tegra20-emc-table";
544 clock-frequency = <380000>;
545 nvidia,emc-registers = <0x00000017 0x0000004b
546 0x00000012 0x00000006 0x00000004 0x00000005
547 0x00000003 0x0000000c 0x00000006 0x00000006
548 0x00000003 0x00000001 0x00000004 0x00000005
549 0x00000004 0x00000009 0x0000000d 0x00000b5f
550 0x00000000 0x00000003 0x00000003 0x00000006
551 0x00000006 0x00000001 0x00000011 0x000000c8
552 0x00000003 0x0000000e 0x00000007 0x0000000f
553 0x00000002 0x00000000 0x00000000 0x00000002
554 0x00000000 0x00000000 0x00000083 0xe044048b
555 0x007d8010 0x00000000 0x00000000 0x00000000
556 0x00000000 0x00000000 0x00000000 0x00000000>;
562 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
568 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
576 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
581 power-gpios = <&gpio 86 0>; /* gpio PK6 */
583 keep-power-in-suspend;
588 cd-gpios = <&gpio 69 1>; /* gpio PI5 */
589 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
590 power-gpios = <&gpio 70 0>; /* gpio PI6 */
601 compatible = "simple-bus";
602 #address-cells = <1>;
606 compatible = "fixed-clock";
609 clock-frequency = <32768>;
614 compatible = "gpio-keys";
618 gpios = <&gpio 170 1>; /* gpio PV2, active low */
619 linux,code = <116>; /* KEY_POWER */
625 gpios = <&gpio 23 0>; /* gpio PC7 */
626 linux,input-type = <5>; /* EV_SW */
627 linux,code = <0>; /* SW_LID */
628 debounce-interval = <1>;
635 nvidia,debounce-delay-ms = <32>;
636 nvidia,repeat-delay-ms = <160>;
638 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
639 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
640 linux,keymap = <0x00020011 /* KEY_W */
641 0x0003001F /* KEY_S */
642 0x0004001E /* KEY_A */
643 0x0005002C /* KEY_Z */
644 0x000701d0 /* KEY_FN */
646 0x0107007D /* KEY_LEFTMETA */
647 0x02060064 /* KEY_RIGHTALT */
648 0x02070038 /* KEY_LEFTALT */
650 0x03000006 /* KEY_5 */
651 0x03010005 /* KEY_4 */
652 0x03020013 /* KEY_R */
653 0x03030012 /* KEY_E */
654 0x03040021 /* KEY_F */
655 0x03050020 /* KEY_D */
656 0x0306002D /* KEY_X */
658 0x04000008 /* KEY_7 */
659 0x04010007 /* KEY_6 */
660 0x04020014 /* KEY_T */
661 0x04030023 /* KEY_H */
662 0x04040022 /* KEY_G */
663 0x0405002F /* KEY_V */
664 0x0406002E /* KEY_C */
665 0x04070039 /* KEY_SPACE */
667 0x0500000A /* KEY_9 */
668 0x05010009 /* KEY_8 */
669 0x05020016 /* KEY_U */
670 0x05030015 /* KEY_Y */
671 0x05040024 /* KEY_J */
672 0x05050031 /* KEY_N */
673 0x05060030 /* KEY_B */
674 0x0507002B /* KEY_BACKSLASH */
676 0x0600000C /* KEY_MINUS */
677 0x0601000B /* KEY_0 */
678 0x06020018 /* KEY_O */
679 0x06030017 /* KEY_I */
680 0x06040026 /* KEY_L */
681 0x06050025 /* KEY_K */
682 0x06060033 /* KEY_COMMA */
683 0x06070032 /* KEY_M */
685 0x0701000D /* KEY_EQUAL */
686 0x0702001B /* KEY_RIGHTBRACE */
687 0x0703001C /* KEY_ENTER */
688 0x0707008B /* KEY_MENU */
690 0x08040036 /* KEY_RIGHTSHIFT */
691 0x0805002A /* KEY_LEFTSHIFT */
693 0x09050061 /* KEY_RIGHTCTRL */
694 0x0907001D /* KEY_LEFTCTRL */
696 0x0B00001A /* KEY_LEFTBRACE */
697 0x0B010019 /* KEY_P */
698 0x0B020028 /* KEY_APOSTROPHE */
699 0x0B030027 /* KEY_SEMICOLON */
700 0x0B040035 /* KEY_SLASH */
701 0x0B050034 /* KEY_DOT */
703 0x0C000044 /* KEY_F10 */
704 0x0C010043 /* KEY_F9 */
705 0x0C02000E /* KEY_BACKSPACE */
706 0x0C030004 /* KEY_3 */
707 0x0C040003 /* KEY_2 */
708 0x0C050067 /* KEY_UP */
709 0x0C0600D2 /* KEY_PRINT */
710 0x0C070077 /* KEY_PAUSE */
712 0x0D00006E /* KEY_INSERT */
713 0x0D01006F /* KEY_DELETE */
714 0x0D030068 /* KEY_PAGEUP */
715 0x0D04006D /* KEY_PAGEDOWN */
716 0x0D05006A /* KEY_RIGHT */
717 0x0D06006C /* KEY_DOWN */
718 0x0D070069 /* KEY_LEFT */
720 0x0E000057 /* KEY_F11 */
721 0x0E010058 /* KEY_F12 */
722 0x0E020042 /* KEY_F8 */
723 0x0E030010 /* KEY_Q */
724 0x0E04003E /* KEY_F4 */
725 0x0E05003D /* KEY_F3 */
726 0x0E060002 /* KEY_1 */
727 0x0E070041 /* KEY_F7 */
729 0x0F000001 /* KEY_ESC */
730 0x0F010029 /* KEY_GRAVE */
731 0x0F02003F /* KEY_F5 */
732 0x0F03000F /* KEY_TAB */
733 0x0F04003B /* KEY_F1 */
734 0x0F05003C /* KEY_F2 */
735 0x0F06003A /* KEY_CAPSLOCK */
736 0x0F070040 /* KEY_F6 */
738 /* Software Handled Function Keys */
739 0x14000047 /* KEY_KP7 */
741 0x15000049 /* KEY_KP9 */
742 0x15010048 /* KEY_KP8 */
743 0x1502004B /* KEY_KP4 */
744 0x1504004F /* KEY_KP1 */
746 0x1601004E /* KEY_KPSLASH */
747 0x1602004D /* KEY_KP6 */
748 0x1603004C /* KEY_KP5 */
749 0x16040051 /* KEY_KP3 */
750 0x16050050 /* KEY_KP2 */
751 0x16070052 /* KEY_KP0 */
753 0x1B010037 /* KEY_KPASTERISK */
754 0x1B03004A /* KEY_KPMINUS */
755 0x1B04004E /* KEY_KPPLUS */
756 0x1B050053 /* KEY_KPDOT */
758 0x1C050073 /* KEY_VOLUMEUP */
760 0x1D030066 /* KEY_HOME */
761 0x1D04006B /* KEY_END */
762 0x1D0500E0 /* KEY_BRIGHTNESSDOWN */
763 0x1D060072 /* KEY_VOLUMEDOWN */
764 0x1D0700E1 /* KEY_BRIGHTNESSUP */
766 0x1E000045 /* KEY_NUMLOCK */
767 0x1E010046 /* KEY_SCROLLLOCK */
768 0x1E020071 /* KEY_MUTE */
770 0x1F04008A>; /* KEY_HELP */
773 compatible = "simple-bus";
774 #address-cells = <1>;
777 vdd_5v0_reg: regulator@0 {
778 compatible = "regulator-fixed";
780 regulator-name = "vdd_5v0";
781 regulator-min-microvolt = <5000000>;
782 regulator-max-microvolt = <5000000>;
787 compatible = "regulator-fixed";
789 regulator-name = "vdd_1v5";
790 regulator-min-microvolt = <1500000>;
791 regulator-max-microvolt = <1500000>;
796 compatible = "regulator-fixed";
798 regulator-name = "vdd_1v2";
799 regulator-min-microvolt = <1200000>;
800 regulator-max-microvolt = <1200000>;
807 compatible = "nvidia,tegra-audio-wm8903-seaboard",
808 "nvidia,tegra-audio-wm8903";
809 nvidia,model = "NVIDIA Tegra Seaboard";
811 nvidia,audio-routing =
812 "Headphone Jack", "HPOUTR",
813 "Headphone Jack", "HPOUTL",
818 "Mic Jack", "MICBIAS",
821 nvidia,i2s-controller = <&tegra_i2s1>;
822 nvidia,audio-codec = <&wm8903>;
824 nvidia,spkr-en-gpios = <&wm8903 2 0>;
825 nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
827 clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
828 clock-names = "pll_a", "pll_a_out0", "mclk";