2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include "vf610-pinfunc.h"
11 #include <dt-bindings/clock/vf610-clock.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
34 compatible = "fixed-clock";
36 clock-frequency = <24000000>;
40 compatible = "fixed-clock";
42 clock-frequency = <32768>;
48 compatible = "simple-bus";
51 aips0: aips-bus@40000000 {
52 compatible = "fsl,aips-bus", "simple-bus";
57 edma0: dma-controller@40018000 {
59 compatible = "fsl,vf610-edma";
60 reg = <0x40018000 0x2000>,
64 clock-names = "dmamux0", "dmamux1";
65 clocks = <&clks VF610_CLK_DMAMUX0>,
66 <&clks VF610_CLK_DMAMUX1>;
70 can0: flexcan@40020000 {
71 compatible = "fsl,vf610-flexcan";
72 reg = <0x40020000 0x4000>;
73 clocks = <&clks VF610_CLK_FLEXCAN0>,
74 <&clks VF610_CLK_FLEXCAN0>;
75 clock-names = "ipg", "per";
79 uart0: serial@40027000 {
80 compatible = "fsl,vf610-lpuart";
81 reg = <0x40027000 0x1000>;
82 clocks = <&clks VF610_CLK_UART0>;
86 dma-names = "rx","tx";
90 uart1: serial@40028000 {
91 compatible = "fsl,vf610-lpuart";
92 reg = <0x40028000 0x1000>;
93 clocks = <&clks VF610_CLK_UART1>;
97 dma-names = "rx","tx";
101 uart2: serial@40029000 {
102 compatible = "fsl,vf610-lpuart";
103 reg = <0x40029000 0x1000>;
104 clocks = <&clks VF610_CLK_UART2>;
108 dma-names = "rx","tx";
112 uart3: serial@4002a000 {
113 compatible = "fsl,vf610-lpuart";
114 reg = <0x4002a000 0x1000>;
115 clocks = <&clks VF610_CLK_UART3>;
119 dma-names = "rx","tx";
123 dspi0: dspi0@4002c000 {
124 #address-cells = <1>;
126 compatible = "fsl,vf610-dspi";
127 reg = <0x4002c000 0x1000>;
128 clocks = <&clks VF610_CLK_DSPI0>;
129 clock-names = "dspi";
130 spi-num-chipselects = <5>;
135 compatible = "fsl,vf610-sai";
136 reg = <0x40031000 0x1000>;
137 clocks = <&clks VF610_CLK_SAI2>;
139 dma-names = "tx", "rx";
140 dmas = <&edma0 0 21>,
146 compatible = "fsl,vf610-pit";
147 reg = <0x40037000 0x1000>;
148 clocks = <&clks VF610_CLK_PIT>;
153 compatible = "fsl,vf610-ftm-pwm";
155 reg = <0x40038000 0x1000>;
156 clock-names = "ftm_sys", "ftm_ext",
157 "ftm_fix", "ftm_cnt_clk_en";
158 clocks = <&clks VF610_CLK_FTM0>,
159 <&clks VF610_CLK_FTM0_EXT_SEL>,
160 <&clks VF610_CLK_FTM0_FIX_SEL>,
161 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
166 compatible = "fsl,vf610-ftm-pwm";
168 reg = <0x40039000 0x1000>;
169 clock-names = "ftm_sys", "ftm_ext",
170 "ftm_fix", "ftm_cnt_clk_en";
171 clocks = <&clks VF610_CLK_FTM1>,
172 <&clks VF610_CLK_FTM1_EXT_SEL>,
173 <&clks VF610_CLK_FTM1_FIX_SEL>,
174 <&clks VF610_CLK_FTM1_EXT_FIX_EN>;
179 compatible = "fsl,vf610-adc";
180 reg = <0x4003b000 0x1000>;
181 clocks = <&clks VF610_CLK_ADC0>;
187 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
188 reg = <0x4003e000 0x1000>;
189 clocks = <&clks VF610_CLK_WDT>;
190 clock-names = "wdog";
194 qspi0: quadspi@40044000 {
195 #address-cells = <1>;
197 compatible = "fsl,vf610-qspi";
198 reg = <0x40044000 0x1000>;
199 clocks = <&clks VF610_CLK_QSPI0_EN>,
200 <&clks VF610_CLK_QSPI0>;
201 clock-names = "qspi_en", "qspi";
205 iomuxc: iomuxc@40048000 {
206 compatible = "fsl,vf610-iomuxc";
207 reg = <0x40048000 0x1000>;
208 #gpio-range-cells = <3>;
211 gpio1: gpio@40049000 {
212 compatible = "fsl,vf610-gpio";
213 reg = <0x40049000 0x1000 0x400ff000 0x40>;
216 interrupt-controller;
217 #interrupt-cells = <2>;
218 gpio-ranges = <&iomuxc 0 0 32>;
221 gpio2: gpio@4004a000 {
222 compatible = "fsl,vf610-gpio";
223 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
226 interrupt-controller;
227 #interrupt-cells = <2>;
228 gpio-ranges = <&iomuxc 0 32 32>;
231 gpio3: gpio@4004b000 {
232 compatible = "fsl,vf610-gpio";
233 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
238 gpio-ranges = <&iomuxc 0 64 32>;
241 gpio4: gpio@4004c000 {
242 compatible = "fsl,vf610-gpio";
243 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
246 interrupt-controller;
247 #interrupt-cells = <2>;
248 gpio-ranges = <&iomuxc 0 96 32>;
251 gpio5: gpio@4004d000 {
252 compatible = "fsl,vf610-gpio";
253 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
256 interrupt-controller;
257 #interrupt-cells = <2>;
258 gpio-ranges = <&iomuxc 0 128 7>;
261 anatop: anatop@40050000 {
262 compatible = "fsl,vf610-anatop", "syscon";
263 reg = <0x40050000 0x400>;
266 usbphy0: usbphy@40050800 {
267 compatible = "fsl,vf610-usbphy";
268 reg = <0x40050800 0x400>;
269 clocks = <&clks VF610_CLK_USBPHY0>;
270 fsl,anatop = <&anatop>;
274 usbphy1: usbphy@40050c00 {
275 compatible = "fsl,vf610-usbphy";
276 reg = <0x40050c00 0x400>;
277 clocks = <&clks VF610_CLK_USBPHY1>;
278 fsl,anatop = <&anatop>;
283 #address-cells = <1>;
285 compatible = "fsl,vf610-i2c";
286 reg = <0x40066000 0x1000>;
287 clocks = <&clks VF610_CLK_I2C0>;
289 dmas = <&edma0 0 50>,
291 dma-names = "rx","tx";
296 compatible = "fsl,vf610-ccm";
297 reg = <0x4006b000 0x1000>;
298 clocks = <&sxosc>, <&fxosc>;
299 clock-names = "sxosc", "fxosc";
303 usbdev0: usb@40034000 {
304 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
305 reg = <0x40034000 0x800>;
306 clocks = <&clks VF610_CLK_USBC0>;
307 fsl,usbphy = <&usbphy0>;
308 fsl,usbmisc = <&usbmisc0 0>;
309 dr_mode = "peripheral";
313 usbmisc0: usb@40034800 {
315 compatible = "fsl,vf610-usbmisc";
316 reg = <0x40034800 0x200>;
317 clocks = <&clks VF610_CLK_USBC0>;
322 aips1: aips-bus@40080000 {
323 compatible = "fsl,aips-bus", "simple-bus";
324 #address-cells = <1>;
328 edma1: dma-controller@40098000 {
330 compatible = "fsl,vf610-edma";
331 reg = <0x40098000 0x2000>,
335 clock-names = "dmamux0", "dmamux1";
336 clocks = <&clks VF610_CLK_DMAMUX2>,
337 <&clks VF610_CLK_DMAMUX3>;
341 uart4: serial@400a9000 {
342 compatible = "fsl,vf610-lpuart";
343 reg = <0x400a9000 0x1000>;
344 clocks = <&clks VF610_CLK_UART4>;
349 uart5: serial@400aa000 {
350 compatible = "fsl,vf610-lpuart";
351 reg = <0x400aa000 0x1000>;
352 clocks = <&clks VF610_CLK_UART5>;
358 compatible = "fsl,vf610-adc";
359 reg = <0x400bb000 0x1000>;
360 clocks = <&clks VF610_CLK_ADC1>;
365 esdhc1: esdhc@400b2000 {
366 compatible = "fsl,imx53-esdhc";
367 reg = <0x400b2000 0x1000>;
368 clocks = <&clks VF610_CLK_IPG_BUS>,
369 <&clks VF610_CLK_PLATFORM_BUS>,
370 <&clks VF610_CLK_ESDHC1>;
371 clock-names = "ipg", "ahb", "per";
375 usbh1: usb@400b4000 {
376 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
377 reg = <0x400b4000 0x800>;
378 clocks = <&clks VF610_CLK_USBC1>;
379 fsl,usbphy = <&usbphy1>;
380 fsl,usbmisc = <&usbmisc1 0>;
385 usbmisc1: usb@400b4800 {
387 compatible = "fsl,vf610-usbmisc";
388 reg = <0x400b4800 0x200>;
389 clocks = <&clks VF610_CLK_USBC1>;
394 compatible = "fsl,ftm-timer";
395 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
396 clock-names = "ftm-evt", "ftm-src",
397 "ftm-evt-counter-en", "ftm-src-counter-en";
398 clocks = <&clks VF610_CLK_FTM2>,
399 <&clks VF610_CLK_FTM3>,
400 <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
401 <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
405 fec0: ethernet@400d0000 {
406 compatible = "fsl,mvf600-fec";
407 reg = <0x400d0000 0x1000>;
408 clocks = <&clks VF610_CLK_ENET0>,
409 <&clks VF610_CLK_ENET0>,
410 <&clks VF610_CLK_ENET>;
411 clock-names = "ipg", "ahb", "ptp";
415 fec1: ethernet@400d1000 {
416 compatible = "fsl,mvf600-fec";
417 reg = <0x400d1000 0x1000>;
418 clocks = <&clks VF610_CLK_ENET1>,
419 <&clks VF610_CLK_ENET1>,
420 <&clks VF610_CLK_ENET>;
421 clock-names = "ipg", "ahb", "ptp";
425 can1: flexcan@400d4000 {
426 compatible = "fsl,vf610-flexcan";
427 reg = <0x400d4000 0x4000>;
428 clocks = <&clks VF610_CLK_FLEXCAN1>,
429 <&clks VF610_CLK_FLEXCAN1>;
430 clock-names = "ipg", "per";