2 * Copyright (c) 2012 Linaro Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 #include <linux/init.h>
20 #include <linux/linkage.h>
21 #include <asm/assembler.h>
25 * For the kernel proper, we need to find out the CPU boot mode long after
26 * boot, so we need to store it in a writable variable.
28 * This is not in .bss, because we set it sufficiently early that the boot-time
29 * zeroing of .bss would clobber it.
32 ENTRY(__boot_cpu_mode)
37 * Save the primary CPU boot mode. Requires 3 scratch registers.
39 .macro store_primary_cpu_mode reg1, reg2, reg3
41 and \reg1, \reg1, #MODE_MASK
42 adr \reg2, .L__boot_cpu_mode_offset
44 str \reg1, [\reg2, \reg3]
48 * Compare the current mode with the one saved on the primary CPU.
49 * If they don't match, record that fact. The Z bit indicates
50 * if there's a match or not.
51 * Requires 3 additionnal scratch registers.
53 .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
54 adr \reg2, .L__boot_cpu_mode_offset
56 ldr \reg1, [\reg2, \reg3]
57 cmp \mode, \reg1 @ matches primary CPU boot mode?
58 orrne r7, r7, #BOOT_CPU_MODE_MISMATCH
59 strne r7, [r5, r6] @ record what happened and give up
63 * Hypervisor stub installation functions.
65 * These must be called with the MMU and D-cache off.
66 * They are not ABI compliant and are only intended to be called from the kernel
67 * entry points in head.S.
69 @ Call this from the primary CPU
70 ENTRY(__hyp_stub_install)
71 store_primary_cpu_mode r4, r5, r6
72 ENDPROC(__hyp_stub_install)
76 @ Secondary CPUs should call here
77 ENTRY(__hyp_stub_install_secondary)
79 and r4, r4, #MODE_MASK
82 * If the secondary has booted with a different mode, give up
85 compare_cpu_mode_with_primary r4, r5, r6, r7
89 * Once we have given up on one CPU, we do not try to install the
90 * stub hypervisor on the remaining ones: because the saved boot mode
91 * is modified, it can't compare equal to the CPSR mode field any
98 bxne lr @ give up if the CPU is not in HYP mode
101 * Configure HSCTLR to set correct exception endianness/instruction set
104 * Eventually, CPU-specific code might be needed -- assume not for now
106 * This code relies on the "eret" instruction to synchronize the
107 * various coprocessor accesses.
109 @ Now install the hypervisor stub:
110 adr r7, __hyp_stub_vectors
111 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR)
113 @ Disable all traps, so we don't get any nasty surprise
115 mcr p15, 4, r7, c1, c1, 0 @ HCR
116 mcr p15, 4, r7, c1, c1, 2 @ HCPTR
117 mcr p15, 4, r7, c1, c1, 3 @ HSTR
119 THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
120 #ifdef CONFIG_CPU_BIG_ENDIAN
121 orr r7, #(1 << 9) @ HSCTLR.EE
123 mcr p15, 4, r7, c1, c0, 0 @ HSCTLR
125 mrc p15, 4, r7, c1, c1, 1 @ HDCR
126 and r7, #0x1f @ Preserve HPMN
127 mcr p15, 4, r7, c1, c1, 1 @ HDCR
129 bic r7, r4, #MODE_MASK
130 orr r7, r7, #SVC_MODE
131 THUMB( orr r7, r7, #PSR_T_BIT )
132 msr spsr_cxsf, r7 @ This is SPSR_hyp.
134 __MSR_ELR_HYP(14) @ msr elr_hyp, lr
135 __ERET @ return, switching to SVC mode
136 @ The boot CPU mode is left in r4.
137 ENDPROC(__hyp_stub_install_secondary)
141 mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
142 mcrne p15, 4, r0, c12, c0, 0 @ set HVBAR
144 ENDPROC(__hyp_stub_do_trap)
147 * __hyp_set_vectors: Call this after boot to set the initial hypervisor
148 * vectors as part of hypervisor installation. On an SMP system, this should
149 * be called on each CPU.
151 * r0 must be the physical address of the new vector table (which must lie in
152 * the bottom 4GB of physical address space.
154 * r0 must be 32-byte aligned.
156 * Before calling this, you must check that the stub hypervisor is installed
157 * everywhere, by waiting for any secondary CPUs to be brought up and then
158 * checking that BOOT_CPU_MODE_HAVE_HYP(__boot_cpu_mode) is true.
160 * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or
161 * something else went wrong... in such cases, trying to install a new
162 * hypervisor is unlikely to work as desired.
164 * When you call into your shiny new hypervisor, sp_hyp will contain junk,
165 * so you will need to set that to something sensible at the new hypervisor's
166 * initialisation entry point.
168 ENTRY(__hyp_get_vectors)
170 ENDPROC(__hyp_get_vectors)
172 ENTRY(__hyp_set_vectors)
175 ENDPROC(__hyp_set_vectors)
178 .L__boot_cpu_mode_offset:
179 .long __boot_cpu_mode - .
183 __hyp_stub_reset: W(b) .
184 __hyp_stub_und: W(b) .
185 __hyp_stub_svc: W(b) .
186 __hyp_stub_pabort: W(b) .
187 __hyp_stub_dabort: W(b) .
188 __hyp_stub_trap: W(b) __hyp_stub_do_trap
189 __hyp_stub_irq: W(b) .
190 __hyp_stub_fiq: W(b) .
191 ENDPROC(__hyp_stub_vectors)