2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 * Copyright (C) 2012 ARM Limited
17 * Author: Will Deacon <will.deacon@arm.com>
19 #define pr_fmt(fmt) "CPU PMU: " fmt
21 #include <linux/bitmap.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
28 #include <linux/irq.h>
29 #include <linux/irqdesc.h>
31 #include <asm/cputype.h>
32 #include <asm/irq_regs.h>
35 /* Set at runtime when we know what CPU type we are. */
36 static struct arm_pmu *__oprofile_cpu_pmu;
39 * Despite the names, these two functions are CPU-specific and are used
40 * by the OProfile/perf code.
42 const char *perf_pmu_name(void)
44 if (!__oprofile_cpu_pmu)
47 return __oprofile_cpu_pmu->name;
49 EXPORT_SYMBOL_GPL(perf_pmu_name);
51 int perf_num_counters(void)
55 if (__oprofile_cpu_pmu != NULL)
56 max_events = __oprofile_cpu_pmu->num_events;
60 EXPORT_SYMBOL_GPL(perf_num_counters);
62 /* Include the PMU-specific implementations. */
63 #include "perf_event_xscale.c"
64 #include "perf_event_v6.c"
65 #include "perf_event_v7.c"
67 static void cpu_pmu_enable_percpu_irq(void *data)
69 int irq = *(int *)data;
71 enable_percpu_irq(irq, IRQ_TYPE_NONE);
74 static void cpu_pmu_disable_percpu_irq(void *data)
76 int irq = *(int *)data;
78 disable_percpu_irq(irq);
81 static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
84 struct platform_device *pmu_device = cpu_pmu->plat_device;
85 struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
87 irqs = min(pmu_device->num_resources, num_possible_cpus());
89 irq = platform_get_irq(pmu_device, 0);
90 if (irq >= 0 && irq_is_percpu(irq)) {
91 on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
92 free_percpu_irq(irq, &hw_events->percpu_pmu);
94 for (i = 0; i < irqs; ++i) {
97 if (cpu_pmu->irq_affinity)
98 cpu = cpu_pmu->irq_affinity[i];
100 if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
102 irq = platform_get_irq(pmu_device, i);
104 free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
109 static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
111 int i, err, irq, irqs;
112 struct platform_device *pmu_device = cpu_pmu->plat_device;
113 struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
118 irqs = min(pmu_device->num_resources, num_possible_cpus());
120 pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
124 irq = platform_get_irq(pmu_device, 0);
125 if (irq >= 0 && irq_is_percpu(irq)) {
126 err = request_percpu_irq(irq, handler, "arm-pmu",
127 &hw_events->percpu_pmu);
129 pr_err("unable to request IRQ%d for ARM PMU counters\n",
133 on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
135 for (i = 0; i < irqs; ++i) {
139 irq = platform_get_irq(pmu_device, i);
143 if (cpu_pmu->irq_affinity)
144 cpu = cpu_pmu->irq_affinity[i];
147 * If we have a single PMU interrupt that we can't shift,
148 * assume that we're running on a uniprocessor machine and
149 * continue. Otherwise, continue without this interrupt.
151 if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
152 pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
157 err = request_irq(irq, handler,
158 IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
159 per_cpu_ptr(&hw_events->percpu_pmu, cpu));
161 pr_err("unable to request IRQ%d for ARM PMU counters\n",
166 cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
174 * PMU hardware loses all context when a CPU goes offline.
175 * When a CPU is hotplugged back in, since some hardware registers are
176 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
177 * junk values out of them.
179 static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
182 int cpu = (unsigned long)hcpu;
183 struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);
185 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
188 if (!cpumask_test_cpu(cpu, &pmu->supported_cpus))
199 static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
203 struct pmu_hw_events __percpu *cpu_hw_events;
205 cpu_hw_events = alloc_percpu(struct pmu_hw_events);
209 cpu_pmu->hotplug_nb.notifier_call = cpu_pmu_notify;
210 err = register_cpu_notifier(&cpu_pmu->hotplug_nb);
214 for_each_possible_cpu(cpu) {
215 struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);
216 raw_spin_lock_init(&events->pmu_lock);
217 events->percpu_pmu = cpu_pmu;
220 cpu_pmu->hw_events = cpu_hw_events;
221 cpu_pmu->request_irq = cpu_pmu_request_irq;
222 cpu_pmu->free_irq = cpu_pmu_free_irq;
224 /* Ensure the PMU has sane values out of reset. */
226 on_each_cpu_mask(&cpu_pmu->supported_cpus, cpu_pmu->reset,
229 /* If no interrupts available, set the corresponding capability flag */
230 if (!platform_get_irq(cpu_pmu->plat_device, 0))
231 cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
236 free_percpu(cpu_hw_events);
240 static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
242 unregister_cpu_notifier(&cpu_pmu->hotplug_nb);
243 free_percpu(cpu_pmu->hw_events);
247 * PMU platform driver and devicetree bindings.
249 static const struct of_device_id cpu_pmu_of_device_ids[] = {
250 {.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
251 {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
252 {.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
253 {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
254 {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
255 {.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init},
256 {.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init},
257 {.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init},
258 {.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init},
259 {.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init},
260 {.compatible = "qcom,krait-pmu", .data = krait_pmu_init},
261 {.compatible = "qcom,scorpion-pmu", .data = scorpion_pmu_init},
262 {.compatible = "qcom,scorpion-mp-pmu", .data = scorpion_mp_pmu_init},
266 static struct platform_device_id cpu_pmu_plat_device_ids[] = {
268 {.name = "armv6-pmu"},
269 {.name = "armv7-pmu"},
270 {.name = "xscale-pmu"},
274 static const struct pmu_probe_info pmu_probe_table[] = {
275 ARM_PMU_PROBE(ARM_CPU_PART_ARM1136, armv6_1136_pmu_init),
276 ARM_PMU_PROBE(ARM_CPU_PART_ARM1156, armv6_1156_pmu_init),
277 ARM_PMU_PROBE(ARM_CPU_PART_ARM1176, armv6_1176_pmu_init),
278 ARM_PMU_PROBE(ARM_CPU_PART_ARM11MPCORE, armv6mpcore_pmu_init),
279 ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A8, armv7_a8_pmu_init),
280 ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A9, armv7_a9_pmu_init),
281 XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V1, xscale1pmu_init),
282 XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V2, xscale2pmu_init),
283 { /* sentinel value */ }
287 * CPU PMU identification and probing.
289 static int probe_current_pmu(struct arm_pmu *pmu)
292 unsigned int cpuid = read_cpuid_id();
294 const struct pmu_probe_info *info;
296 pr_info("probing PMU on CPU %d\n", cpu);
298 for (info = pmu_probe_table; info->init != NULL; info++) {
299 if ((cpuid & info->mask) != info->cpuid)
301 ret = info->init(pmu);
309 static int of_pmu_irq_cfg(struct arm_pmu *pmu)
312 struct platform_device *pdev = pmu->plat_device;
313 int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
318 for (i = 0; i < pdev->num_resources; ++i) {
319 struct device_node *dn;
322 dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
325 pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
326 of_node_full_name(dn), i);
330 for_each_possible_cpu(cpu)
331 if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
335 if (cpu >= nr_cpu_ids) {
336 pr_warn("Failed to find logical CPU for %s\n",
342 cpumask_set_cpu(cpu, &pmu->supported_cpus);
345 if (i == pdev->num_resources) {
346 pmu->irq_affinity = irqs;
349 cpumask_setall(&pmu->supported_cpus);
355 static int cpu_pmu_device_probe(struct platform_device *pdev)
357 const struct of_device_id *of_id;
358 const int (*init_fn)(struct arm_pmu *);
359 struct device_node *node = pdev->dev.of_node;
363 pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
365 pr_info("failed to allocate PMU device!\n");
369 if (!__oprofile_cpu_pmu)
370 __oprofile_cpu_pmu = pmu;
372 pmu->plat_device = pdev;
374 if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
375 init_fn = of_id->data;
377 ret = of_pmu_irq_cfg(pmu);
381 ret = probe_current_pmu(pmu);
382 cpumask_setall(&pmu->supported_cpus);
386 pr_info("failed to probe PMU!\n");
390 ret = cpu_pmu_init(pmu);
394 ret = armpmu_register(pmu, -1);
401 cpu_pmu_destroy(pmu);
403 pr_info("failed to register PMU devices!\n");
408 static struct platform_driver cpu_pmu_driver = {
411 .of_match_table = cpu_pmu_of_device_ids,
413 .probe = cpu_pmu_device_probe,
414 .id_table = cpu_pmu_plat_device_ids,
417 static int __init register_pmu_driver(void)
419 return platform_driver_register(&cpu_pmu_driver);
421 device_initcall(register_pmu_driver);