2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/ata_platform.h>
16 #include <linux/mtd/nand.h>
17 #include <linux/dma-mapping.h>
20 #include <asm/timex.h>
21 #include <asm/kexec.h>
22 #include <asm/mach/map.h>
23 #include <asm/mach/time.h>
24 #include <mach/kirkwood.h>
25 #include <mach/bridge-regs.h>
26 #include <plat/audio.h>
27 #include <plat/cache-feroceon-l2.h>
28 #include <plat/mvsdio.h>
29 #include <plat/orion_nand.h>
30 #include <plat/common.h>
31 #include <plat/time.h>
32 #include <plat/addr-map.h>
35 /*****************************************************************************
37 ****************************************************************************/
38 static struct map_desc kirkwood_io_desc[] __initdata = {
40 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
41 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
42 .length = KIRKWOOD_PCIE_IO_SIZE,
45 .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
46 .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
47 .length = KIRKWOOD_PCIE1_IO_SIZE,
50 .virtual = KIRKWOOD_REGS_VIRT_BASE,
51 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
52 .length = KIRKWOOD_REGS_SIZE,
57 void __init kirkwood_map_io(void)
59 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
63 * Default clock control bits. Any bit _not_ set in this variable
64 * will be cleared from the hardware after platform devices have been
65 * registered. Some reserved bits must be set to 1.
67 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
70 /*****************************************************************************
72 ****************************************************************************/
73 void __init kirkwood_ehci_init(void)
75 kirkwood_clk_ctrl |= CGC_USB0;
76 orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
80 /*****************************************************************************
82 ****************************************************************************/
83 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
85 kirkwood_clk_ctrl |= CGC_GE0;
87 orion_ge00_init(eth_data,
88 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
89 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
93 /*****************************************************************************
95 ****************************************************************************/
96 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
99 kirkwood_clk_ctrl |= CGC_GE1;
101 orion_ge01_init(eth_data,
102 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
103 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
107 /*****************************************************************************
109 ****************************************************************************/
110 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
112 orion_ge00_switch_init(d, irq);
116 /*****************************************************************************
118 ****************************************************************************/
119 static struct resource kirkwood_nand_resource = {
120 .flags = IORESOURCE_MEM,
121 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
122 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
123 KIRKWOOD_NAND_MEM_SIZE - 1,
126 static struct orion_nand_data kirkwood_nand_data = {
132 static struct platform_device kirkwood_nand_flash = {
133 .name = "orion_nand",
136 .platform_data = &kirkwood_nand_data,
138 .resource = &kirkwood_nand_resource,
142 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
145 kirkwood_clk_ctrl |= CGC_RUNIT;
146 kirkwood_nand_data.parts = parts;
147 kirkwood_nand_data.nr_parts = nr_parts;
148 kirkwood_nand_data.chip_delay = chip_delay;
149 platform_device_register(&kirkwood_nand_flash);
152 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
153 int (*dev_ready)(struct mtd_info *))
155 kirkwood_clk_ctrl |= CGC_RUNIT;
156 kirkwood_nand_data.parts = parts;
157 kirkwood_nand_data.nr_parts = nr_parts;
158 kirkwood_nand_data.dev_ready = dev_ready;
159 platform_device_register(&kirkwood_nand_flash);
162 /*****************************************************************************
164 ****************************************************************************/
165 static void __init kirkwood_rtc_init(void)
167 orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
171 /*****************************************************************************
173 ****************************************************************************/
174 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
176 kirkwood_clk_ctrl |= CGC_SATA0;
177 if (sata_data->n_ports > 1)
178 kirkwood_clk_ctrl |= CGC_SATA1;
180 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
184 /*****************************************************************************
186 ****************************************************************************/
187 static struct resource mvsdio_resources[] = {
189 .start = SDIO_PHYS_BASE,
190 .end = SDIO_PHYS_BASE + SZ_1K - 1,
191 .flags = IORESOURCE_MEM,
194 .start = IRQ_KIRKWOOD_SDIO,
195 .end = IRQ_KIRKWOOD_SDIO,
196 .flags = IORESOURCE_IRQ,
200 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
202 static struct platform_device kirkwood_sdio = {
206 .dma_mask = &mvsdio_dmamask,
207 .coherent_dma_mask = DMA_BIT_MASK(32),
209 .num_resources = ARRAY_SIZE(mvsdio_resources),
210 .resource = mvsdio_resources,
213 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
217 kirkwood_pcie_id(&dev, &rev);
218 if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
219 mvsdio_data->clock = 100000000;
221 mvsdio_data->clock = 200000000;
222 kirkwood_clk_ctrl |= CGC_SDIO;
223 kirkwood_sdio.dev.platform_data = mvsdio_data;
224 platform_device_register(&kirkwood_sdio);
228 /*****************************************************************************
230 ****************************************************************************/
231 void __init kirkwood_spi_init()
233 kirkwood_clk_ctrl |= CGC_RUNIT;
234 orion_spi_init(SPI_PHYS_BASE, kirkwood_tclk);
238 /*****************************************************************************
240 ****************************************************************************/
241 void __init kirkwood_i2c_init(void)
243 orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
247 /*****************************************************************************
249 ****************************************************************************/
251 void __init kirkwood_uart0_init(void)
253 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
254 IRQ_KIRKWOOD_UART_0, kirkwood_tclk);
258 /*****************************************************************************
260 ****************************************************************************/
261 void __init kirkwood_uart1_init(void)
263 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
264 IRQ_KIRKWOOD_UART_1, kirkwood_tclk);
267 /*****************************************************************************
268 * Cryptographic Engines and Security Accelerator (CESA)
269 ****************************************************************************/
270 void __init kirkwood_crypto_init(void)
272 kirkwood_clk_ctrl |= CGC_CRYPTO;
273 orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
274 KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
278 /*****************************************************************************
280 ****************************************************************************/
281 static void __init kirkwood_xor0_init(void)
283 kirkwood_clk_ctrl |= CGC_XOR0;
285 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
286 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
290 /*****************************************************************************
292 ****************************************************************************/
293 static void __init kirkwood_xor1_init(void)
295 kirkwood_clk_ctrl |= CGC_XOR1;
297 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
298 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
302 /*****************************************************************************
304 ****************************************************************************/
305 static void __init kirkwood_wdt_init(void)
307 orion_wdt_init(kirkwood_tclk);
311 /*****************************************************************************
313 ****************************************************************************/
314 void __init kirkwood_init_early(void)
316 orion_time_set_base(TIMER_VIRT_BASE);
321 static int __init kirkwood_find_tclk(void)
325 kirkwood_pcie_id(&dev, &rev);
327 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
328 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
334 static void __init kirkwood_timer_init(void)
336 kirkwood_tclk = kirkwood_find_tclk();
338 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
339 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
342 struct sys_timer kirkwood_timer = {
343 .init = kirkwood_timer_init,
346 /*****************************************************************************
348 ****************************************************************************/
349 static struct resource kirkwood_i2s_resources[] = {
351 .start = AUDIO_PHYS_BASE,
352 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
353 .flags = IORESOURCE_MEM,
356 .start = IRQ_KIRKWOOD_I2S,
357 .end = IRQ_KIRKWOOD_I2S,
358 .flags = IORESOURCE_IRQ,
362 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
366 static struct platform_device kirkwood_i2s_device = {
367 .name = "kirkwood-i2s",
369 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
370 .resource = kirkwood_i2s_resources,
372 .platform_data = &kirkwood_i2s_data,
376 static struct platform_device kirkwood_pcm_device = {
377 .name = "kirkwood-pcm-audio",
381 void __init kirkwood_audio_init(void)
383 kirkwood_clk_ctrl |= CGC_AUDIO;
384 platform_device_register(&kirkwood_i2s_device);
385 platform_device_register(&kirkwood_pcm_device);
388 /*****************************************************************************
390 ****************************************************************************/
392 * Identify device ID and revision.
394 static char * __init kirkwood_id(void)
398 kirkwood_pcie_id(&dev, &rev);
400 if (dev == MV88F6281_DEV_ID) {
401 if (rev == MV88F6281_REV_Z0)
402 return "MV88F6281-Z0";
403 else if (rev == MV88F6281_REV_A0)
404 return "MV88F6281-A0";
405 else if (rev == MV88F6281_REV_A1)
406 return "MV88F6281-A1";
408 return "MV88F6281-Rev-Unsupported";
409 } else if (dev == MV88F6192_DEV_ID) {
410 if (rev == MV88F6192_REV_Z0)
411 return "MV88F6192-Z0";
412 else if (rev == MV88F6192_REV_A0)
413 return "MV88F6192-A0";
414 else if (rev == MV88F6192_REV_A1)
415 return "MV88F6192-A1";
417 return "MV88F6192-Rev-Unsupported";
418 } else if (dev == MV88F6180_DEV_ID) {
419 if (rev == MV88F6180_REV_A0)
420 return "MV88F6180-Rev-A0";
421 else if (rev == MV88F6180_REV_A1)
422 return "MV88F6180-Rev-A1";
424 return "MV88F6180-Rev-Unsupported";
425 } else if (dev == MV88F6282_DEV_ID) {
426 if (rev == MV88F6282_REV_A0)
427 return "MV88F6282-Rev-A0";
428 else if (rev == MV88F6282_REV_A1)
429 return "MV88F6282-Rev-A1";
431 return "MV88F6282-Rev-Unsupported";
433 return "Device-Unknown";
437 static void __init kirkwood_l2_init(void)
439 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
440 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
443 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
448 void __init kirkwood_init(void)
450 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
451 kirkwood_id(), kirkwood_tclk);
452 kirkwood_i2s_data.tclk = kirkwood_tclk;
455 * Disable propagation of mbus errors to the CPU local bus,
456 * as this causes mbus errors (which can occur for example
457 * for PCI aborts) to throw CPU aborts, which we're not set
460 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
462 kirkwood_setup_cpu_mbus();
464 #ifdef CONFIG_CACHE_FEROCEON_L2
468 /* internal devices that every board has */
471 kirkwood_xor0_init();
472 kirkwood_xor1_init();
473 kirkwood_crypto_init();
476 kexec_reinit = kirkwood_enable_pcie;
480 static int __init kirkwood_clock_gate(void)
482 unsigned int curr = readl(CLOCK_GATING_CTRL);
485 kirkwood_pcie_id(&dev, &rev);
486 printk(KERN_DEBUG "Gating clock of unused units\n");
487 printk(KERN_DEBUG "before: 0x%08x\n", curr);
489 /* Make sure those units are accessible */
490 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
492 /* For SATA: first shutdown the phy */
493 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
494 /* Disable PLL and IVREF */
495 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
497 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
499 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
500 /* Disable PLL and IVREF */
501 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
503 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
506 /* For PCIe: first shutdown the phy */
507 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
508 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
510 if (readl(PCIE_STATUS) & 0x1)
512 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
515 /* For PCIe 1: first shutdown the phy */
516 if (dev == MV88F6282_DEV_ID) {
517 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
518 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
520 if (readl(PCIE1_STATUS) & 0x1)
522 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
524 } else /* keep this bit set for devices that don't have PCIe1 */
525 kirkwood_clk_ctrl |= CGC_PEX1;
527 /* Now gate clock the required units */
528 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
529 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
533 late_initcall(kirkwood_clock_gate);
535 void kirkwood_restart(char mode, const char *cmd)
538 * Enable soft reset to assert RSTOUTn.
540 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
545 writel(SOFT_RESET, SYSTEM_SOFT_RESET);