2 * System controller support for Armada 370, 375 and XP platforms.
4 * Copyright (C) 2012 Marvell
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
14 * The Armada 370, 375 and Armada XP SoCs have a range of
15 * miscellaneous registers, that do not belong to a particular device,
16 * but rather provide system-level features. This basic
17 * system-controller driver provides a device tree binding for those
18 * registers, and implements utility functions offering various
19 * features related to those registers.
21 * For now, the feature set is limited to restarting the platform by a
22 * soft-reset, but it might be extended in the future.
25 #include <linux/kernel.h>
26 #include <linux/init.h>
27 #include <linux/of_address.h>
29 #include <linux/reboot.h>
32 static void __iomem *system_controller_base;
34 struct mvebu_system_controller {
35 u32 rstoutn_mask_offset;
36 u32 system_soft_reset_offset;
38 u32 rstoutn_mask_reset_out_en;
39 u32 system_soft_reset;
46 static struct mvebu_system_controller *mvebu_sc;
48 static const struct mvebu_system_controller armada_370_xp_system_controller = {
49 .rstoutn_mask_offset = 0x60,
50 .system_soft_reset_offset = 0x64,
51 .rstoutn_mask_reset_out_en = 0x1,
52 .system_soft_reset = 0x1,
57 static const struct mvebu_system_controller armada_375_system_controller = {
58 .rstoutn_mask_offset = 0x54,
59 .system_soft_reset_offset = 0x58,
60 .rstoutn_mask_reset_out_en = 0x1,
61 .system_soft_reset = 0x1,
62 .resume_boot_addr = 0xd4,
67 static const struct mvebu_system_controller orion_system_controller = {
68 .rstoutn_mask_offset = 0x108,
69 .system_soft_reset_offset = 0x10c,
70 .rstoutn_mask_reset_out_en = 0x4,
71 .system_soft_reset = 0x1,
74 static const struct of_device_id of_system_controller_table[] = {
76 .compatible = "marvell,orion-system-controller",
77 .data = (void *) &orion_system_controller,
79 .compatible = "marvell,armada-370-xp-system-controller",
80 .data = (void *) &armada_370_xp_system_controller,
82 .compatible = "marvell,armada-375-system-controller",
83 .data = (void *) &armada_375_system_controller,
85 { /* end of list */ },
88 void mvebu_restart(enum reboot_mode mode, const char *cmd)
90 if (!system_controller_base) {
91 pr_err("Cannot restart, system-controller not available: check the device tree\n");
94 * Enable soft reset to assert RSTOUTn.
96 writel(mvebu_sc->rstoutn_mask_reset_out_en,
97 system_controller_base +
98 mvebu_sc->rstoutn_mask_offset);
102 writel(mvebu_sc->system_soft_reset,
103 system_controller_base +
104 mvebu_sc->system_soft_reset_offset);
111 int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev)
113 if (of_machine_is_compatible("marvell,armada380") &&
114 system_controller_base) {
115 *dev = readl(system_controller_base + mvebu_sc->dev_id) >> 16;
116 *rev = (readl(system_controller_base + mvebu_sc->rev_id) >> 8)
124 void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr)
126 BUG_ON(system_controller_base == NULL);
127 BUG_ON(mvebu_sc->resume_boot_addr == 0);
128 writel(virt_to_phys(boot_addr), system_controller_base +
129 mvebu_sc->resume_boot_addr);
133 static int __init mvebu_system_controller_init(void)
135 const struct of_device_id *match;
136 struct device_node *np;
138 np = of_find_matching_node_and_match(NULL, of_system_controller_table,
141 system_controller_base = of_iomap(np, 0);
142 mvebu_sc = (struct mvebu_system_controller *)match->data;
149 early_initcall(mvebu_system_controller_init);