Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs
[cascardo/linux.git] / arch / arm / mach-s3c2440 / mach-at2440evb.c
1 /* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
2  *
3  * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
4  *      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
5  *      and modifications by SBZ <sbz@spgui.org> and
6  *      Weibing <http://weibing.blogbus.com>
7  *
8  * For product information, visit http://www.arm.com/
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/io.h>
22 #include <linux/serial_core.h>
23 #include <linux/dm9000.h>
24 #include <linux/platform_device.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/irq.h>
29
30 #include <mach/hardware.h>
31 #include <mach/fb.h>
32 #include <asm/irq.h>
33 #include <asm/mach-types.h>
34
35 #include <plat/regs-serial.h>
36 #include <mach/regs-gpio.h>
37 #include <mach/regs-mem.h>
38 #include <mach/regs-lcd.h>
39 #include <plat/nand.h>
40 #include <plat/iic.h>
41
42 #include <linux/mtd/mtd.h>
43 #include <linux/mtd/nand.h>
44 #include <linux/mtd/nand_ecc.h>
45 #include <linux/mtd/partitions.h>
46
47 #include <plat/clock.h>
48 #include <plat/devs.h>
49 #include <plat/cpu.h>
50 #include <plat/mci.h>
51
52 #include "common.h"
53
54 static struct map_desc at2440evb_iodesc[] __initdata = {
55         /* Nothing here */
56 };
57
58 #define UCON S3C2410_UCON_DEFAULT
59 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
60 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
61
62 static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
63         [0] = {
64                 .name           = "uclk",
65                 .divisor        = 1,
66                 .min_baud       = 0,
67                 .max_baud       = 0,
68         },
69         [1] = {
70                 .name           = "pclk",
71                 .divisor        = 1,
72                 .min_baud       = 0,
73                 .max_baud       = 0,
74         }
75 };
76
77
78 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
79         [0] = {
80                 .hwport      = 0,
81                 .flags       = 0,
82                 .ucon        = UCON,
83                 .ulcon       = ULCON,
84                 .ufcon       = UFCON,
85                 .clocks      = at2440evb_serial_clocks,
86                 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
87         },
88         [1] = {
89                 .hwport      = 1,
90                 .flags       = 0,
91                 .ucon        = UCON,
92                 .ulcon       = ULCON,
93                 .ufcon       = UFCON,
94                 .clocks      = at2440evb_serial_clocks,
95                 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
96         },
97 };
98
99 /* NAND Flash on AT2440EVB board */
100
101 static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
102         [0] = {
103                 .name   = "Boot Agent",
104                 .size   = SZ_256K,
105                 .offset = 0,
106         },
107         [1] = {
108                 .name   = "Kernel",
109                 .size   = SZ_2M,
110                 .offset = SZ_256K,
111         },
112         [2] = {
113                 .name   = "Root",
114                 .offset = SZ_256K + SZ_2M,
115                 .size   = MTDPART_SIZ_FULL,
116         },
117 };
118
119 static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
120         [0] = {
121                 .name           = "nand",
122                 .nr_chips       = 1,
123                 .nr_partitions  = ARRAY_SIZE(at2440evb_default_nand_part),
124                 .partitions     = at2440evb_default_nand_part,
125         },
126 };
127
128 static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
129         .tacls          = 25,
130         .twrph0         = 55,
131         .twrph1         = 40,
132         .nr_sets        = ARRAY_SIZE(at2440evb_nand_sets),
133         .sets           = at2440evb_nand_sets,
134 };
135
136 /* DM9000AEP 10/100 ethernet controller */
137
138 static struct resource at2440evb_dm9k_resource[] = {
139         [0] = {
140                 .start = S3C2410_CS3,
141                 .end   = S3C2410_CS3 + 3,
142                 .flags = IORESOURCE_MEM
143         },
144         [1] = {
145                 .start = S3C2410_CS3 + 4,
146                 .end   = S3C2410_CS3 + 7,
147                 .flags = IORESOURCE_MEM
148         },
149         [2] = {
150                 .start = IRQ_EINT7,
151                 .end   = IRQ_EINT7,
152                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
153         }
154 };
155
156 static struct dm9000_plat_data at2440evb_dm9k_pdata = {
157         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
158 };
159
160 static struct platform_device at2440evb_device_eth = {
161         .name           = "dm9000",
162         .id             = -1,
163         .num_resources  = ARRAY_SIZE(at2440evb_dm9k_resource),
164         .resource       = at2440evb_dm9k_resource,
165         .dev            = {
166                 .platform_data  = &at2440evb_dm9k_pdata,
167         },
168 };
169
170 static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
171         .gpio_detect    = S3C2410_GPG(10),
172 };
173
174 /* 7" LCD panel */
175
176 static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
177
178         .lcdcon5        = S3C2410_LCDCON5_FRM565 |
179                           S3C2410_LCDCON5_INVVLINE |
180                           S3C2410_LCDCON5_INVVFRAME |
181                           S3C2410_LCDCON5_PWREN |
182                           S3C2410_LCDCON5_HWSWP,
183
184         .type           = S3C2410_LCDCON1_TFT,
185
186         .width          = 800,
187         .height         = 480,
188
189         .pixclock       = 33333, /* HCLK 60 MHz, divisor 2 */
190         .xres           = 800,
191         .yres           = 480,
192         .bpp            = 16,
193         .left_margin    = 88,
194         .right_margin   = 40,
195         .hsync_len      = 128,
196         .upper_margin   = 32,
197         .lower_margin   = 11,
198         .vsync_len      = 2,
199 };
200
201 static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
202         .displays       = &at2440evb_lcd_cfg,
203         .num_displays   = 1,
204         .default_display = 0,
205 };
206
207 static struct platform_device *at2440evb_devices[] __initdata = {
208         &s3c_device_ohci,
209         &s3c_device_wdt,
210         &s3c_device_adc,
211         &s3c_device_i2c0,
212         &s3c_device_rtc,
213         &s3c_device_nand,
214         &s3c_device_sdi,
215         &s3c_device_lcd,
216         &at2440evb_device_eth,
217 };
218
219 static void __init at2440evb_map_io(void)
220 {
221         s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
222         s3c24xx_init_clocks(16934400);
223         s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
224 }
225
226 static void __init at2440evb_init(void)
227 {
228         s3c24xx_fb_set_platdata(&at2440evb_fb_info);
229         s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
230         s3c_nand_set_platdata(&at2440evb_nand_info);
231         s3c_i2c0_set_platdata(NULL);
232
233         platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
234 }
235
236
237 MACHINE_START(AT2440EVB, "AT2440EVB")
238         .atag_offset    = 0x100,
239         .map_io         = at2440evb_map_io,
240         .init_machine   = at2440evb_init,
241         .init_irq       = s3c24xx_init_irq,
242         .timer          = &s3c24xx_timer,
243         .restart        = s3c2440_restart,
244 MACHINE_END