1 /* linux/arch/arm/mach-s5p64x0/include/mach/pm-core.h
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * S5P64X0 - PM core support for arch/arm/plat-samsung/pm.c
8 * Based on PM core support for S3C64XX by Ben Dooks
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/serial_s3c.h>
17 #include <mach/regs-gpio.h>
19 static inline void s3c_pm_debug_init_uart(void)
21 u32 tmp = __raw_readl(S5P64X0_CLK_GATE_PCLK);
24 * As a note, since the S5P64X0 UARTs generally have multiple
25 * clock sources, we simply enable PCLK at the moment and hope
26 * that the resume settings for the UART are suitable for the
29 tmp |= S5P64X0_CLK_GATE_PCLK_UART0;
30 tmp |= S5P64X0_CLK_GATE_PCLK_UART1;
31 tmp |= S5P64X0_CLK_GATE_PCLK_UART2;
32 tmp |= S5P64X0_CLK_GATE_PCLK_UART3;
34 __raw_writel(tmp, S5P64X0_CLK_GATE_PCLK);
38 static inline void s3c_pm_arch_prepare_irqs(void)
40 /* VIC should have already been taken care of */
42 /* clear any pending EINT0 interrupts */
43 __raw_writel(__raw_readl(S5P64X0_EINT0PEND), S5P64X0_EINT0PEND);
46 static inline void s3c_pm_arch_stop_clocks(void) { }
47 static inline void s3c_pm_arch_show_resume_irqs(void) { }
50 * make these defines, we currently do not have any need to change
51 * the IRQ wake controls depending on the CPU we are running on
53 #define s3c_irqwake_eintallow ((1 << 16) - 1)
54 #define s3c_irqwake_intallow (~0)
56 static inline void s3c_pm_arch_update_uart(void __iomem *regs,
57 struct pm_uart_save *save)
59 u32 ucon = __raw_readl(regs + S3C2410_UCON);
60 u32 ucon_clk = ucon & S3C6400_UCON_CLKMASK;
61 u32 save_clk = save->ucon & S3C6400_UCON_CLKMASK;
66 * S5P64X0 UART blocks only support level interrupts, so ensure that
67 * when we restore unused UART blocks we force the level interrupt
70 save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL;
73 * We have a constraint on changing the clock type of the UART
74 * between UCLKx and PCLK, so ensure that when we restore UCON
75 * that the CLK field is correctly modified if the bootloader
76 * has changed anything.
78 if (ucon_clk != save_clk) {
79 new_ucon = save->ucon;
80 delta = ucon_clk ^ save_clk;
83 * change from UCLKx => wrong PCLK,
84 * either UCLK can be tested for by a bit-test
87 if (ucon_clk & S3C6400_UCON_UCLK0 &&
88 !(save_clk & S3C6400_UCON_UCLK0) &&
89 delta & S3C6400_UCON_PCLK2) {
90 new_ucon &= ~S3C6400_UCON_UCLK0;
91 } else if (delta == S3C6400_UCON_PCLK2) {
93 * as a precaution, don't change from
94 * PCLK2 => PCLK or vice-versa
96 new_ucon ^= S3C6400_UCON_PCLK2;
99 S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n",
100 ucon, new_ucon, save->ucon);
101 save->ucon = new_ucon;
105 static inline void s3c_pm_restored_gpios(void)
107 /* ensure sleep mode has been cleared from the system */
108 __raw_writel(0, S5P64X0_SLPEN);
111 static inline void samsung_pm_saved_gpios(void)
114 * turn on the sleep mode and keep it there, as it seems that during
115 * suspend the xCON registers get re-set and thus you can end up with
116 * problems between going to sleep and resuming.
118 __raw_writel(S5P64X0_SLPEN_USE_xSLP, S5P64X0_SLPEN);