arch/arm/mach-s5pc100/include/mach/map.h

   1 /* linux/arch/arm/mach-s5pc100/include/mach/map.h
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * Copyright 2009 Samsung Electronics Co.
   7  *      Byungho Min <bhmin@samsung.com>
   8  *
   9  * S5PC100 - Memory map definitions
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14 */
  15
  16 #ifndef __ASM_ARCH_MAP_H
  17 #define __ASM_ARCH_MAP_H __FILE__
  18
  19 #include <plat/map-base.h>
  20 #include <plat/map-s5p.h>
  21
  22 #define S5PC100_PA_SDRAM                0x20000000
  23
  24 #define S5PC100_PA_ONENAND              0xE7100000
  25 #define S5PC100_PA_ONENAND_BUF          0xB0000000
  26
  27 #define S5PC100_PA_CHIPID               0xE0000000
  28
  29 #define S5PC100_PA_SYSCON               0xE0100000
  30
  31 #define S5PC100_PA_OTHERS               0xE0200000
  32
  33 #define S5PC100_PA_GPIO                 0xE0300000
  34
  35 #define S5PC100_PA_VIC0                 0xE4000000
  36 #define S5PC100_PA_VIC1                 0xE4100000
  37 #define S5PC100_PA_VIC2                 0xE4200000
  38
  39 #define S5PC100_PA_SROMC                0xE7000000
  40
  41 #define S5PC100_PA_CFCON                0xE7800000
  42
  43 #define S5PC100_PA_MDMA                 0xE8100000
  44 #define S5PC100_PA_PDMA0                0xE9000000
  45 #define S5PC100_PA_PDMA1                0xE9200000
  46
  47 #define S5PC100_PA_TIMER                0xEA000000
  48 #define S5PC100_PA_SYSTIMER             0xEA100000
  49 #define S5PC100_PA_WATCHDOG             0xEA200000
  50 #define S5PC100_PA_RTC                  0xEA300000
  51
  52 #define S5PC100_PA_UART                 0xEC000000
  53
  54 #define S5PC100_PA_IIC0                 0xEC100000
  55 #define S5PC100_PA_IIC1                 0xEC200000
  56
  57 #define S5PC100_PA_SPI0                 0xEC300000
  58 #define S5PC100_PA_SPI1                 0xEC400000
  59 #define S5PC100_PA_SPI2                 0xEC500000
  60
  61 #define S5PC100_PA_USB_HSOTG            0xED200000
  62 #define S5PC100_PA_USB_HSPHY            0xED300000
  63
  64 #define S5PC100_PA_HSMMC(x)             (0xED800000 + ((x) * 0x100000))
  65
  66 #define S5PC100_PA_FB                   0xEE000000
  67
  68 #define S5PC100_PA_FIMC0                0xEE200000
  69 #define S5PC100_PA_FIMC1                0xEE300000
  70 #define S5PC100_PA_FIMC2                0xEE400000
  71
  72 #define S5PC100_PA_I2S0                 0xF2000000
  73 #define S5PC100_PA_I2S1                 0xF2100000
  74 #define S5PC100_PA_I2S2                 0xF2200000
  75
  76 #define S5PC100_PA_AC97                 0xF2300000
  77
  78 #define S5PC100_PA_PCM0                 0xF2400000
  79 #define S5PC100_PA_PCM1                 0xF2500000
  80
  81 #define S5PC100_PA_SPDIF                0xF2600000
  82
  83 #define S5PC100_PA_TSADC                0xF3000000
  84
  85 #define S5PC100_PA_KEYPAD               0xF3100000
  86
  87 /* Compatibiltiy Defines */
  88
  89 #define S3C_PA_FB                       S5PC100_PA_FB
  90 #define S3C_PA_HSMMC0                   S5PC100_PA_HSMMC(0)
  91 #define S3C_PA_HSMMC1                   S5PC100_PA_HSMMC(1)
  92 #define S3C_PA_HSMMC2                   S5PC100_PA_HSMMC(2)
  93 #define S3C_PA_IIC                      S5PC100_PA_IIC0
  94 #define S3C_PA_IIC1                     S5PC100_PA_IIC1
  95 #define S3C_PA_KEYPAD                   S5PC100_PA_KEYPAD
  96 #define S3C_PA_ONENAND                  S5PC100_PA_ONENAND
  97 #define S3C_PA_ONENAND_BUF              S5PC100_PA_ONENAND_BUF
  98 #define S3C_PA_RTC                      S5PC100_PA_RTC
  99 #define S3C_PA_TSADC                    S5PC100_PA_TSADC
 100 #define S3C_PA_USB_HSOTG                S5PC100_PA_USB_HSOTG
 101 #define S3C_PA_USB_HSPHY                S5PC100_PA_USB_HSPHY
 102 #define S3C_PA_WDT                      S5PC100_PA_WATCHDOG
 103 #define S3C_PA_SPI0                     S5PC100_PA_SPI0
 104 #define S3C_PA_SPI1                     S5PC100_PA_SPI1
 105 #define S3C_PA_SPI2                     S5PC100_PA_SPI2
 106
 107 #define S5P_PA_CHIPID                   S5PC100_PA_CHIPID
 108 #define S5P_PA_FIMC0                    S5PC100_PA_FIMC0
 109 #define S5P_PA_FIMC1                    S5PC100_PA_FIMC1
 110 #define S5P_PA_FIMC2                    S5PC100_PA_FIMC2
 111 #define S5P_PA_SDRAM                    S5PC100_PA_SDRAM
 112 #define S5P_PA_SROMC                    S5PC100_PA_SROMC
 113 #define S5P_PA_SYSCON                   S5PC100_PA_SYSCON
 114 #define S5P_PA_TIMER                    S5PC100_PA_TIMER
 115
 116 #define SAMSUNG_PA_ADC                  S5PC100_PA_TSADC
 117 #define SAMSUNG_PA_CFCON                S5PC100_PA_CFCON
 118 #define SAMSUNG_PA_KEYPAD               S5PC100_PA_KEYPAD
 119 #define SAMSUNG_PA_TIMER                S5PC100_PA_TIMER
 120
 121 #define S5PC100_VA_OTHERS               (S3C_VA_SYS + 0x10000)
 122
 123 #define S3C_SZ_ONENAND_BUF              (SZ_256M - SZ_32M)
 124
 125 /* UART */
 126
 127 #define S3C_PA_UART                     S5PC100_PA_UART
 128
 129 #define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
 130 #define S5P_PA_UART0                    S5P_PA_UART(0)
 131 #define S5P_PA_UART1                    S5P_PA_UART(1)
 132 #define S5P_PA_UART2                    S5P_PA_UART(2)
 133 #define S5P_PA_UART3                    S5P_PA_UART(3)
 134
 135 #define S5P_SZ_UART                     SZ_256
 136
 137 #endif /* __ASM_ARCH_MAP_H */