2 * linux/arch/arm/mach-sa1100/irq.c
4 * Copyright (C) 1999-2001 Nicolas Pitre
6 * Generic IRQ handling for the SA11x0, GPIO 11-27 IRQ demultiplexing.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/ioport.h>
18 #include <linux/syscore_ops.h>
20 #include <mach/hardware.h>
21 #include <mach/irqs.h>
22 #include <asm/mach/irq.h>
23 #include <asm/exception.h>
29 * SA1100 GPIO edge detection for IRQs:
30 * IRQs are generated on Falling-Edge, Rising-Edge, or both.
31 * Use this instead of directly setting GRER/GFER.
33 static int GPIO_IRQ_rising_edge;
34 static int GPIO_IRQ_falling_edge;
35 static int GPIO_IRQ_mask = (1 << 11) - 1;
38 * To get the GPIO number from an IRQ number
40 #define GPIO_11_27_IRQ(i) ((i) + 11 - IRQ_GPIO11)
41 #define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq))
43 static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
47 if (d->irq <= IRQ_GPIO10)
50 mask = GPIO11_27_MASK(d->irq);
52 if (type == IRQ_TYPE_PROBE) {
53 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
55 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
58 if (type & IRQ_TYPE_EDGE_RISING) {
59 GPIO_IRQ_rising_edge |= mask;
61 GPIO_IRQ_rising_edge &= ~mask;
62 if (type & IRQ_TYPE_EDGE_FALLING) {
63 GPIO_IRQ_falling_edge |= mask;
65 GPIO_IRQ_falling_edge &= ~mask;
67 GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
68 GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
74 * GPIO IRQs must be acknowledged. This is for IRQs from GPIO0 to 10.
76 static void sa1100_low_gpio_ack(struct irq_data *d)
81 static void sa1100_low_gpio_mask(struct irq_data *d)
83 ICMR &= ~(1 << d->irq);
86 static void sa1100_low_gpio_unmask(struct irq_data *d)
91 static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on)
96 PWER &= ~(1 << d->irq);
100 static struct irq_chip sa1100_low_gpio_chip = {
102 .irq_ack = sa1100_low_gpio_ack,
103 .irq_mask = sa1100_low_gpio_mask,
104 .irq_unmask = sa1100_low_gpio_unmask,
105 .irq_set_type = sa1100_gpio_type,
106 .irq_set_wake = sa1100_low_gpio_wake,
110 * IRQ11 (GPIO11 through 27) handler. We enter here with the
111 * irq_controller_lock held, and IRQs disabled. Decode the IRQ
112 * and call the handler.
115 sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
119 mask = GEDR & 0xfffff800;
122 * clear down all currently active IRQ sources.
123 * We will be processing them all.
131 generic_handle_irq(irq);
136 mask = GEDR & 0xfffff800;
141 * Like GPIO0 to 10, GPIO11-27 IRQs need to be handled specially.
142 * In addition, the IRQs are all collected up into one bit in the
143 * interrupt controller registers.
145 static void sa1100_high_gpio_ack(struct irq_data *d)
147 unsigned int mask = GPIO11_27_MASK(d->irq);
152 static void sa1100_high_gpio_mask(struct irq_data *d)
154 unsigned int mask = GPIO11_27_MASK(d->irq);
156 GPIO_IRQ_mask &= ~mask;
162 static void sa1100_high_gpio_unmask(struct irq_data *d)
164 unsigned int mask = GPIO11_27_MASK(d->irq);
166 GPIO_IRQ_mask |= mask;
168 GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
169 GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
172 static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on)
175 PWER |= GPIO11_27_MASK(d->irq);
177 PWER &= ~GPIO11_27_MASK(d->irq);
181 static struct irq_chip sa1100_high_gpio_chip = {
183 .irq_ack = sa1100_high_gpio_ack,
184 .irq_mask = sa1100_high_gpio_mask,
185 .irq_unmask = sa1100_high_gpio_unmask,
186 .irq_set_type = sa1100_gpio_type,
187 .irq_set_wake = sa1100_high_gpio_wake,
191 * We don't need to ACK IRQs on the SA1100 unless they're GPIOs
192 * this is for internal IRQs i.e. from IRQ LCD to RTCAlrm.
194 static void sa1100_mask_irq(struct irq_data *d)
196 ICMR &= ~(1 << d->irq);
199 static void sa1100_unmask_irq(struct irq_data *d)
201 ICMR |= (1 << d->irq);
205 * Apart form GPIOs, only the RTC alarm can be a wakeup event.
207 static int sa1100_set_wake(struct irq_data *d, unsigned int on)
209 if (d->irq == IRQ_RTCAlrm) {
219 static struct irq_chip sa1100_normal_chip = {
221 .irq_ack = sa1100_mask_irq,
222 .irq_mask = sa1100_mask_irq,
223 .irq_unmask = sa1100_unmask_irq,
224 .irq_set_wake = sa1100_set_wake,
227 static struct resource irq_resource =
228 DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
230 static struct sa1100irq_state {
237 static int sa1100irq_suspend(void)
239 struct sa1100irq_state *st = &sa1100irq_state;
247 * Disable all GPIO-based interrupts.
249 ICMR &= ~(IC_GPIO11_27|IC_GPIO10|IC_GPIO9|IC_GPIO8|IC_GPIO7|
250 IC_GPIO6|IC_GPIO5|IC_GPIO4|IC_GPIO3|IC_GPIO2|
254 * Set the appropriate edges for wakeup.
256 GRER = PWER & GPIO_IRQ_rising_edge;
257 GFER = PWER & GPIO_IRQ_falling_edge;
260 * Clear any pending GPIO interrupts.
267 static void sa1100irq_resume(void)
269 struct sa1100irq_state *st = &sa1100irq_state;
275 GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
276 GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
282 static struct syscore_ops sa1100irq_syscore_ops = {
283 .suspend = sa1100irq_suspend,
284 .resume = sa1100irq_resume,
287 static int __init sa1100irq_init_devicefs(void)
289 register_syscore_ops(&sa1100irq_syscore_ops);
293 device_initcall(sa1100irq_init_devicefs);
295 static asmlinkage void __exception_irq_entry
296 sa1100_handle_irq(struct pt_regs *regs)
298 uint32_t icip, icmr, mask;
308 handle_IRQ(ffs(mask) - 1 + IRQ_GPIO0, regs);
312 void __init sa1100_init_irq(void)
316 request_resource(&iomem_resource, &irq_resource);
318 /* disable all IRQs */
321 /* all IRQs are IRQ, not FIQ */
324 /* clear all GPIO edge detects */
330 * Whatever the doc says, this has to be set for the wait-on-irq
331 * instruction to work... on a SA1100 rev 9 at least.
335 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO10; irq++) {
336 irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip,
338 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
341 for (irq = IRQ_LCD; irq <= IRQ_RTCAlrm; irq++) {
342 irq_set_chip_and_handler(irq, &sa1100_normal_chip,
344 set_irq_flags(irq, IRQF_VALID);
347 for (irq = IRQ_GPIO11; irq <= IRQ_GPIO27; irq++) {
348 irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip,
350 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
354 * Install handler for GPIO 11-27 edge detect interrupts
356 irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
357 irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
359 set_handle_irq(sa1100_handle_irq);