arch/arm/mach-shmobile/board-bockw.c

   1 /*
   2  * Bock-W board support
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  * Copyright (C) 2013  Cogent Embedded, Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  20  */
  21
  22 #include <linux/mfd/tmio.h>
  23 #include <linux/mmc/host.h>
  24 #include <linux/mmc/sh_mobile_sdhi.h>
  25 #include <linux/mmc/sh_mmcif.h>
  26 #include <linux/mtd/partitions.h>
  27 #include <linux/pinctrl/machine.h>
  28 #include <linux/platform_data/usb-rcar-phy.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/regulator/fixed.h>
  31 #include <linux/regulator/machine.h>
  32 #include <linux/smsc911x.h>
  33 #include <linux/spi/spi.h>
  34 #include <linux/spi/flash.h>
  35 #include <media/soc_camera.h>
  36 #include <mach/common.h>
  37 #include <mach/irqs.h>
  38 #include <mach/r8a7778.h>
  39 #include <asm/mach/arch.h>
  40
  41 /*
  42  *      CN9(Upper side) SCIF/RCAN selection
  43  *
  44  *              1,4     3,6
  45  * SW40         SCIF    RCAN
  46  * SW41         SCIF    RCAN
  47  */
  48
  49 /*
  50  * MMC (CN26) pin
  51  *
  52  * SW6  (D2)    3 pin
  53  * SW7  (D5)    ON
  54  * SW8  (D3)    3 pin
  55  * SW10 (D4)    1 pin
  56  * SW12 (CLK)   1 pin
  57  * SW13 (D6)    3 pin
  58  * SW14 (CMD)   ON
  59  * SW15 (D6)    1 pin
  60  * SW16 (D0)    ON
  61  * SW17 (D1)    ON
  62  * SW18 (D7)    3 pin
  63  * SW19 (MMC)   1 pin
  64  */
  65
  66 /* Dummy supplies, where voltage doesn't matter */
  67 static struct regulator_consumer_supply dummy_supplies[] = {
  68         REGULATOR_SUPPLY("vddvario", "smsc911x"),
  69         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  70 };
  71
  72 static struct smsc911x_platform_config smsc911x_data __initdata = {
  73         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  74         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
  75         .flags          = SMSC911X_USE_32BIT,
  76         .phy_interface  = PHY_INTERFACE_MODE_MII,
  77 };
  78
  79 static struct resource smsc911x_resources[] __initdata = {
  80         DEFINE_RES_MEM(0x18300000, 0x1000),
  81         DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  82 };
  83
  84 /* USB */
  85 static struct resource usb_phy_resources[] __initdata = {
  86         DEFINE_RES_MEM(0xffe70800, 0x100),
  87         DEFINE_RES_MEM(0xffe76000, 0x100),
  88 };
  89
  90 static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
  91
  92 /* SDHI */
  93 static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  94         .tmio_caps      = MMC_CAP_SD_HIGHSPEED,
  95         .tmio_ocr_mask  = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  96         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT,
  97 };
  98
  99 static struct resource sdhi0_resources[] __initdata = {
 100         DEFINE_RES_MEM(0xFFE4C000, 0x100),
 101         DEFINE_RES_IRQ(gic_iid(0x77)),
 102 };
 103
 104 /* Ether */
 105 static struct resource ether_resources[] __initdata = {
 106         DEFINE_RES_MEM(0xfde00000, 0x400),
 107         DEFINE_RES_IRQ(gic_iid(0x89)),
 108 };
 109
 110 static struct sh_eth_plat_data ether_platform_data __initdata = {
 111         .phy            = 0x01,
 112         .edmac_endian   = EDMAC_LITTLE_ENDIAN,
 113         .phy_interface  = PHY_INTERFACE_MODE_RMII,
 114         /*
 115          * Although the LINK signal is available on the board, it's connected to
 116          * the link/activity LED output of the PHY, thus the link disappears and
 117          * reappears after each packet.  We'd be better off ignoring such signal
 118          * and getting the link state from the PHY indirectly.
 119          */
 120         .no_ether_link  = 1,
 121 };
 122
 123 /* I2C */
 124 static struct i2c_board_info i2c0_devices[] = {
 125         {
 126                 I2C_BOARD_INFO("rx8581", 0x51),
 127         },
 128 };
 129
 130 /* HSPI*/
 131 static struct mtd_partition m25p80_spi_flash_partitions[] = {
 132         {
 133                 .name   = "data(spi)",
 134                 .size   = 0x0100000,
 135                 .offset = 0,
 136         },
 137 };
 138
 139 static struct flash_platform_data spi_flash_data = {
 140         .name           = "m25p80",
 141         .type           = "s25fl008k",
 142         .parts          = m25p80_spi_flash_partitions,
 143         .nr_parts       = ARRAY_SIZE(m25p80_spi_flash_partitions),
 144 };
 145
 146 static struct spi_board_info spi_board_info[] __initdata = {
 147         {
 148                 .modalias       = "m25p80",
 149                 .max_speed_hz   = 104000000,
 150                 .chip_select    = 0,
 151                 .bus_num        = 0,
 152                 .mode           = SPI_MODE_0,
 153                 .platform_data  = &spi_flash_data,
 154         },
 155 };
 156
 157 /* MMC */
 158 static struct resource mmc_resources[] __initdata = {
 159         DEFINE_RES_MEM(0xffe4e000, 0x100),
 160         DEFINE_RES_IRQ(gic_iid(0x5d)),
 161 };
 162
 163 static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
 164         .sup_pclk       = 0,
 165         .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
 166         .caps           = MMC_CAP_4_BIT_DATA |
 167                           MMC_CAP_8_BIT_DATA |
 168                           MMC_CAP_NEEDS_POLL,
 169 };
 170
 171 /* In the default configuration both decoders reside on I2C bus 0 */
 172 #define BOCKW_CAMERA(idx)                                               \
 173 static struct i2c_board_info camera##idx##_info = {                     \
 174         I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)),                  \
 175 };                                                                      \
 176                                                                         \
 177 static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = {    \
 178         .bus_id         = idx,                                          \
 179         .i2c_adapter_id = 0,                                            \
 180         .board_info     = &camera##idx##_info,                          \
 181 }
 182
 183 BOCKW_CAMERA(0);
 184 BOCKW_CAMERA(1);
 185
 186 /* VIN */
 187 static struct rcar_vin_platform_data vin_platform_data __initdata = {
 188         .flags  = RCAR_VIN_BT656,
 189 };
 190
 191 #define R8A7778_VIN(idx)                                                \
 192 static struct resource vin##idx##_resources[] __initdata = {            \
 193         DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),            \
 194         DEFINE_RES_IRQ(gic_iid(0x5a)),                                  \
 195 };                                                                      \
 196                                                                         \
 197 static struct platform_device_info vin##idx##_info __initdata = {       \
 198         .parent         = &platform_bus,                                \
 199         .name           = "r8a7778-vin",                                \
 200         .id             = idx,                                          \
 201         .res            = vin##idx##_resources,                         \
 202         .num_res        = ARRAY_SIZE(vin##idx##_resources),             \
 203         .dma_mask       = DMA_BIT_MASK(32),                             \
 204         .data           = &vin_platform_data,                           \
 205         .size_data      = sizeof(vin_platform_data),                    \
 206 }
 207 R8A7778_VIN(0);
 208 R8A7778_VIN(1);
 209
 210 static const struct pinctrl_map bockw_pinctrl_map[] = {
 211         /* Ether */
 212         PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
 213                                   "ether_rmii", "ether"),
 214         /* HSPI0 */
 215         PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
 216                                   "hspi0_a", "hspi0"),
 217         /* MMC */
 218         PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
 219                                   "mmc_data8", "mmc"),
 220         PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
 221                                   "mmc_ctrl", "mmc"),
 222         /* SCIF0 */
 223         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
 224                                   "scif0_data_a", "scif0"),
 225         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
 226                                   "scif0_ctrl", "scif0"),
 227         /* USB */
 228         PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
 229                                   "usb0", "usb0"),
 230         PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
 231                                   "usb1", "usb1"),
 232         /* SDHI0 */
 233         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 234                                   "sdhi0_data4", "sdhi0"),
 235         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 236                                   "sdhi0_ctrl", "sdhi0"),
 237         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 238                                   "sdhi0_cd", "sdhi0"),
 239         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 240                                   "sdhi0_wp", "sdhi0"),
 241         /* VIN0 */
 242         PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
 243                                   "vin0_clk", "vin0"),
 244         PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
 245                                   "vin0_data8", "vin0"),
 246         /* VIN1 */
 247         PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
 248                                   "vin1_clk", "vin1"),
 249         PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
 250                                   "vin1_data8", "vin1"),
 251 };
 252
 253 #define FPGA    0x18200000
 254 #define IRQ0MR  0x30
 255 #define PFC     0xfffc0000
 256 #define PUPR4   0x110
 257 static void __init bockw_init(void)
 258 {
 259         void __iomem *base;
 260
 261         r8a7778_clock_init();
 262         r8a7778_init_irq_extpin(1);
 263         r8a7778_add_standard_devices();
 264
 265         platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
 266                                           ether_resources,
 267                                           ARRAY_SIZE(ether_resources),
 268                                           &ether_platform_data,
 269                                           sizeof(ether_platform_data));
 270
 271         platform_device_register_full(&vin0_info);
 272         /* VIN1 has a pin conflict with Ether */
 273         if (!IS_ENABLED(CONFIG_SH_ETH))
 274                 platform_device_register_full(&vin1_info);
 275         platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
 276                                       &iclink0_ml86v7667,
 277                                       sizeof(iclink0_ml86v7667));
 278         platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
 279                                       &iclink1_ml86v7667,
 280                                       sizeof(iclink1_ml86v7667));
 281
 282         i2c_register_board_info(0, i2c0_devices,
 283                                 ARRAY_SIZE(i2c0_devices));
 284         spi_register_board_info(spi_board_info,
 285                                 ARRAY_SIZE(spi_board_info));
 286         pinctrl_register_mappings(bockw_pinctrl_map,
 287                                   ARRAY_SIZE(bockw_pinctrl_map));
 288         r8a7778_pinmux_init();
 289
 290         platform_device_register_resndata(
 291                 &platform_bus, "sh_mmcif", -1,
 292                 mmc_resources, ARRAY_SIZE(mmc_resources),
 293                 &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
 294
 295         platform_device_register_resndata(
 296                 &platform_bus, "rcar_usb_phy", -1,
 297                 usb_phy_resources,
 298                 ARRAY_SIZE(usb_phy_resources),
 299                 &usb_phy_platform_data,
 300                 sizeof(struct rcar_phy_platform_data));
 301
 302
 303         /* for SMSC */
 304         base = ioremap_nocache(FPGA, SZ_1M);
 305         if (base) {
 306                 /*
 307                  * CAUTION
 308                  *
 309                  * IRQ0/1 is cascaded interrupt from FPGA.
 310                  * it should be cared in the future
 311                  * Now, it is assuming IRQ0 was used only from SMSC.
 312                  */
 313                 u16 val = ioread16(base + IRQ0MR);
 314                 val &= ~(1 << 4); /* enable SMSC911x */
 315                 iowrite16(val, base + IRQ0MR);
 316                 iounmap(base);
 317
 318                 regulator_register_fixed(0, dummy_supplies,
 319                                          ARRAY_SIZE(dummy_supplies));
 320
 321                 platform_device_register_resndata(
 322                         &platform_bus, "smsc911x", -1,
 323                         smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
 324                         &smsc911x_data, sizeof(smsc911x_data));
 325         }
 326
 327         /* for SDHI */
 328         base = ioremap_nocache(PFC, 0x200);
 329         if (base) {
 330                 /*
 331                  * FIXME
 332                  *
 333                  * SDHI CD/WP pin needs pull-up
 334                  */
 335                 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
 336                 iounmap(base);
 337
 338                 platform_device_register_resndata(
 339                         &platform_bus, "sh_mobile_sdhi", 0,
 340                         sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
 341                         &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
 342         }
 343 }
 344
 345 static const char *bockw_boards_compat_dt[] __initdata = {
 346         "renesas,bockw",
 347         NULL,
 348 };
 349
 350 DT_MACHINE_START(BOCKW_DT, "bockw")
 351         .init_early     = r8a7778_init_delay,
 352         .init_irq       = r8a7778_init_irq_dt,
 353         .init_machine   = bockw_init,
 354         .dt_compat      = bockw_boards_compat_dt,
 355         .init_late      = r8a7778_init_late,
 356 MACHINE_END