arch/arm/mach-shmobile/setup-r8a7779.c

   1 /*
   2  * r8a7779 processor support
   3  *
   4  * Copyright (C) 2011  Renesas Solutions Corp.
   5  * Copyright (C) 2011  Magnus Damm
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/irq.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/delay.h>
  26 #include <linux/input.h>
  27 #include <linux/io.h>
  28 #include <linux/serial_sci.h>
  29 #include <linux/sh_intc.h>
  30 #include <linux/sh_timer.h>
  31 #include <mach/hardware.h>
  32 #include <mach/r8a7779.h>
  33 #include <mach/common.h>
  34 #include <asm/mach-types.h>
  35 #include <asm/mach/arch.h>
  36
  37 static struct plat_sci_port scif0_platform_data = {
  38         .mapbase        = 0xffe40000,
  39         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  40         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  41         .scbrr_algo_id  = SCBRR_ALGO_2,
  42         .type           = PORT_SCIF,
  43         .irqs           = { gic_spi(88), gic_spi(88),
  44                             gic_spi(88), gic_spi(88) },
  45 };
  46
  47 static struct platform_device scif0_device = {
  48         .name           = "sh-sci",
  49         .id             = 0,
  50         .dev            = {
  51                 .platform_data  = &scif0_platform_data,
  52         },
  53 };
  54
  55 static struct plat_sci_port scif1_platform_data = {
  56         .mapbase        = 0xffe41000,
  57         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  58         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  59         .scbrr_algo_id  = SCBRR_ALGO_2,
  60         .type           = PORT_SCIF,
  61         .irqs           = { gic_spi(89), gic_spi(89),
  62                             gic_spi(89), gic_spi(89) },
  63 };
  64
  65 static struct platform_device scif1_device = {
  66         .name           = "sh-sci",
  67         .id             = 1,
  68         .dev            = {
  69                 .platform_data  = &scif1_platform_data,
  70         },
  71 };
  72
  73 static struct plat_sci_port scif2_platform_data = {
  74         .mapbase        = 0xffe42000,
  75         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  76         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  77         .scbrr_algo_id  = SCBRR_ALGO_2,
  78         .type           = PORT_SCIF,
  79         .irqs           = { gic_spi(90), gic_spi(90),
  80                             gic_spi(90), gic_spi(90) },
  81 };
  82
  83 static struct platform_device scif2_device = {
  84         .name           = "sh-sci",
  85         .id             = 2,
  86         .dev            = {
  87                 .platform_data  = &scif2_platform_data,
  88         },
  89 };
  90
  91 static struct plat_sci_port scif3_platform_data = {
  92         .mapbase        = 0xffe43000,
  93         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  94         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  95         .scbrr_algo_id  = SCBRR_ALGO_2,
  96         .type           = PORT_SCIF,
  97         .irqs           = { gic_spi(91), gic_spi(91),
  98                             gic_spi(91), gic_spi(91) },
  99 };
 100
 101 static struct platform_device scif3_device = {
 102         .name           = "sh-sci",
 103         .id             = 3,
 104         .dev            = {
 105                 .platform_data  = &scif3_platform_data,
 106         },
 107 };
 108
 109 static struct plat_sci_port scif4_platform_data = {
 110         .mapbase        = 0xffe44000,
 111         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 112         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 113         .scbrr_algo_id  = SCBRR_ALGO_2,
 114         .type           = PORT_SCIF,
 115         .irqs           = { gic_spi(92), gic_spi(92),
 116                             gic_spi(92), gic_spi(92) },
 117 };
 118
 119 static struct platform_device scif4_device = {
 120         .name           = "sh-sci",
 121         .id             = 4,
 122         .dev            = {
 123                 .platform_data  = &scif4_platform_data,
 124         },
 125 };
 126
 127 static struct plat_sci_port scif5_platform_data = {
 128         .mapbase        = 0xffe45000,
 129         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 130         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 131         .scbrr_algo_id  = SCBRR_ALGO_2,
 132         .type           = PORT_SCIF,
 133         .irqs           = { gic_spi(93), gic_spi(93),
 134                             gic_spi(93), gic_spi(93) },
 135 };
 136
 137 static struct platform_device scif5_device = {
 138         .name           = "sh-sci",
 139         .id             = 5,
 140         .dev            = {
 141                 .platform_data  = &scif5_platform_data,
 142         },
 143 };
 144
 145 /* TMU */
 146 static struct sh_timer_config tmu00_platform_data = {
 147         .name = "TMU00",
 148         .channel_offset = 0x4,
 149         .timer_bit = 0,
 150         .clockevent_rating = 200,
 151 };
 152
 153 static struct resource tmu00_resources[] = {
 154         [0] = {
 155                 .name   = "TMU00",
 156                 .start  = 0xffd80008,
 157                 .end    = 0xffd80013,
 158                 .flags  = IORESOURCE_MEM,
 159         },
 160         [1] = {
 161                 .start  = gic_spi(32),
 162                 .flags  = IORESOURCE_IRQ,
 163         },
 164 };
 165
 166 static struct platform_device tmu00_device = {
 167         .name           = "sh_tmu",
 168         .id             = 0,
 169         .dev = {
 170                 .platform_data  = &tmu00_platform_data,
 171         },
 172         .resource       = tmu00_resources,
 173         .num_resources  = ARRAY_SIZE(tmu00_resources),
 174 };
 175
 176 static struct sh_timer_config tmu01_platform_data = {
 177         .name = "TMU01",
 178         .channel_offset = 0x10,
 179         .timer_bit = 1,
 180         .clocksource_rating = 200,
 181 };
 182
 183 static struct resource tmu01_resources[] = {
 184         [0] = {
 185                 .name   = "TMU01",
 186                 .start  = 0xffd80014,
 187                 .end    = 0xffd8001f,
 188                 .flags  = IORESOURCE_MEM,
 189         },
 190         [1] = {
 191                 .start  = gic_spi(33),
 192                 .flags  = IORESOURCE_IRQ,
 193         },
 194 };
 195
 196 static struct platform_device tmu01_device = {
 197         .name           = "sh_tmu",
 198         .id             = 1,
 199         .dev = {
 200                 .platform_data  = &tmu01_platform_data,
 201         },
 202         .resource       = tmu01_resources,
 203         .num_resources  = ARRAY_SIZE(tmu01_resources),
 204 };
 205
 206 static struct platform_device *r8a7779_early_devices[] __initdata = {
 207         &scif0_device,
 208         &scif1_device,
 209         &scif2_device,
 210         &scif3_device,
 211         &scif4_device,
 212         &scif5_device,
 213         &tmu00_device,
 214         &tmu01_device,
 215 };
 216
 217 static struct platform_device *r8a7779_late_devices[] __initdata = {
 218 };
 219
 220 void __init r8a7779_add_standard_devices(void)
 221 {
 222         r8a7779_pm_init();
 223
 224         r8a7779_init_pm_domain(&r8a7779_sh4a);
 225         r8a7779_init_pm_domain(&r8a7779_sgx);
 226         r8a7779_init_pm_domain(&r8a7779_vdp1);
 227         r8a7779_init_pm_domain(&r8a7779_impx3);
 228
 229         platform_add_devices(r8a7779_early_devices,
 230                             ARRAY_SIZE(r8a7779_early_devices));
 231         platform_add_devices(r8a7779_late_devices,
 232                             ARRAY_SIZE(r8a7779_late_devices));
 233 }
 234
 235 void __init r8a7779_add_early_devices(void)
 236 {
 237         early_platform_add_devices(r8a7779_early_devices,
 238                                    ARRAY_SIZE(r8a7779_early_devices));
 239 }