2 * arch/arm/mach-spear3xx/spear300.c
4 * SPEAr300 machine source file
6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #define pr_fmt(fmt) "SPEAr300: " fmt
16 #include <linux/amba/pl08x.h>
17 #include <linux/of_platform.h>
18 #include <asm/hardware/vic.h>
19 #include <asm/mach/arch.h>
20 #include <plat/shirq.h>
21 #include <mach/generic.h>
22 #include <mach/spear.h>
24 /* Base address of various IPs */
25 #define SPEAR300_TELECOM_BASE UL(0x50000000)
27 /* Interrupt registers offsets and masks */
28 #define SPEAR300_INT_ENB_MASK_REG 0x54
29 #define SPEAR300_INT_STS_MASK_REG 0x58
30 #define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0)
31 #define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1)
32 #define SPEAR300_I2S_IRQ_MASK (1 << 2)
33 #define SPEAR300_TDM_IRQ_MASK (1 << 3)
34 #define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4)
35 #define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5)
36 #define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6)
37 #define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7)
38 #define SPEAR300_GPIO1_IRQ_MASK (1 << 8)
40 #define SPEAR300_SHIRQ_RAS1_MASK 0x1FF
42 #define SPEAR300_SOC_CONFIG_BASE UL(0x99000000)
45 /* SPEAr300 Virtual irq definitions */
46 /* IRQs sharing IRQ_GEN_RAS_1 */
47 #define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0)
48 #define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1)
49 #define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2)
50 #define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3)
51 #define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4)
52 #define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5)
53 #define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6)
54 #define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7)
55 #define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8)
57 /* IRQs sharing IRQ_GEN_RAS_3 */
58 #define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3
60 /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
61 #define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM
63 /* spear3xx shared irq */
64 static struct shirq_dev_config shirq_ras1_config[] = {
66 .virq = SPEAR300_VIRQ_IT_PERS_S,
67 .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
68 .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
70 .virq = SPEAR300_VIRQ_IT_CHANGE_S,
71 .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
72 .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
74 .virq = SPEAR300_VIRQ_I2S,
75 .enb_mask = SPEAR300_I2S_IRQ_MASK,
76 .status_mask = SPEAR300_I2S_IRQ_MASK,
78 .virq = SPEAR300_VIRQ_TDM,
79 .enb_mask = SPEAR300_TDM_IRQ_MASK,
80 .status_mask = SPEAR300_TDM_IRQ_MASK,
82 .virq = SPEAR300_VIRQ_CAMERA_L,
83 .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
84 .status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
86 .virq = SPEAR300_VIRQ_CAMERA_F,
87 .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
88 .status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
90 .virq = SPEAR300_VIRQ_CAMERA_V,
91 .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
92 .status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
94 .virq = SPEAR300_VIRQ_KEYBOARD,
95 .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
96 .status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
98 .virq = SPEAR300_VIRQ_GPIO1,
99 .enb_mask = SPEAR300_GPIO1_IRQ_MASK,
100 .status_mask = SPEAR300_GPIO1_IRQ_MASK,
104 static struct spear_shirq shirq_ras1 = {
105 .irq = SPEAR3XX_IRQ_GEN_RAS_1,
106 .dev_config = shirq_ras1_config,
107 .dev_count = ARRAY_SIZE(shirq_ras1_config),
109 .enb_reg = SPEAR300_INT_ENB_MASK_REG,
110 .status_reg = SPEAR300_INT_STS_MASK_REG,
111 .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
116 /* DMAC platform data's slave info */
117 struct pl08x_channel_data spear300_dma_info[] = {
119 .bus_id = "uart0_rx",
123 .periph_buses = PL08X_AHB1,
125 .bus_id = "uart0_tx",
129 .periph_buses = PL08X_AHB1,
135 .periph_buses = PL08X_AHB1,
141 .periph_buses = PL08X_AHB1,
147 .periph_buses = PL08X_AHB1,
153 .periph_buses = PL08X_AHB1,
159 .periph_buses = PL08X_AHB1,
165 .periph_buses = PL08X_AHB1,
171 .periph_buses = PL08X_AHB1,
173 .bus_id = "from_jpeg",
177 .periph_buses = PL08X_AHB1,
183 .periph_buses = PL08X_AHB1,
189 .periph_buses = PL08X_AHB1,
195 .periph_buses = PL08X_AHB1,
201 .periph_buses = PL08X_AHB1,
207 .periph_buses = PL08X_AHB1,
213 .periph_buses = PL08X_AHB1,
219 .periph_buses = PL08X_AHB1,
225 .periph_buses = PL08X_AHB1,
231 .periph_buses = PL08X_AHB1,
237 .periph_buses = PL08X_AHB1,
243 .periph_buses = PL08X_AHB1,
249 .periph_buses = PL08X_AHB1,
255 .periph_buses = PL08X_AHB1,
261 .periph_buses = PL08X_AHB1,
267 .periph_buses = PL08X_AHB1,
273 .periph_buses = PL08X_AHB1,
277 /* Add SPEAr300 auxdata to pass platform data */
278 static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
279 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
281 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
286 static void __init spear300_dt_init(void)
290 pl080_plat_data.slave_channels = spear300_dma_info;
291 pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
293 of_platform_populate(NULL, of_default_bus_match_table,
294 spear300_auxdata_lookup, NULL);
296 /* shared irq registration */
297 shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
298 if (shirq_ras1.regs.base) {
299 ret = spear_shirq_register(&shirq_ras1);
301 pr_err("Error registering Shared IRQ\n");
305 static const char * const spear300_dt_board_compat[] = {
311 static void __init spear300_map_io(void)
316 DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
317 .map_io = spear300_map_io,
318 .init_irq = spear3xx_dt_init_irq,
319 .handle_irq = vic_handle_irq,
320 .timer = &spear3xx_timer,
321 .init_machine = spear300_dt_init,
322 .restart = spear_restart,
323 .dt_compat = spear300_dt_board_compat,