2 * arch/arm/mach-tegra/sleep.S
4 * Copyright (c) 2010-2011, NVIDIA Corporation.
5 * Copyright (c) 2011, Google, Inc.
7 * Author: Colin Cross <ccross@android.com>
8 * Gary King <gking@nvidia.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
25 #include <linux/linkage.h>
27 #include <mach/iomap.h>
31 #define TEGRA_FLOW_CTRL_VIRT (TEGRA_FLOW_CTRL_BASE - IO_PPSB_PHYS \
34 /* returns the offset of the flow controller halt register for a cpu */
35 .macro cpu_to_halt_reg rd, rcpu
38 movne \rd, \rd, lsl #3
43 /* returns the offset of the flow controller csr register for a cpu */
44 .macro cpu_to_csr_reg rd, rcpu
47 movne \rd, \rd, lsl #3
52 /* returns the ID of the current processor */
54 mrc p15, 0, \rd, c0, c0, 5
58 /* loads a 32-bit value into a register without a data access */
59 .macro mov32, reg, val
60 movw \reg, #:lower16:\val
61 movt \reg, #:upper16:\val
67 * puts current CPU in clock-gated wfi using the flow controller
70 * must be called with MMU on
75 cpu_to_halt_reg r1, r0
77 mov32 r0, TEGRA_FLOW_CTRL_VIRT
78 mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
79 str r3, [r0, r2] @ clear event & interrupt status
80 mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME
81 str r3, [r0, r1] @ put flow controller in wait irq mode
85 str r3, [r0, r1] @ clear flow controller halt status
86 mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
87 str r3, [r0, r2] @ clear event & interrupt status
90 ENDPROC(tegra_cpu_wfi)