2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
5 * Copyright (C) 2011 Xilinx
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/cpumask.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
22 #include <linux/clk-provider.h>
23 #include <linux/clk/zynq.h>
24 #include <linux/clocksource.h>
25 #include <linux/of_address.h>
26 #include <linux/of_irq.h>
27 #include <linux/of_platform.h>
29 #include <linux/memblock.h>
30 #include <linux/irqchip.h>
31 #include <linux/irqchip/arm-gic.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/map.h>
35 #include <asm/mach/time.h>
36 #include <asm/mach-types.h>
38 #include <asm/pgtable.h>
39 #include <asm/smp_scu.h>
40 #include <asm/hardware/cache-l2x0.h>
44 void __iomem *zynq_scu_base;
47 * zynq_memory_init - Initialize special memory
49 * We need to stop things allocating the low memory as DMA can't work in
50 * the 1st 512K of memory.
52 static void __init zynq_memory_init(void)
54 if (!__pa(PAGE_OFFSET))
55 memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir));
58 static struct platform_device zynq_cpuidle_device = {
59 .name = "cpuidle-zynq",
63 * zynq_init_machine - System specific initialization, intended to be
64 * called from board specific initialization.
66 static void __init zynq_init_machine(void)
68 struct platform_device_info devinfo = { .name = "cpufreq-cpu0", };
70 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
72 platform_device_register(&zynq_cpuidle_device);
73 platform_device_register_full(&devinfo);
78 static void __init zynq_timer_init(void)
80 zynq_early_slcr_init();
84 clocksource_of_init();
87 static struct map_desc zynq_cortex_a9_scu_map __initdata = {
92 static void __init zynq_scu_map_io(void)
96 base = scu_a9_get_base();
97 zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
98 /* Expected address is in vmalloc area that's why simple assign here */
99 zynq_cortex_a9_scu_map.virtual = base;
100 iotable_init(&zynq_cortex_a9_scu_map, 1);
101 zynq_scu_base = (void __iomem *)base;
102 BUG_ON(!zynq_scu_base);
106 * zynq_map_io - Create memory mappings needed for early I/O.
108 static void __init zynq_map_io(void)
114 static void __init zynq_irq_init(void)
116 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
120 static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
122 zynq_slcr_system_reset();
125 static const char * const zynq_dt_match[] = {
130 DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
131 /* 64KB way size, 8-way associativity, parity disabled */
132 .l2c_aux_val = 0x02000000,
133 .l2c_aux_mask = 0xf0ffffff,
134 .smp = smp_ops(zynq_smp_ops),
135 .map_io = zynq_map_io,
136 .init_irq = zynq_irq_init,
137 .init_machine = zynq_init_machine,
138 .init_time = zynq_timer_init,
139 .dt_compat = zynq_dt_match,
140 .reserve = zynq_memory_init,
141 .restart = zynq_system_reset,