arch/mips/mti-malta/malta-time.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  *  This program is free software; you can distribute it and/or modify it
   6  *  under the terms of the GNU General Public License (Version 2) as
   7  *  published by the Free Software Foundation.
   8  *
   9  *  This program is distributed in the hope it will be useful, but WITHOUT
  10  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  *  for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License along
  15  *  with this program; if not, write to the Free Software Foundation, Inc.,
  16  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17  *
  18  * Setting up the clock on the MIPS boards.
  19  */
  20 #include <linux/types.h>
  21 #include <linux/i8253.h>
  22 #include <linux/init.h>
  23 #include <linux/kernel_stat.h>
  24 #include <linux/sched.h>
  25 #include <linux/spinlock.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/irqchip/mips-gic.h>
  28 #include <linux/timex.h>
  29 #include <linux/mc146818rtc.h>
  30
  31 #include <asm/cpu.h>
  32 #include <asm/mipsregs.h>
  33 #include <asm/mipsmtregs.h>
  34 #include <asm/hardirq.h>
  35 #include <asm/irq.h>
  36 #include <asm/div64.h>
  37 #include <asm/setup.h>
  38 #include <asm/time.h>
  39 #include <asm/mc146818-time.h>
  40 #include <asm/msc01_ic.h>
  41
  42 #include <asm/mips-boards/generic.h>
  43 #include <asm/mips-boards/maltaint.h>
  44
  45 static int mips_cpu_timer_irq;
  46 static int mips_cpu_perf_irq;
  47 extern int cp0_perfcount_irq;
  48
  49 static void mips_timer_dispatch(void)
  50 {
  51         do_IRQ(mips_cpu_timer_irq);
  52 }
  53
  54 static void mips_perf_dispatch(void)
  55 {
  56         do_IRQ(mips_cpu_perf_irq);
  57 }
  58
  59 static unsigned int freqround(unsigned int freq, unsigned int amount)
  60 {
  61         freq += amount;
  62         freq -= freq % (amount*2);
  63         return freq;
  64 }
  65
  66 /*
  67  * Estimate CPU and GIC frequencies.
  68  */
  69 static void __init estimate_frequencies(void)
  70 {
  71         unsigned long flags;
  72         unsigned int count, start;
  73         cycle_t giccount = 0, gicstart = 0;
  74
  75 #if defined(CONFIG_KVM_GUEST) && CONFIG_KVM_GUEST_TIMER_FREQ
  76         mips_hpt_frequency = CONFIG_KVM_GUEST_TIMER_FREQ * 1000000;
  77         return;
  78 #endif
  79
  80         local_irq_save(flags);
  81
  82         /* Start counter exactly on falling edge of update flag. */
  83         while (CMOS_READ(RTC_REG_A) & RTC_UIP);
  84         while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
  85
  86         /* Initialize counters. */
  87         start = read_c0_count();
  88         if (gic_present)
  89                 gicstart = gic_read_count();
  90
  91         /* Read counter exactly on falling edge of update flag. */
  92         while (CMOS_READ(RTC_REG_A) & RTC_UIP);
  93         while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
  94
  95         count = read_c0_count();
  96         if (gic_present)
  97                 giccount = gic_read_count();
  98
  99         local_irq_restore(flags);
 100
 101         count -= start;
 102         mips_hpt_frequency = count;
 103
 104         if (gic_present) {
 105                 giccount -= gicstart;
 106                 gic_frequency = giccount;
 107         }
 108 }
 109
 110 void read_persistent_clock(struct timespec *ts)
 111 {
 112         ts->tv_sec = mc146818_get_cmos_time();
 113         ts->tv_nsec = 0;
 114 }
 115
 116 int get_c0_perfcount_int(void)
 117 {
 118         if (cpu_has_veic) {
 119                 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
 120                 mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
 121         } else if (gic_present) {
 122                 mips_cpu_perf_irq = gic_get_c0_perfcount_int();
 123         } else if (cp0_perfcount_irq >= 0) {
 124                 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
 125         } else {
 126                 mips_cpu_perf_irq = -1;
 127         }
 128
 129         return mips_cpu_perf_irq;
 130 }
 131
 132 unsigned int get_c0_compare_int(void)
 133 {
 134         if (cpu_has_veic) {
 135                 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
 136                 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
 137         } else if (gic_present) {
 138                 mips_cpu_timer_irq = gic_get_c0_compare_int();
 139         } else {
 140                 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
 141         }
 142
 143         return mips_cpu_timer_irq;
 144 }
 145
 146 static void __init init_rtc(void)
 147 {
 148         /* stop the clock whilst setting it up */
 149         CMOS_WRITE(RTC_SET | RTC_24H, RTC_CONTROL);
 150
 151         /* 32KHz time base */
 152         CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
 153
 154         /* start the clock */
 155         CMOS_WRITE(RTC_24H, RTC_CONTROL);
 156 }
 157
 158 void __init plat_time_init(void)
 159 {
 160         unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK);
 161         unsigned int freq;
 162
 163         init_rtc();
 164         estimate_frequencies();
 165
 166         freq = mips_hpt_frequency;
 167         if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
 168             (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
 169                 freq *= 2;
 170         freq = freqround(freq, 5000);
 171         printk("CPU frequency %d.%02d MHz\n", freq/1000000,
 172                (freq%1000000)*100/1000000);
 173
 174         mips_scroll_message();
 175
 176 #ifdef CONFIG_I8253
 177         /* Only Malta has a PIT. */
 178         setup_pit_timer();
 179 #endif
 180
 181 #ifdef CONFIG_MIPS_GIC
 182         if (gic_present) {
 183                 freq = freqround(gic_frequency, 5000);
 184                 printk("GIC frequency %d.%02d MHz\n", freq/1000000,
 185                        (freq%1000000)*100/1000000);
 186 #ifdef CONFIG_CLKSRC_MIPS_GIC
 187                 gic_clocksource_init(gic_frequency);
 188 #endif
 189         }
 190 #endif
 191 }