arch/powerpc/boot/dts/mpc7448hpc2.dts

   1 /*
   2  * MPC7448HPC2 (Taiga) board Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  * 2006 Roy Zang <Roy Zang at freescale.com>.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13
  14 / {
  15         model = "mpc7448hpc2";
  16         compatible = "mpc74xx";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         cpus {
  21                 #address-cells = <1>;
  22                 #size-cells =<0>;
  23
  24                 PowerPC,7448@0 {
  25                         device_type = "cpu";
  26                         reg = <0>;
  27                         d-cache-line-size = <20>;       // 32 bytes
  28                         i-cache-line-size = <20>;       // 32 bytes
  29                         d-cache-size = <8000>;          // L1, 32K bytes
  30                         i-cache-size = <8000>;          // L1, 32K bytes
  31                         timebase-frequency = <0>;       // 33 MHz, from uboot
  32                         clock-frequency = <0>;          // From U-Boot
  33                         bus-frequency = <0>;            // From U-Boot
  34                         32-bit;
  35                 };
  36         };
  37
  38         memory {
  39                 device_type = "memory";
  40                 reg = <00000000 20000000        // DDR2   512M at 0
  41                        >;
  42         };
  43
  44         tsi108@c0000000 {
  45                 #address-cells = <1>;
  46                 #size-cells = <1>;
  47                 #interrupt-cells = <2>;
  48                 device_type = "tsi-bridge";
  49                 ranges = <00000000 c0000000 00010000>;
  50                 reg = <c0000000 00010000>;
  51                 bus-frequency = <0>;
  52
  53                 i2c@7000 {
  54                         interrupt-parent = <&mpic>;
  55                         interrupts = <E 0>;
  56                         reg = <7000 400>;
  57                         device_type = "i2c";
  58                         compatible  = "tsi-i2c";
  59                 };
  60
  61                 mdio@6000 {
  62                         device_type = "mdio";
  63                         compatible = "tsi-ethernet";
  64
  65                         phy8: ethernet-phy@6000 {
  66                                 interrupt-parent = <&mpic>;
  67                                 interrupts = <2 1>;
  68                                 reg = <6000 50>;
  69                                 phy-id = <8>;
  70                                 device_type = "ethernet-phy";
  71                         };
  72
  73                         phy9: ethernet-phy@6400 {
  74                                 interrupt-parent = <&mpic>;
  75                                 interrupts = <2 1>;
  76                                 reg = <6000 50>;
  77                                 phy-id = <9>;
  78                                 device_type = "ethernet-phy";
  79                         };
  80
  81                 };
  82
  83                 ethernet@6200 {
  84                         #size-cells = <0>;
  85                         device_type = "network";
  86                         model = "TSI-ETH";
  87                         compatible = "tsi-ethernet";
  88                         reg = <6000 200>;
  89                         address = [ 00 06 D2 00 00 01 ];
  90                         interrupts = <10 2>;
  91                         interrupt-parent = <&mpic>;
  92                         phy-handle = <&phy8>;
  93                 };
  94
  95                 ethernet@6600 {
  96                         #address-cells = <1>;
  97                         #size-cells = <0>;
  98                         device_type = "network";
  99                         model = "TSI-ETH";
 100                         compatible = "tsi-ethernet";
 101                         reg = <6400 200>;
 102                         address = [ 00 06 D2 00 00 02 ];
 103                         interrupts = <11 2>;
 104                         interrupt-parent = <&mpic>;
 105                         phy-handle = <&phy9>;
 106                 };
 107
 108                 serial@7808 {
 109                         device_type = "serial";
 110                         compatible = "ns16550";
 111                         reg = <7808 200>;
 112                         clock-frequency = <3f6b5a00>;
 113                         interrupts = <c 0>;
 114                         interrupt-parent = <&mpic>;
 115                 };
 116
 117                 serial@7c08 {
 118                         device_type = "serial";
 119                         compatible = "ns16550";
 120                         reg = <7c08 200>;
 121                         clock-frequency = <3f6b5a00>;
 122                         interrupts = <d 0>;
 123                         interrupt-parent = <&mpic>;
 124                 };
 125
 126                 mpic: pic@7400 {
 127                         clock-frequency = <0>;
 128                         interrupt-controller;
 129                         #address-cells = <0>;
 130                         #interrupt-cells = <2>;
 131                         reg = <7400 400>;
 132                         built-in;
 133                         compatible = "chrp,open-pic";
 134                         device_type = "open-pic";
 135                         big-endian;
 136                 };
 137                 pci@1000 {
 138                         compatible = "tsi10x";
 139                         device_type = "pci";
 140                         #interrupt-cells = <1>;
 141                         #size-cells = <2>;
 142                         #address-cells = <3>;
 143                         reg = <1000 1000>;
 144                         bus-range = <0 0>;
 145                         ranges = <02000000 0 e0000000 e0000000 0 1A000000
 146                                   01000000 0 00000000 fa000000 0 00010000>;
 147                         clock-frequency = <7f28154>;
 148                         interrupt-parent = <&mpic>;
 149                         interrupts = <17 2>;
 150                         interrupt-map-mask = <f800 0 0 7>;
 151                         interrupt-map = <
 152
 153                                 /* IDSEL 0x11 */
 154                                 0800 0 0 1 &RT0 24 0
 155                                 0800 0 0 2 &RT0 25 0
 156                                 0800 0 0 3 &RT0 26 0
 157                                 0800 0 0 4 &RT0 27 0
 158
 159                                 /* IDSEL 0x12 */
 160                                 1000 0 0 1 &RT0 25 0
 161                                 1000 0 0 2 &RT0 26 0
 162                                 1000 0 0 3 &RT0 27 0
 163                                 1000 0 0 4 &RT0 24 0
 164
 165                                 /* IDSEL 0x13 */
 166                                 1800 0 0 1 &RT0 26 0
 167                                 1800 0 0 2 &RT0 27 0
 168                                 1800 0 0 3 &RT0 24 0
 169                                 1800 0 0 4 &RT0 25 0
 170
 171                                 /* IDSEL 0x14 */
 172                                 2000 0 0 1 &RT0 27 0
 173                                 2000 0 0 2 &RT0 24 0
 174                                 2000 0 0 3 &RT0 25 0
 175                                 2000 0 0 4 &RT0 26 0
 176                                 >;
 177
 178                         RT0: router@1180 {
 179                                 clock-frequency = <0>;
 180                                 interrupt-controller;
 181                                 device_type = "pic-router";
 182                                 #address-cells = <0>;
 183                                 #interrupt-cells = <2>;
 184                                 built-in;
 185                                 big-endian;
 186                                 interrupts = <17 2>;
 187                                 interrupt-parent = <&mpic>;
 188                         };
 189                 };
 190         };
 191
 192 };