arch/powerpc/boot/dts/prpmc2800.dts

   1 /* Device Tree Source for Motorola PrPMC2800
   2  *
   3  * Author: Mark A. Greer <mgreer@mvista.com>
   4  *
   5  * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
   6  * the terms of the GNU General Public License version 2.  This program
   7  * is licensed "as is" without any warranty of any kind, whether express
   8  * or implied.
   9  *
  10  * Property values that are labeled as "Default" will be updated by bootwrapper
  11  * if it can determine the exact PrPMC type.
  12  */
  13
  14 /dts-v1/;
  15
  16 / {
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19         model = "PrPMC280/PrPMC2800"; /* Default */
  20         compatible = "motorola,PrPMC2800";
  21         coherency-off;
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 PowerPC,7447 {
  28                         device_type = "cpu";
  29                         reg = <0>;
  30                         clock-frequency = <733333333>;  /* Default */
  31                         bus-frequency = <133333333>;
  32                         timebase-frequency = <33333333>;
  33                         i-cache-line-size = <32>;
  34                         d-cache-line-size = <32>;
  35                         i-cache-size = <32768>;
  36                         d-cache-size = <32768>;
  37                 };
  38         };
  39
  40         memory {
  41                 device_type = "memory";
  42                 reg = <0x0 0x20000000>;                 /* Default (512MB) */
  43         };
  44
  45         mv64x60@f1000000 { /* Marvell Discovery */
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 model = "mv64360";                      /* Default */
  49                 compatible = "marvell,mv64x60";
  50                 clock-frequency = <133333333>;
  51                 reg = <0xf1000000 0x10000>;
  52                 virtual-reg = <0xf1000000>;
  53                 ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
  54                           0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
  55                           0xa0000000 0xa0000000 0x4000000 /* User FLASH */
  56                           0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
  57                           0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
  58
  59                 flash@a0000000 {
  60                         device_type = "rom";
  61                         compatible = "direct-mapped";
  62                         reg = <0xa0000000 0x4000000>; /* Default (64MB) */
  63                         probe-type = "CFI";
  64                         bank-width = <4>;
  65                         partitions = <0x00000000 0x00100000 /* RO */
  66                                       0x00100000 0x00040001 /* RW */
  67                                       0x00140000 0x00400000 /* RO */
  68                                       0x00540000 0x039c0000 /* RO */
  69                                       0x03f00000 0x00100000>; /* RO */
  70                         partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
  71                 };
  72
  73                 mdio {
  74                         #address-cells = <1>;
  75                         #size-cells = <0>;
  76                         device_type = "mdio";
  77                         compatible = "marvell,mv64x60-mdio";
  78                         PHY0: ethernet-phy@1 {
  79                                 device_type = "ethernet-phy";
  80                                 compatible = "broadcom,bcm5421";
  81                                 interrupts = <76>;      /* GPP 12 */
  82                                 interrupt-parent = <&PIC>;
  83                                 reg = <1>;
  84                         };
  85                         PHY1: ethernet-phy@3 {
  86                                 device_type = "ethernet-phy";
  87                                 compatible = "broadcom,bcm5421";
  88                                 interrupts = <76>;      /* GPP 12 */
  89                                 interrupt-parent = <&PIC>;
  90                                 reg = <3>;
  91                         };
  92                 };
  93
  94                 ethernet@2000 {
  95                         reg = <0x2000 0x2000>;
  96                         eth0 {
  97                                 device_type = "network";
  98                                 compatible = "marvell,mv64x60-eth";
  99                                 block-index = <0>;
 100                                 interrupts = <32>;
 101                                 interrupt-parent = <&PIC>;
 102                                 phy = <&PHY0>;
 103                                 local-mac-address = [ 00 00 00 00 00 00 ];
 104                         };
 105                         eth1 {
 106                                 device_type = "network";
 107                                 compatible = "marvell,mv64x60-eth";
 108                                 block-index = <1>;
 109                                 interrupts = <33>;
 110                                 interrupt-parent = <&PIC>;
 111                                 phy = <&PHY1>;
 112                                 local-mac-address = [ 00 00 00 00 00 00 ];
 113                         };
 114                 };
 115
 116                 SDMA0: sdma@4000 {
 117                         device_type = "dma";
 118                         compatible = "marvell,mv64x60-sdma";
 119                         reg = <0x4000 0xc18>;
 120                         virtual-reg = <0xf1004000>;
 121                         interrupt-base = <0>;
 122                         interrupts = <36>;
 123                         interrupt-parent = <&PIC>;
 124                 };
 125
 126                 SDMA1: sdma@6000 {
 127                         device_type = "dma";
 128                         compatible = "marvell,mv64x60-sdma";
 129                         reg = <0x6000 0xc18>;
 130                         virtual-reg = <0xf1006000>;
 131                         interrupt-base = <0>;
 132                         interrupts = <38>;
 133                         interrupt-parent = <&PIC>;
 134                 };
 135
 136                 BRG0: brg@b200 {
 137                         compatible = "marvell,mv64x60-brg";
 138                         reg = <0xb200 0x8>;
 139                         clock-src = <8>;
 140                         clock-frequency = <133333333>;
 141                         current-speed = <9600>;
 142                         bcr = <0>;
 143                 };
 144
 145                 BRG1: brg@b208 {
 146                         compatible = "marvell,mv64x60-brg";
 147                         reg = <0xb208 0x8>;
 148                         clock-src = <8>;
 149                         clock-frequency = <133333333>;
 150                         current-speed = <9600>;
 151                         bcr = <0>;
 152                 };
 153
 154                 CUNIT: cunit@f200 {
 155                         reg = <0xf200 0x200>;
 156                 };
 157
 158                 MPSCROUTING: mpscrouting@b400 {
 159                         reg = <0xb400 0xc>;
 160                 };
 161
 162                 MPSCINTR: mpscintr@b800 {
 163                         reg = <0xb800 0x100>;
 164                         virtual-reg = <0xf100b800>;
 165                 };
 166
 167                 MPSC0: mpsc@8000 {
 168                         device_type = "serial";
 169                         compatible = "marvell,mpsc";
 170                         reg = <0x8000 0x38>;
 171                         virtual-reg = <0xf1008000>;
 172                         sdma = <&SDMA0>;
 173                         brg = <&BRG0>;
 174                         cunit = <&CUNIT>;
 175                         mpscrouting = <&MPSCROUTING>;
 176                         mpscintr = <&MPSCINTR>;
 177                         block-index = <0>;
 178                         max_idle = <40>;
 179                         chr_1 = <0>;
 180                         chr_2 = <0>;
 181                         chr_10 = <3>;
 182                         mpcr = <0>;
 183                         interrupts = <40>;
 184                         interrupt-parent = <&PIC>;
 185                 };
 186
 187                 MPSC1: mpsc@9000 {
 188                         device_type = "serial";
 189                         compatible = "marvell,mpsc";
 190                         reg = <0x9000 0x38>;
 191                         virtual-reg = <0xf1009000>;
 192                         sdma = <&SDMA1>;
 193                         brg = <&BRG1>;
 194                         cunit = <&CUNIT>;
 195                         mpscrouting = <&MPSCROUTING>;
 196                         mpscintr = <&MPSCINTR>;
 197                         block-index = <1>;
 198                         max_idle = <40>;
 199                         chr_1 = <0>;
 200                         chr_2 = <0>;
 201                         chr_10 = <3>;
 202                         mpcr = <0>;
 203                         interrupts = <42>;
 204                         interrupt-parent = <&PIC>;
 205                 };
 206
 207                 wdt@b410 {                      /* watchdog timer */
 208                         compatible = "marvell,mv64x60-wdt";
 209                         reg = <0xb410 0x8>;
 210                         timeout = <10>;         /* wdt timeout in seconds */
 211                 };
 212
 213                 i2c@c000 {
 214                         device_type = "i2c";
 215                         compatible = "marvell,mv64x60-i2c";
 216                         reg = <0xc000 0x20>;
 217                         virtual-reg = <0xf100c000>;
 218                         freq_m = <8>;
 219                         freq_n = <3>;
 220                         timeout = <1000>;               /* 1000 = 1 second */
 221                         retries = <1>;
 222                         interrupts = <37>;
 223                         interrupt-parent = <&PIC>;
 224                 };
 225
 226                 PIC: pic {
 227                         #interrupt-cells = <1>;
 228                         #address-cells = <0>;
 229                         compatible = "marvell,mv64x60-pic";
 230                         reg = <0x0 0x88>;
 231                         interrupt-controller;
 232                 };
 233
 234                 mpp@f000 {
 235                         compatible = "marvell,mv64x60-mpp";
 236                         reg = <0xf000 0x10>;
 237                 };
 238
 239                 gpp@f100 {
 240                         compatible = "marvell,mv64x60-gpp";
 241                         reg = <0xf100 0x20>;
 242                 };
 243
 244                 pci@80000000 {
 245                         #address-cells = <3>;
 246                         #size-cells = <2>;
 247                         #interrupt-cells = <1>;
 248                         device_type = "pci";
 249                         compatible = "marvell,mv64x60-pci";
 250                         reg = <0xcf8 0x8>;
 251                         ranges = <0x01000000 0x0        0x0
 252                                         0x88000000 0x0 0x01000000
 253                                   0x02000000 0x0 0x80000000
 254                                         0x80000000 0x0 0x08000000>;
 255                         bus-range = <0 255>;
 256                         clock-frequency = <66000000>;
 257                         interrupt-pci-iack = <0xc34>;
 258                         interrupt-parent = <&PIC>;
 259                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 260                         interrupt-map = <
 261                                 /* IDSEL 0x0a */
 262                                 0x5000 0 0 1 &PIC 80
 263                                 0x5000 0 0 2 &PIC 81
 264                                 0x5000 0 0 3 &PIC 91
 265                                 0x5000 0 0 4 &PIC 93
 266
 267                                 /* IDSEL 0x0b */
 268                                 0x5800 0 0 1 &PIC 91
 269                                 0x5800 0 0 2 &PIC 93
 270                                 0x5800 0 0 3 &PIC 80
 271                                 0x5800 0 0 4 &PIC 81
 272
 273                                 /* IDSEL 0x0c */
 274                                 0x6000 0 0 1 &PIC 91
 275                                 0x6000 0 0 2 &PIC 93
 276                                 0x6000 0 0 3 &PIC 80
 277                                 0x6000 0 0 4 &PIC 81
 278
 279                                 /* IDSEL 0x0d */
 280                                 0x6800 0 0 1 &PIC 93
 281                                 0x6800 0 0 2 &PIC 80
 282                                 0x6800 0 0 3 &PIC 81
 283                                 0x6800 0 0 4 &PIC 91
 284                         >;
 285                 };
 286
 287                 cpu-error@0070 {
 288                         compatible = "marvell,mv64x60-cpu-error";
 289                         reg = <0x70 0x10 0x128 0x28>;
 290                         interrupts = <3>;
 291                         interrupt-parent = <&PIC>;
 292                 };
 293
 294                 sram-ctrl@0380 {
 295                         compatible = "marvell,mv64x60-sram-ctrl";
 296                         reg = <0x380 0x80>;
 297                         interrupts = <13>;
 298                         interrupt-parent = <&PIC>;
 299                 };
 300
 301                 pci-error@1d40 {
 302                         compatible = "marvell,mv64x60-pci-error";
 303                         reg = <0x1d40 0x40 0xc28 0x4>;
 304                         interrupts = <12>;
 305                         interrupt-parent = <&PIC>;
 306                 };
 307
 308                 mem-ctrl@1400 {
 309                         compatible = "marvell,mv64x60-mem-ctrl";
 310                         reg = <0x1400 0x60>;
 311                         interrupts = <17>;
 312                         interrupt-parent = <&PIC>;
 313                 };
 314         };
 315
 316         chosen {
 317                 bootargs = "ip=on";
 318                 linux,stdout-path = &MPSC0;
 319         };
 320 };