arch/powerpc/sysdev/ehv_pic.c

   1 /*
   2  *  Driver for ePAPR Embedded Hypervisor PIC
   3  *
   4  *  Copyright 2008-2011 Freescale Semiconductor, Inc.
   5  *
   6  *  Author: Ashish Kalra <ashish.kalra@freescale.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public License
   9  * version 2.  This program is licensed "as is" without any warranty of any
  10  * kind, whether express or implied.
  11  */
  12
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/irq.h>
  17 #include <linux/smp.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/of.h>
  22 #include <linux/of_address.h>
  23
  24 #include <asm/io.h>
  25 #include <asm/irq.h>
  26 #include <asm/smp.h>
  27 #include <asm/machdep.h>
  28 #include <asm/ehv_pic.h>
  29 #include <asm/fsl_hcalls.h>
  30
  31 #include "../../../kernel/irq/settings.h"
  32
  33 static struct ehv_pic *global_ehv_pic;
  34 static DEFINE_SPINLOCK(ehv_pic_lock);
  35
  36 static u32 hwirq_intspec[NR_EHV_PIC_INTS];
  37 static u32 __iomem *mpic_percpu_base_vaddr;
  38
  39 #define IRQ_TYPE_MPIC_DIRECT 4
  40 #define MPIC_EOI  0x00B0
  41
  42 /*
  43  * Linux descriptor level callbacks
  44  */
  45
  46 void ehv_pic_unmask_irq(struct irq_data *d)
  47 {
  48         unsigned int src = virq_to_hw(d->irq);
  49
  50         ev_int_set_mask(src, 0);
  51 }
  52
  53 void ehv_pic_mask_irq(struct irq_data *d)
  54 {
  55         unsigned int src = virq_to_hw(d->irq);
  56
  57         ev_int_set_mask(src, 1);
  58 }
  59
  60 void ehv_pic_end_irq(struct irq_data *d)
  61 {
  62         unsigned int src = virq_to_hw(d->irq);
  63
  64         ev_int_eoi(src);
  65 }
  66
  67 void ehv_pic_direct_end_irq(struct irq_data *d)
  68 {
  69         out_be32(mpic_percpu_base_vaddr + MPIC_EOI / 4, 0);
  70 }
  71
  72 int ehv_pic_set_affinity(struct irq_data *d, const struct cpumask *dest,
  73                          bool force)
  74 {
  75         unsigned int src = virq_to_hw(d->irq);
  76         unsigned int config, prio, cpu_dest;
  77         int cpuid = irq_choose_cpu(dest);
  78         unsigned long flags;
  79
  80         spin_lock_irqsave(&ehv_pic_lock, flags);
  81         ev_int_get_config(src, &config, &prio, &cpu_dest);
  82         ev_int_set_config(src, config, prio, cpuid);
  83         spin_unlock_irqrestore(&ehv_pic_lock, flags);
  84
  85         return IRQ_SET_MASK_OK;
  86 }
  87
  88 static unsigned int ehv_pic_type_to_vecpri(unsigned int type)
  89 {
  90         /* Now convert sense value */
  91
  92         switch (type & IRQ_TYPE_SENSE_MASK) {
  93         case IRQ_TYPE_EDGE_RISING:
  94                 return EHV_PIC_INFO(VECPRI_SENSE_EDGE) |
  95                        EHV_PIC_INFO(VECPRI_POLARITY_POSITIVE);
  96
  97         case IRQ_TYPE_EDGE_FALLING:
  98         case IRQ_TYPE_EDGE_BOTH:
  99                 return EHV_PIC_INFO(VECPRI_SENSE_EDGE) |
 100                        EHV_PIC_INFO(VECPRI_POLARITY_NEGATIVE);
 101
 102         case IRQ_TYPE_LEVEL_HIGH:
 103                 return EHV_PIC_INFO(VECPRI_SENSE_LEVEL) |
 104                        EHV_PIC_INFO(VECPRI_POLARITY_POSITIVE);
 105
 106         case IRQ_TYPE_LEVEL_LOW:
 107         default:
 108                 return EHV_PIC_INFO(VECPRI_SENSE_LEVEL) |
 109                        EHV_PIC_INFO(VECPRI_POLARITY_NEGATIVE);
 110         }
 111 }
 112
 113 int ehv_pic_set_irq_type(struct irq_data *d, unsigned int flow_type)
 114 {
 115         unsigned int src = virq_to_hw(d->irq);
 116         struct irq_desc *desc = irq_to_desc(d->irq);
 117         unsigned int vecpri, vold, vnew, prio, cpu_dest;
 118         unsigned long flags;
 119
 120         if (flow_type == IRQ_TYPE_NONE)
 121                 flow_type = IRQ_TYPE_LEVEL_LOW;
 122
 123         irq_settings_clr_level(desc);
 124         irq_settings_set_trigger_mask(desc, flow_type);
 125         if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
 126                 irq_settings_set_level(desc);
 127
 128         vecpri = ehv_pic_type_to_vecpri(flow_type);
 129
 130         spin_lock_irqsave(&ehv_pic_lock, flags);
 131         ev_int_get_config(src, &vold, &prio, &cpu_dest);
 132         vnew = vold & ~(EHV_PIC_INFO(VECPRI_POLARITY_MASK) |
 133                         EHV_PIC_INFO(VECPRI_SENSE_MASK));
 134         vnew |= vecpri;
 135
 136         /*
 137          * TODO : Add specific interface call for platform to set
 138          * individual interrupt priorities.
 139          * platform currently using static/default priority for all ints
 140          */
 141
 142         prio = 8;
 143
 144         ev_int_set_config(src, vecpri, prio, cpu_dest);
 145
 146         spin_unlock_irqrestore(&ehv_pic_lock, flags);
 147         return 0;
 148 }
 149
 150 static struct irq_chip ehv_pic_irq_chip = {
 151         .irq_mask       = ehv_pic_mask_irq,
 152         .irq_unmask     = ehv_pic_unmask_irq,
 153         .irq_eoi        = ehv_pic_end_irq,
 154         .irq_set_type   = ehv_pic_set_irq_type,
 155 };
 156
 157 static struct irq_chip ehv_pic_direct_eoi_irq_chip = {
 158         .irq_mask       = ehv_pic_mask_irq,
 159         .irq_unmask     = ehv_pic_unmask_irq,
 160         .irq_eoi        = ehv_pic_direct_end_irq,
 161         .irq_set_type   = ehv_pic_set_irq_type,
 162 };
 163
 164 /* Return an interrupt vector or NO_IRQ if no interrupt is pending. */
 165 unsigned int ehv_pic_get_irq(void)
 166 {
 167         int irq;
 168
 169         BUG_ON(global_ehv_pic == NULL);
 170
 171         if (global_ehv_pic->coreint_flag)
 172                 irq = mfspr(SPRN_EPR); /* if core int mode */
 173         else
 174                 ev_int_iack(0, &irq); /* legacy mode */
 175
 176         if (irq == 0xFFFF)    /* 0xFFFF --> no irq is pending */
 177                 return NO_IRQ;
 178
 179         /*
 180          * this will also setup revmap[] in the slow path for the first
 181          * time, next calls will always use fast path by indexing revmap
 182          */
 183         return irq_linear_revmap(global_ehv_pic->irqhost, irq);
 184 }
 185
 186 static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node)
 187 {
 188         /* Exact match, unless ehv_pic node is NULL */
 189         return h->of_node == NULL || h->of_node == node;
 190 }
 191
 192 static int ehv_pic_host_map(struct irq_domain *h, unsigned int virq,
 193                          irq_hw_number_t hw)
 194 {
 195         struct ehv_pic *ehv_pic = h->host_data;
 196         struct irq_chip *chip;
 197
 198         /* Default chip */
 199         chip = &ehv_pic->hc_irq;
 200
 201         if (mpic_percpu_base_vaddr)
 202                 if (hwirq_intspec[hw] & IRQ_TYPE_MPIC_DIRECT)
 203                         chip = &ehv_pic_direct_eoi_irq_chip;
 204
 205         irq_set_chip_data(virq, chip);
 206         /*
 207          * using handle_fasteoi_irq as our irq handler, this will
 208          * only call the eoi callback and suitable for the MPIC
 209          * controller which set ISR/IPR automatically and clear the
 210          * highest priority active interrupt in ISR/IPR when we do
 211          * a specific eoi
 212          */
 213         irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq);
 214
 215         /* Set default irq type */
 216         irq_set_irq_type(virq, IRQ_TYPE_NONE);
 217
 218         return 0;
 219 }
 220
 221 static int ehv_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
 222                            const u32 *intspec, unsigned int intsize,
 223                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 224
 225 {
 226         /*
 227          * interrupt sense values coming from the guest device tree
 228          * interrupt specifiers can have four possible sense and
 229          * level encoding information and they need to
 230          * be translated between firmware type & linux type.
 231          */
 232
 233         static unsigned char map_of_senses_to_linux_irqtype[4] = {
 234                 IRQ_TYPE_EDGE_FALLING,
 235                 IRQ_TYPE_EDGE_RISING,
 236                 IRQ_TYPE_LEVEL_LOW,
 237                 IRQ_TYPE_LEVEL_HIGH,
 238         };
 239
 240         *out_hwirq = intspec[0];
 241         if (intsize > 1) {
 242                 hwirq_intspec[intspec[0]] = intspec[1];
 243                 *out_flags = map_of_senses_to_linux_irqtype[intspec[1] &
 244                                                         ~IRQ_TYPE_MPIC_DIRECT];
 245         } else {
 246                 *out_flags = IRQ_TYPE_NONE;
 247         }
 248
 249         return 0;
 250 }
 251
 252 static const struct irq_domain_ops ehv_pic_host_ops = {
 253         .match = ehv_pic_host_match,
 254         .map = ehv_pic_host_map,
 255         .xlate = ehv_pic_host_xlate,
 256 };
 257
 258 void __init ehv_pic_init(void)
 259 {
 260         struct device_node *np, *np2;
 261         struct ehv_pic *ehv_pic;
 262         int coreint_flag = 1;
 263
 264         np = of_find_compatible_node(NULL, NULL, "epapr,hv-pic");
 265         if (!np) {
 266                 pr_err("ehv_pic_init: could not find epapr,hv-pic node\n");
 267                 return;
 268         }
 269
 270         if (!of_find_property(np, "has-external-proxy", NULL))
 271                 coreint_flag = 0;
 272
 273         ehv_pic = kzalloc(sizeof(struct ehv_pic), GFP_KERNEL);
 274         if (!ehv_pic) {
 275                 of_node_put(np);
 276                 return;
 277         }
 278
 279         ehv_pic->irqhost = irq_domain_add_linear(np, NR_EHV_PIC_INTS,
 280                                                  &ehv_pic_host_ops, ehv_pic);
 281         if (!ehv_pic->irqhost) {
 282                 of_node_put(np);
 283                 kfree(ehv_pic);
 284                 return;
 285         }
 286
 287         np2 = of_find_compatible_node(NULL, NULL, "fsl,hv-mpic-per-cpu");
 288         if (np2) {
 289                 mpic_percpu_base_vaddr = of_iomap(np2, 0);
 290                 if (!mpic_percpu_base_vaddr)
 291                         pr_err("ehv_pic_init: of_iomap failed\n");
 292
 293                 of_node_put(np2);
 294         }
 295
 296         ehv_pic->hc_irq = ehv_pic_irq_chip;
 297         ehv_pic->hc_irq.irq_set_affinity = ehv_pic_set_affinity;
 298         ehv_pic->coreint_flag = coreint_flag;
 299
 300         global_ehv_pic = ehv_pic;
 301         irq_set_default_host(global_ehv_pic->irqhost);
 302 }