3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/pgtable.h"
11 #ifndef _ASM_S390_PGTABLE_H
12 #define _ASM_S390_PGTABLE_H
15 * The Linux memory management assumes a three-level page table setup.
16 * For s390 64 bit we use up to four of the five levels the hardware
17 * provides (region first tables are not used).
19 * The "pgd_xxx()" functions are trivial for a folded two-level
20 * setup: the pgd is never bad, and a pmd always exists (as it's folded
23 * This file contains the functions and defines necessary to modify and use
24 * the S390 page table tree.
27 #include <linux/sched.h>
28 #include <linux/mm_types.h>
29 #include <linux/page-flags.h>
30 #include <linux/radix-tree.h>
31 #include <linux/atomic.h>
35 extern pgd_t swapper_pg_dir[];
36 extern void paging_init(void);
37 extern void vmem_map_init(void);
38 pmd_t *vmem_pmd_alloc(void);
39 pte_t *vmem_pte_alloc(void);
48 extern atomic_long_t direct_pages_count[PG_DIRECT_MAP_MAX];
50 static inline void update_page_count(int level, long count)
52 if (IS_ENABLED(CONFIG_PROC_FS))
53 atomic_long_add(count, &direct_pages_count[level]);
57 void arch_report_meminfo(struct seq_file *m);
60 * The S390 doesn't have any external MMU info: the kernel page
61 * tables contain all the necessary information.
63 #define update_mmu_cache(vma, address, ptep) do { } while (0)
64 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
67 * ZERO_PAGE is a global shared page that is always zero; used
68 * for zero-mapped memory areas etc..
71 extern unsigned long empty_zero_page;
72 extern unsigned long zero_page_mask;
74 #define ZERO_PAGE(vaddr) \
75 (virt_to_page((void *)(empty_zero_page + \
76 (((unsigned long)(vaddr)) &zero_page_mask))))
77 #define __HAVE_COLOR_ZERO_PAGE
79 /* TODO: s390 cannot support io_remap_pfn_range... */
80 #endif /* !__ASSEMBLY__ */
83 * PMD_SHIFT determines the size of the area a second-level page
85 * PGDIR_SHIFT determines what a third-level page table entry can map
89 #define PGDIR_SHIFT 42
91 #define PMD_SIZE (1UL << PMD_SHIFT)
92 #define PMD_MASK (~(PMD_SIZE-1))
93 #define PUD_SIZE (1UL << PUD_SHIFT)
94 #define PUD_MASK (~(PUD_SIZE-1))
95 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96 #define PGDIR_MASK (~(PGDIR_SIZE-1))
99 * entries per page directory level: the S390 is two-level, so
100 * we don't really have any PMD directory physically.
101 * for S390 segment-table entries are combined to one PGD
102 * that leads to 1024 pte per pgd
104 #define PTRS_PER_PTE 256
105 #define PTRS_PER_PMD 2048
106 #define PTRS_PER_PUD 2048
107 #define PTRS_PER_PGD 2048
109 #define FIRST_USER_ADDRESS 0UL
111 #define pte_ERROR(e) \
112 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
113 #define pmd_ERROR(e) \
114 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
115 #define pud_ERROR(e) \
116 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
117 #define pgd_ERROR(e) \
118 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
122 * The vmalloc and module area will always be on the topmost area of the
123 * kernel mapping. We reserve 128GB (64bit) for vmalloc and modules.
124 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
125 * modules will reside. That makes sure that inter module branches always
126 * happen without trampolines and in addition the placement within a 2GB frame
127 * is branch prediction unit friendly.
129 extern unsigned long VMALLOC_START;
130 extern unsigned long VMALLOC_END;
131 extern struct page *vmemmap;
133 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
135 extern unsigned long MODULES_VADDR;
136 extern unsigned long MODULES_END;
137 #define MODULES_VADDR MODULES_VADDR
138 #define MODULES_END MODULES_END
139 #define MODULES_LEN (1UL << 31)
141 static inline int is_module_addr(void *addr)
143 BUILD_BUG_ON(MODULES_LEN > (1UL << 31));
144 if (addr < (void *)MODULES_VADDR)
146 if (addr > (void *)MODULES_END)
152 * A 64 bit pagetable entry of S390 has following format:
154 * 0000000000111111111122222222223333333333444444444455555555556666
155 * 0123456789012345678901234567890123456789012345678901234567890123
157 * I Page-Invalid Bit: Page is not available for address-translation
158 * P Page-Protection Bit: Store access not possible for page
159 * C Change-bit override: HW is not required to set change bit
161 * A 64 bit segmenttable entry of S390 has following format:
162 * | P-table origin | TT
163 * 0000000000111111111122222222223333333333444444444455555555556666
164 * 0123456789012345678901234567890123456789012345678901234567890123
166 * I Segment-Invalid Bit: Segment is not available for address-translation
167 * C Common-Segment Bit: Segment is not private (PoP 3-30)
168 * P Page-Protection Bit: Store access not possible for page
171 * A 64 bit region table entry of S390 has following format:
172 * | S-table origin | TF TTTL
173 * 0000000000111111111122222222223333333333444444444455555555556666
174 * 0123456789012345678901234567890123456789012345678901234567890123
176 * I Segment-Invalid Bit: Segment is not available for address-translation
181 * The 64 bit regiontable origin of S390 has following format:
182 * | region table origon | DTTL
183 * 0000000000111111111122222222223333333333444444444455555555556666
184 * 0123456789012345678901234567890123456789012345678901234567890123
186 * X Space-Switch event:
187 * G Segment-Invalid Bit:
188 * P Private-Space Bit:
189 * S Storage-Alteration:
193 * A storage key has the following format:
197 * F : fetch protection bit
202 /* Hardware bits in the page table entry */
203 #define _PAGE_PROTECT 0x200 /* HW read-only bit */
204 #define _PAGE_INVALID 0x400 /* HW invalid bit */
205 #define _PAGE_LARGE 0x800 /* Bit to mark a large pte */
207 /* Software bits in the page table entry */
208 #define _PAGE_PRESENT 0x001 /* SW pte present bit */
209 #define _PAGE_YOUNG 0x004 /* SW pte young bit */
210 #define _PAGE_DIRTY 0x008 /* SW pte dirty bit */
211 #define _PAGE_READ 0x010 /* SW pte read bit */
212 #define _PAGE_WRITE 0x020 /* SW pte write bit */
213 #define _PAGE_SPECIAL 0x040 /* SW associated with special page */
214 #define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
215 #define __HAVE_ARCH_PTE_SPECIAL
217 #ifdef CONFIG_MEM_SOFT_DIRTY
218 #define _PAGE_SOFT_DIRTY 0x002 /* SW pte soft dirty bit */
220 #define _PAGE_SOFT_DIRTY 0x000
223 /* Set of bits not changed in pte_modify */
224 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_DIRTY | \
225 _PAGE_YOUNG | _PAGE_SOFT_DIRTY)
228 * handle_pte_fault uses pte_present and pte_none to find out the pte type
229 * WITHOUT holding the page table lock. The _PAGE_PRESENT bit is used to
230 * distinguish present from not-present ptes. It is changed only with the page
233 * The following table gives the different possible bit combinations for
234 * the pte hardware and software bits in the last 12 bits of a pte
235 * (. unassigned bit, x don't care, t swap type):
243 * prot-none, clean, old .11.xx0000.1
244 * prot-none, clean, young .11.xx0001.1
245 * prot-none, dirty, old .10.xx0010.1
246 * prot-none, dirty, young .10.xx0011.1
247 * read-only, clean, old .11.xx0100.1
248 * read-only, clean, young .01.xx0101.1
249 * read-only, dirty, old .11.xx0110.1
250 * read-only, dirty, young .01.xx0111.1
251 * read-write, clean, old .11.xx1100.1
252 * read-write, clean, young .01.xx1101.1
253 * read-write, dirty, old .10.xx1110.1
254 * read-write, dirty, young .00.xx1111.1
255 * HW-bits: R read-only, I invalid
256 * SW-bits: p present, y young, d dirty, r read, w write, s special,
259 * pte_none is true for the bit pattern .10.00000000, pte == 0x400
260 * pte_swap is true for the bit pattern .11..ooooo.0, (pte & 0x201) == 0x200
261 * pte_present is true for the bit pattern .xx.xxxxxx.1, (pte & 0x001) == 0x001
264 /* Bits in the segment/region table address-space-control-element */
265 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
266 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
267 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
268 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
269 #define _ASCE_REAL_SPACE 0x20 /* real space control */
270 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
271 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
272 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
273 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
274 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
275 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
277 /* Bits in the region table entry */
278 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
279 #define _REGION_ENTRY_PROTECT 0x200 /* region protection bit */
280 #define _REGION_ENTRY_INVALID 0x20 /* invalid region table entry */
281 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
282 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
283 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
284 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
285 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
287 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
288 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
289 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
290 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
291 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
292 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
294 #define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address */
295 #define _REGION3_ENTRY_ORIGIN ~0x7ffUL/* region third table origin */
297 #define _REGION3_ENTRY_DIRTY 0x2000 /* SW region dirty bit */
298 #define _REGION3_ENTRY_YOUNG 0x1000 /* SW region young bit */
299 #define _REGION3_ENTRY_LARGE 0x0400 /* RTTE-format control, large page */
300 #define _REGION3_ENTRY_READ 0x0002 /* SW region read bit */
301 #define _REGION3_ENTRY_WRITE 0x0001 /* SW region write bit */
303 #ifdef CONFIG_MEM_SOFT_DIRTY
304 #define _REGION3_ENTRY_SOFT_DIRTY 0x4000 /* SW region soft dirty bit */
306 #define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */
309 /* Bits in the segment table entry */
310 #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe33UL
311 #define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
312 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
313 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
314 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
315 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
317 #define _SEGMENT_ENTRY (0)
318 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
320 #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
321 #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
322 #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
323 #define _SEGMENT_ENTRY_READ 0x0002 /* SW segment read bit */
324 #define _SEGMENT_ENTRY_WRITE 0x0001 /* SW segment write bit */
326 #ifdef CONFIG_MEM_SOFT_DIRTY
327 #define _SEGMENT_ENTRY_SOFT_DIRTY 0x4000 /* SW segment soft dirty bit */
329 #define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */
333 * Segment table and region3 table entry encoding
334 * (R = read-only, I = invalid, y = young bit):
336 * prot-none, clean, old 00..1...1...00
337 * prot-none, clean, young 01..1...1...00
338 * prot-none, dirty, old 10..1...1...00
339 * prot-none, dirty, young 11..1...1...00
340 * read-only, clean, old 00..1...1...10
341 * read-only, clean, young 01..1...0...10
342 * read-only, dirty, old 10..1...1...10
343 * read-only, dirty, young 11..1...0...10
344 * read-write, clean, old 00..1...1...11
345 * read-write, clean, young 01..1...0...11
346 * read-write, dirty, old 10..0...1...11
347 * read-write, dirty, young 11..0...0...11
348 * The segment table origin is used to distinguish empty (origin==0) from
349 * read-write, old segment table entries (origin!=0)
350 * HW-bits: R read-only, I invalid
351 * SW-bits: y young, d dirty, r read, w write
354 /* Page status table bits for virtualization */
355 #define PGSTE_ACC_BITS 0xf000000000000000UL
356 #define PGSTE_FP_BIT 0x0800000000000000UL
357 #define PGSTE_PCL_BIT 0x0080000000000000UL
358 #define PGSTE_HR_BIT 0x0040000000000000UL
359 #define PGSTE_HC_BIT 0x0020000000000000UL
360 #define PGSTE_GR_BIT 0x0004000000000000UL
361 #define PGSTE_GC_BIT 0x0002000000000000UL
362 #define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
363 #define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
365 /* Guest Page State used for virtualization */
366 #define _PGSTE_GPS_ZERO 0x0000000080000000UL
367 #define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
368 #define _PGSTE_GPS_USAGE_STABLE 0x0000000000000000UL
369 #define _PGSTE_GPS_USAGE_UNUSED 0x0000000001000000UL
372 * A user page table pointer has the space-switch-event bit, the
373 * private-space-control bit and the storage-alteration-event-control
374 * bit set. A kernel page table pointer doesn't need them.
376 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
380 * Page protection definitions.
382 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID)
383 #define PAGE_READ __pgprot(_PAGE_PRESENT | _PAGE_READ | \
384 _PAGE_INVALID | _PAGE_PROTECT)
385 #define PAGE_WRITE __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
386 _PAGE_INVALID | _PAGE_PROTECT)
388 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
389 _PAGE_YOUNG | _PAGE_DIRTY)
390 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
391 _PAGE_YOUNG | _PAGE_DIRTY)
392 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
396 * On s390 the page table entry has an invalid bit and a read-only bit.
397 * Read permission implies execute permission and write permission
398 * implies read permission.
401 #define __P000 PAGE_NONE
402 #define __P001 PAGE_READ
403 #define __P010 PAGE_READ
404 #define __P011 PAGE_READ
405 #define __P100 PAGE_READ
406 #define __P101 PAGE_READ
407 #define __P110 PAGE_READ
408 #define __P111 PAGE_READ
410 #define __S000 PAGE_NONE
411 #define __S001 PAGE_READ
412 #define __S010 PAGE_WRITE
413 #define __S011 PAGE_WRITE
414 #define __S100 PAGE_READ
415 #define __S101 PAGE_READ
416 #define __S110 PAGE_WRITE
417 #define __S111 PAGE_WRITE
420 * Segment entry (large page) protection definitions.
422 #define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \
423 _SEGMENT_ENTRY_PROTECT)
424 #define SEGMENT_READ __pgprot(_SEGMENT_ENTRY_PROTECT | \
426 #define SEGMENT_WRITE __pgprot(_SEGMENT_ENTRY_READ | \
427 _SEGMENT_ENTRY_WRITE)
428 #define SEGMENT_KERNEL __pgprot(_SEGMENT_ENTRY | \
429 _SEGMENT_ENTRY_LARGE | \
430 _SEGMENT_ENTRY_READ | \
431 _SEGMENT_ENTRY_WRITE | \
432 _SEGMENT_ENTRY_YOUNG | \
433 _SEGMENT_ENTRY_DIRTY)
434 #define SEGMENT_KERNEL_RO __pgprot(_SEGMENT_ENTRY | \
435 _SEGMENT_ENTRY_LARGE | \
436 _SEGMENT_ENTRY_READ | \
437 _SEGMENT_ENTRY_YOUNG | \
438 _SEGMENT_ENTRY_PROTECT)
441 * Region3 entry (large page) protection definitions.
444 #define REGION3_KERNEL __pgprot(_REGION_ENTRY_TYPE_R3 | \
445 _REGION3_ENTRY_LARGE | \
446 _REGION3_ENTRY_READ | \
447 _REGION3_ENTRY_WRITE | \
448 _REGION3_ENTRY_YOUNG | \
449 _REGION3_ENTRY_DIRTY)
450 #define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \
451 _REGION3_ENTRY_LARGE | \
452 _REGION3_ENTRY_READ | \
453 _REGION3_ENTRY_YOUNG | \
454 _REGION_ENTRY_PROTECT)
456 static inline int mm_has_pgste(struct mm_struct *mm)
459 if (unlikely(mm->context.has_pgste))
465 static inline int mm_alloc_pgste(struct mm_struct *mm)
468 if (unlikely(mm->context.alloc_pgste))
475 * In the case that a guest uses storage keys
476 * faults should no longer be backed by zero pages
478 #define mm_forbids_zeropage mm_use_skey
479 static inline int mm_use_skey(struct mm_struct *mm)
482 if (mm->context.use_skey)
488 static inline void csp(unsigned int *ptr, unsigned int old, unsigned int new)
490 register unsigned long reg2 asm("2") = old;
491 register unsigned long reg3 asm("3") = new;
492 unsigned long address = (unsigned long)ptr | 1;
496 : "+d" (reg2), "+m" (*ptr)
497 : "d" (reg3), "d" (address)
501 static inline void cspg(unsigned long *ptr, unsigned long old, unsigned long new)
503 register unsigned long reg2 asm("2") = old;
504 register unsigned long reg3 asm("3") = new;
505 unsigned long address = (unsigned long)ptr | 1;
508 " .insn rre,0xb98a0000,%0,%3"
509 : "+d" (reg2), "+m" (*ptr)
510 : "d" (reg3), "d" (address)
514 #define CRDTE_DTT_PAGE 0x00UL
515 #define CRDTE_DTT_SEGMENT 0x10UL
516 #define CRDTE_DTT_REGION3 0x14UL
517 #define CRDTE_DTT_REGION2 0x18UL
518 #define CRDTE_DTT_REGION1 0x1cUL
520 static inline void crdte(unsigned long old, unsigned long new,
521 unsigned long table, unsigned long dtt,
522 unsigned long address, unsigned long asce)
524 register unsigned long reg2 asm("2") = old;
525 register unsigned long reg3 asm("3") = new;
526 register unsigned long reg4 asm("4") = table | dtt;
527 register unsigned long reg5 asm("5") = address;
529 asm volatile(".insn rrf,0xb98f0000,%0,%2,%4,0"
531 : "d" (reg3), "d" (reg4), "d" (reg5), "a" (asce)
536 * pgd/pmd/pte query functions
538 static inline int pgd_present(pgd_t pgd)
540 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
542 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
545 static inline int pgd_none(pgd_t pgd)
547 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
549 return (pgd_val(pgd) & _REGION_ENTRY_INVALID) != 0UL;
552 static inline int pgd_bad(pgd_t pgd)
555 * With dynamic page table levels the pgd can be a region table
556 * entry or a segment table entry. Check for the bit that are
557 * invalid for either table entry.
560 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
561 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
562 return (pgd_val(pgd) & mask) != 0;
565 static inline int pud_present(pud_t pud)
567 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
569 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
572 static inline int pud_none(pud_t pud)
574 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
576 return (pud_val(pud) & _REGION_ENTRY_INVALID) != 0UL;
579 static inline int pud_large(pud_t pud)
581 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
583 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
586 static inline unsigned long pud_pfn(pud_t pud)
588 unsigned long origin_mask;
590 origin_mask = _REGION3_ENTRY_ORIGIN;
592 origin_mask = _REGION3_ENTRY_ORIGIN_LARGE;
593 return (pud_val(pud) & origin_mask) >> PAGE_SHIFT;
596 static inline int pud_bad(pud_t pud)
599 * With dynamic page table levels the pud can be a region table
600 * entry or a segment table entry. Check for the bit that are
601 * invalid for either table entry.
604 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
605 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
606 return (pud_val(pud) & mask) != 0;
609 static inline int pmd_present(pmd_t pmd)
611 return pmd_val(pmd) != _SEGMENT_ENTRY_INVALID;
614 static inline int pmd_none(pmd_t pmd)
616 return pmd_val(pmd) == _SEGMENT_ENTRY_INVALID;
619 static inline int pmd_large(pmd_t pmd)
621 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;
624 static inline unsigned long pmd_pfn(pmd_t pmd)
626 unsigned long origin_mask;
628 origin_mask = _SEGMENT_ENTRY_ORIGIN;
630 origin_mask = _SEGMENT_ENTRY_ORIGIN_LARGE;
631 return (pmd_val(pmd) & origin_mask) >> PAGE_SHIFT;
634 static inline int pmd_bad(pmd_t pmd)
637 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS_LARGE) != 0;
638 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS) != 0;
641 #define __HAVE_ARCH_PMD_WRITE
642 static inline int pmd_write(pmd_t pmd)
644 return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0;
647 static inline int pmd_dirty(pmd_t pmd)
651 dirty = (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0;
655 static inline int pmd_young(pmd_t pmd)
659 young = (pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG) != 0;
663 static inline int pte_present(pte_t pte)
665 /* Bit pattern: (pte & 0x001) == 0x001 */
666 return (pte_val(pte) & _PAGE_PRESENT) != 0;
669 static inline int pte_none(pte_t pte)
671 /* Bit pattern: pte == 0x400 */
672 return pte_val(pte) == _PAGE_INVALID;
675 static inline int pte_swap(pte_t pte)
677 /* Bit pattern: (pte & 0x201) == 0x200 */
678 return (pte_val(pte) & (_PAGE_PROTECT | _PAGE_PRESENT))
682 static inline int pte_special(pte_t pte)
684 return (pte_val(pte) & _PAGE_SPECIAL);
687 #define __HAVE_ARCH_PTE_SAME
688 static inline int pte_same(pte_t a, pte_t b)
690 return pte_val(a) == pte_val(b);
693 #ifdef CONFIG_NUMA_BALANCING
694 static inline int pte_protnone(pte_t pte)
696 return pte_present(pte) && !(pte_val(pte) & _PAGE_READ);
699 static inline int pmd_protnone(pmd_t pmd)
701 /* pmd_large(pmd) implies pmd_present(pmd) */
702 return pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_READ);
706 static inline int pte_soft_dirty(pte_t pte)
708 return pte_val(pte) & _PAGE_SOFT_DIRTY;
710 #define pte_swp_soft_dirty pte_soft_dirty
712 static inline pte_t pte_mksoft_dirty(pte_t pte)
714 pte_val(pte) |= _PAGE_SOFT_DIRTY;
717 #define pte_swp_mksoft_dirty pte_mksoft_dirty
719 static inline pte_t pte_clear_soft_dirty(pte_t pte)
721 pte_val(pte) &= ~_PAGE_SOFT_DIRTY;
724 #define pte_swp_clear_soft_dirty pte_clear_soft_dirty
726 static inline int pmd_soft_dirty(pmd_t pmd)
728 return pmd_val(pmd) & _SEGMENT_ENTRY_SOFT_DIRTY;
731 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
733 pmd_val(pmd) |= _SEGMENT_ENTRY_SOFT_DIRTY;
737 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
739 pmd_val(pmd) &= ~_SEGMENT_ENTRY_SOFT_DIRTY;
744 * query functions pte_write/pte_dirty/pte_young only work if
745 * pte_present() is true. Undefined behaviour if not..
747 static inline int pte_write(pte_t pte)
749 return (pte_val(pte) & _PAGE_WRITE) != 0;
752 static inline int pte_dirty(pte_t pte)
754 return (pte_val(pte) & _PAGE_DIRTY) != 0;
757 static inline int pte_young(pte_t pte)
759 return (pte_val(pte) & _PAGE_YOUNG) != 0;
762 #define __HAVE_ARCH_PTE_UNUSED
763 static inline int pte_unused(pte_t pte)
765 return pte_val(pte) & _PAGE_UNUSED;
769 * pgd/pmd/pte modification functions
772 static inline void pgd_clear(pgd_t *pgd)
774 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
775 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
778 static inline void pud_clear(pud_t *pud)
780 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
781 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
784 static inline void pmd_clear(pmd_t *pmdp)
786 pmd_val(*pmdp) = _SEGMENT_ENTRY_INVALID;
789 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
791 pte_val(*ptep) = _PAGE_INVALID;
795 * The following pte modification functions only work if
796 * pte_present() is true. Undefined behaviour if not..
798 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
800 pte_val(pte) &= _PAGE_CHG_MASK;
801 pte_val(pte) |= pgprot_val(newprot);
803 * newprot for PAGE_NONE, PAGE_READ and PAGE_WRITE has the
804 * invalid bit set, clear it again for readable, young pages
806 if ((pte_val(pte) & _PAGE_YOUNG) && (pte_val(pte) & _PAGE_READ))
807 pte_val(pte) &= ~_PAGE_INVALID;
809 * newprot for PAGE_READ and PAGE_WRITE has the page protection
810 * bit set, clear it again for writable, dirty pages
812 if ((pte_val(pte) & _PAGE_DIRTY) && (pte_val(pte) & _PAGE_WRITE))
813 pte_val(pte) &= ~_PAGE_PROTECT;
817 static inline pte_t pte_wrprotect(pte_t pte)
819 pte_val(pte) &= ~_PAGE_WRITE;
820 pte_val(pte) |= _PAGE_PROTECT;
824 static inline pte_t pte_mkwrite(pte_t pte)
826 pte_val(pte) |= _PAGE_WRITE;
827 if (pte_val(pte) & _PAGE_DIRTY)
828 pte_val(pte) &= ~_PAGE_PROTECT;
832 static inline pte_t pte_mkclean(pte_t pte)
834 pte_val(pte) &= ~_PAGE_DIRTY;
835 pte_val(pte) |= _PAGE_PROTECT;
839 static inline pte_t pte_mkdirty(pte_t pte)
841 pte_val(pte) |= _PAGE_DIRTY | _PAGE_SOFT_DIRTY;
842 if (pte_val(pte) & _PAGE_WRITE)
843 pte_val(pte) &= ~_PAGE_PROTECT;
847 static inline pte_t pte_mkold(pte_t pte)
849 pte_val(pte) &= ~_PAGE_YOUNG;
850 pte_val(pte) |= _PAGE_INVALID;
854 static inline pte_t pte_mkyoung(pte_t pte)
856 pte_val(pte) |= _PAGE_YOUNG;
857 if (pte_val(pte) & _PAGE_READ)
858 pte_val(pte) &= ~_PAGE_INVALID;
862 static inline pte_t pte_mkspecial(pte_t pte)
864 pte_val(pte) |= _PAGE_SPECIAL;
868 #ifdef CONFIG_HUGETLB_PAGE
869 static inline pte_t pte_mkhuge(pte_t pte)
871 pte_val(pte) |= _PAGE_LARGE;
876 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
878 unsigned long pto = (unsigned long) ptep;
880 /* Invalidation + global TLB flush for the pte */
883 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
886 static inline void __ptep_ipte_local(unsigned long address, pte_t *ptep)
888 unsigned long pto = (unsigned long) ptep;
890 /* Invalidation + local TLB flush for the pte */
892 " .insn rrf,0xb2210000,%2,%3,0,1"
893 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
896 static inline void __ptep_ipte_range(unsigned long address, int nr, pte_t *ptep)
898 unsigned long pto = (unsigned long) ptep;
900 /* Invalidate a range of ptes + global TLB flush of the ptes */
903 " .insn rrf,0xb2210000,%2,%0,%1,0"
904 : "+a" (address), "+a" (nr) : "a" (pto) : "memory");
909 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
910 * both clear the TLB for the unmapped pte. The reason is that
911 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
912 * to modify an active pte. The sequence is
913 * 1) ptep_get_and_clear
916 * On s390 the tlb needs to get flushed with the modification of the pte
917 * if the pte is active. The only way how this can be implemented is to
918 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
921 pte_t ptep_xchg_direct(struct mm_struct *, unsigned long, pte_t *, pte_t);
922 pte_t ptep_xchg_lazy(struct mm_struct *, unsigned long, pte_t *, pte_t);
924 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
925 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
926 unsigned long addr, pte_t *ptep)
930 pte = ptep_xchg_direct(vma->vm_mm, addr, ptep, pte_mkold(pte));
931 return pte_young(pte);
934 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
935 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
936 unsigned long address, pte_t *ptep)
938 return ptep_test_and_clear_young(vma, address, ptep);
941 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
942 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
943 unsigned long addr, pte_t *ptep)
945 return ptep_xchg_lazy(mm, addr, ptep, __pte(_PAGE_INVALID));
948 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
949 pte_t ptep_modify_prot_start(struct mm_struct *, unsigned long, pte_t *);
950 void ptep_modify_prot_commit(struct mm_struct *, unsigned long, pte_t *, pte_t);
952 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
953 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
954 unsigned long addr, pte_t *ptep)
956 return ptep_xchg_direct(vma->vm_mm, addr, ptep, __pte(_PAGE_INVALID));
960 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
961 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
962 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
963 * cannot be accessed while the batched unmap is running. In this case
964 * full==1 and a simple pte_clear is enough. See tlb.h.
966 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
967 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
969 pte_t *ptep, int full)
973 *ptep = __pte(_PAGE_INVALID);
976 return ptep_xchg_lazy(mm, addr, ptep, __pte(_PAGE_INVALID));
979 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
980 static inline void ptep_set_wrprotect(struct mm_struct *mm,
981 unsigned long addr, pte_t *ptep)
986 ptep_xchg_lazy(mm, addr, ptep, pte_wrprotect(pte));
989 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
990 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
991 unsigned long addr, pte_t *ptep,
992 pte_t entry, int dirty)
994 if (pte_same(*ptep, entry))
996 ptep_xchg_direct(vma->vm_mm, addr, ptep, entry);
1001 * Additional functions to handle KVM guest page tables
1003 void ptep_set_pte_at(struct mm_struct *mm, unsigned long addr,
1004 pte_t *ptep, pte_t entry);
1005 void ptep_set_notify(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1006 void ptep_notify(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1007 void ptep_zap_unused(struct mm_struct *mm, unsigned long addr,
1008 pte_t *ptep , int reset);
1009 void ptep_zap_key(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1011 bool test_and_clear_guest_dirty(struct mm_struct *mm, unsigned long address);
1012 int set_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1013 unsigned char key, bool nq);
1014 unsigned char get_guest_storage_key(struct mm_struct *mm, unsigned long addr);
1017 * Certain architectures need to do special things when PTEs
1018 * within a page table are directly modified. Thus, the following
1019 * hook is made available.
1021 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1022 pte_t *ptep, pte_t entry)
1024 if (mm_has_pgste(mm))
1025 ptep_set_pte_at(mm, addr, ptep, entry);
1031 * Conversion functions: convert a page and protection to a page entry,
1032 * and a page entry and page directory to the page they refer to.
1034 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1037 pte_val(__pte) = physpage + pgprot_val(pgprot);
1038 return pte_mkyoung(__pte);
1041 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1043 unsigned long physpage = page_to_phys(page);
1044 pte_t __pte = mk_pte_phys(physpage, pgprot);
1046 if (pte_write(__pte) && PageDirty(page))
1047 __pte = pte_mkdirty(__pte);
1051 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1052 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1053 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1054 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1056 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1057 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1059 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1060 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1061 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1063 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1065 pud_t *pud = (pud_t *) pgd;
1066 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1067 pud = (pud_t *) pgd_deref(*pgd);
1068 return pud + pud_index(address);
1071 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1073 pmd_t *pmd = (pmd_t *) pud;
1074 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1075 pmd = (pmd_t *) pud_deref(*pud);
1076 return pmd + pmd_index(address);
1079 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1080 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1081 #define pte_page(x) pfn_to_page(pte_pfn(x))
1083 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1085 /* Find an entry in the lowest level page table.. */
1086 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1087 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1088 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1089 #define pte_unmap(pte) do { } while (0)
1091 static inline pmd_t pmd_wrprotect(pmd_t pmd)
1093 pmd_val(pmd) &= ~_SEGMENT_ENTRY_WRITE;
1094 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1098 static inline pmd_t pmd_mkwrite(pmd_t pmd)
1100 pmd_val(pmd) |= _SEGMENT_ENTRY_WRITE;
1101 if (pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1103 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1107 static inline pmd_t pmd_mkclean(pmd_t pmd)
1109 if (pmd_large(pmd)) {
1110 pmd_val(pmd) &= ~_SEGMENT_ENTRY_DIRTY;
1111 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1116 static inline pmd_t pmd_mkdirty(pmd_t pmd)
1118 if (pmd_large(pmd)) {
1119 pmd_val(pmd) |= _SEGMENT_ENTRY_DIRTY |
1120 _SEGMENT_ENTRY_SOFT_DIRTY;
1121 if (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE)
1122 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1127 static inline pud_t pud_wrprotect(pud_t pud)
1129 pud_val(pud) &= ~_REGION3_ENTRY_WRITE;
1130 pud_val(pud) |= _REGION_ENTRY_PROTECT;
1134 static inline pud_t pud_mkwrite(pud_t pud)
1136 pud_val(pud) |= _REGION3_ENTRY_WRITE;
1137 if (pud_large(pud) && !(pud_val(pud) & _REGION3_ENTRY_DIRTY))
1139 pud_val(pud) &= ~_REGION_ENTRY_PROTECT;
1143 static inline pud_t pud_mkclean(pud_t pud)
1145 if (pud_large(pud)) {
1146 pud_val(pud) &= ~_REGION3_ENTRY_DIRTY;
1147 pud_val(pud) |= _REGION_ENTRY_PROTECT;
1152 static inline pud_t pud_mkdirty(pud_t pud)
1154 if (pud_large(pud)) {
1155 pud_val(pud) |= _REGION3_ENTRY_DIRTY |
1156 _REGION3_ENTRY_SOFT_DIRTY;
1157 if (pud_val(pud) & _REGION3_ENTRY_WRITE)
1158 pud_val(pud) &= ~_REGION_ENTRY_PROTECT;
1163 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1164 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1167 * pgprot is PAGE_NONE, PAGE_READ, or PAGE_WRITE (see __Pxxx / __Sxxx)
1168 * Convert to segment table entry format.
1170 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1171 return pgprot_val(SEGMENT_NONE);
1172 if (pgprot_val(pgprot) == pgprot_val(PAGE_READ))
1173 return pgprot_val(SEGMENT_READ);
1174 return pgprot_val(SEGMENT_WRITE);
1177 static inline pmd_t pmd_mkyoung(pmd_t pmd)
1179 if (pmd_large(pmd)) {
1180 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1181 if (pmd_val(pmd) & _SEGMENT_ENTRY_READ)
1182 pmd_val(pmd) &= ~_SEGMENT_ENTRY_INVALID;
1187 static inline pmd_t pmd_mkold(pmd_t pmd)
1189 if (pmd_large(pmd)) {
1190 pmd_val(pmd) &= ~_SEGMENT_ENTRY_YOUNG;
1191 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1196 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1198 if (pmd_large(pmd)) {
1199 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN_LARGE |
1200 _SEGMENT_ENTRY_DIRTY | _SEGMENT_ENTRY_YOUNG |
1201 _SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_SOFT_DIRTY;
1202 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1203 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1204 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1205 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG))
1206 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1209 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN;
1210 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1214 static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1217 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1221 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1223 static inline void __pmdp_csp(pmd_t *pmdp)
1225 csp((unsigned int *)pmdp + 1, pmd_val(*pmdp),
1226 pmd_val(*pmdp) | _SEGMENT_ENTRY_INVALID);
1229 static inline void __pmdp_idte(unsigned long address, pmd_t *pmdp)
1233 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1235 " .insn rrf,0xb98e0000,%2,%3,0,0"
1237 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1241 static inline void __pmdp_idte_local(unsigned long address, pmd_t *pmdp)
1245 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1247 " .insn rrf,0xb98e0000,%2,%3,0,1"
1249 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1253 pmd_t pmdp_xchg_direct(struct mm_struct *, unsigned long, pmd_t *, pmd_t);
1254 pmd_t pmdp_xchg_lazy(struct mm_struct *, unsigned long, pmd_t *, pmd_t);
1256 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1258 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1259 void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
1262 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1263 pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
1265 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1266 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
1267 unsigned long addr, pmd_t *pmdp,
1268 pmd_t entry, int dirty)
1270 VM_BUG_ON(addr & ~HPAGE_MASK);
1272 entry = pmd_mkyoung(entry);
1274 entry = pmd_mkdirty(entry);
1275 if (pmd_val(*pmdp) == pmd_val(entry))
1277 pmdp_xchg_direct(vma->vm_mm, addr, pmdp, entry);
1281 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1282 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1283 unsigned long addr, pmd_t *pmdp)
1287 pmd = pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd_mkold(pmd));
1288 return pmd_young(pmd);
1291 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1292 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
1293 unsigned long addr, pmd_t *pmdp)
1295 VM_BUG_ON(addr & ~HPAGE_MASK);
1296 return pmdp_test_and_clear_young(vma, addr, pmdp);
1299 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1300 pmd_t *pmdp, pmd_t entry)
1305 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1307 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1308 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1309 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1313 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1314 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
1315 unsigned long addr, pmd_t *pmdp)
1317 return pmdp_xchg_direct(mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_INVALID));
1320 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
1321 static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
1323 pmd_t *pmdp, int full)
1327 *pmdp = __pmd(_SEGMENT_ENTRY_INVALID);
1330 return pmdp_xchg_lazy(mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_INVALID));
1333 #define __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
1334 static inline pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
1335 unsigned long addr, pmd_t *pmdp)
1337 return pmdp_huge_get_and_clear(vma->vm_mm, addr, pmdp);
1340 #define __HAVE_ARCH_PMDP_INVALIDATE
1341 static inline void pmdp_invalidate(struct vm_area_struct *vma,
1342 unsigned long addr, pmd_t *pmdp)
1344 pmdp_xchg_direct(vma->vm_mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_INVALID));
1347 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1348 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1349 unsigned long addr, pmd_t *pmdp)
1354 pmd = pmdp_xchg_lazy(mm, addr, pmdp, pmd_wrprotect(pmd));
1357 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
1358 unsigned long address,
1361 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
1363 #define pmdp_collapse_flush pmdp_collapse_flush
1365 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1366 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1368 static inline int pmd_trans_huge(pmd_t pmd)
1370 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1373 #define has_transparent_hugepage has_transparent_hugepage
1374 static inline int has_transparent_hugepage(void)
1376 return MACHINE_HAS_HPAGE ? 1 : 0;
1378 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1381 * 64 bit swap entry format:
1382 * A page-table entry has some bits we have to treat in a special way.
1383 * Bits 52 and bit 55 have to be zero, otherwise a specification
1384 * exception will occur instead of a page translation exception. The
1385 * specification exception has the bad habit not to store necessary
1386 * information in the lowcore.
1387 * Bits 54 and 63 are used to indicate the page type.
1388 * A swap pte is indicated by bit pattern (pte & 0x201) == 0x200
1389 * This leaves the bits 0-51 and bits 56-62 to store type and offset.
1390 * We use the 5 bits from 57-61 for the type and the 52 bits from 0-51
1392 * | offset |01100|type |00|
1393 * |0000000000111111111122222222223333333333444444444455|55555|55566|66|
1394 * |0123456789012345678901234567890123456789012345678901|23456|78901|23|
1397 #define __SWP_OFFSET_MASK ((1UL << 52) - 1)
1398 #define __SWP_OFFSET_SHIFT 12
1399 #define __SWP_TYPE_MASK ((1UL << 5) - 1)
1400 #define __SWP_TYPE_SHIFT 2
1402 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1406 pte_val(pte) = _PAGE_INVALID | _PAGE_PROTECT;
1407 pte_val(pte) |= (offset & __SWP_OFFSET_MASK) << __SWP_OFFSET_SHIFT;
1408 pte_val(pte) |= (type & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT;
1412 static inline unsigned long __swp_type(swp_entry_t entry)
1414 return (entry.val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK;
1417 static inline unsigned long __swp_offset(swp_entry_t entry)
1419 return (entry.val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK;
1422 static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
1424 return (swp_entry_t) { pte_val(mk_swap_pte(type, offset)) };
1427 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1428 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1430 #endif /* !__ASSEMBLY__ */
1432 #define kern_addr_valid(addr) (1)
1434 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1435 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1436 extern int s390_enable_sie(void);
1437 extern int s390_enable_skey(void);
1438 extern void s390_reset_cmma(struct mm_struct *mm);
1440 /* s390 has a private copy of get unmapped area to deal with cache synonyms */
1441 #define HAVE_ARCH_UNMAPPED_AREA
1442 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1445 * No page table caches to initialise
1447 static inline void pgtable_cache_init(void) { }
1448 static inline void check_pgt_cache(void) { }
1450 #include <asm-generic/pgtable.h>
1452 #endif /* _S390_PAGE_H */