3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/pgtable.h"
11 #ifndef _ASM_S390_PGTABLE_H
12 #define _ASM_S390_PGTABLE_H
15 * The Linux memory management assumes a three-level page table setup. For
16 * s390 31 bit we "fold" the mid level into the top-level page table, so
17 * that we physically have the same two-level page table as the s390 mmu
18 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
19 * the hardware provides (region first and region second tables are not
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
30 #include <linux/sched.h>
31 #include <linux/mm_types.h>
32 #include <linux/page-flags.h>
33 #include <linux/radix-tree.h>
37 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
38 extern void paging_init(void);
39 extern void vmem_map_init(void);
42 * The S390 doesn't have any external MMU info: the kernel page
43 * tables contain all the necessary information.
45 #define update_mmu_cache(vma, address, ptep) do { } while (0)
46 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
49 * ZERO_PAGE is a global shared page that is always zero; used
50 * for zero-mapped memory areas etc..
53 extern unsigned long empty_zero_page;
54 extern unsigned long zero_page_mask;
56 #define ZERO_PAGE(vaddr) \
57 (virt_to_page((void *)(empty_zero_page + \
58 (((unsigned long)(vaddr)) &zero_page_mask))))
59 #define __HAVE_COLOR_ZERO_PAGE
61 /* TODO: s390 cannot support io_remap_pfn_range... */
62 #endif /* !__ASSEMBLY__ */
65 * PMD_SHIFT determines the size of the area a second-level page
67 * PGDIR_SHIFT determines what a third-level page table entry can map
72 # define PGDIR_SHIFT 20
73 #else /* CONFIG_64BIT */
76 # define PGDIR_SHIFT 42
77 #endif /* CONFIG_64BIT */
79 #define PMD_SIZE (1UL << PMD_SHIFT)
80 #define PMD_MASK (~(PMD_SIZE-1))
81 #define PUD_SIZE (1UL << PUD_SHIFT)
82 #define PUD_MASK (~(PUD_SIZE-1))
83 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
84 #define PGDIR_MASK (~(PGDIR_SIZE-1))
87 * entries per page directory level: the S390 is two-level, so
88 * we don't really have any PMD directory physically.
89 * for S390 segment-table entries are combined to one PGD
90 * that leads to 1024 pte per pgd
92 #define PTRS_PER_PTE 256
94 #define PTRS_PER_PMD 1
95 #define PTRS_PER_PUD 1
96 #else /* CONFIG_64BIT */
97 #define PTRS_PER_PMD 2048
98 #define PTRS_PER_PUD 2048
99 #endif /* CONFIG_64BIT */
100 #define PTRS_PER_PGD 2048
102 #define FIRST_USER_ADDRESS 0
104 #define pte_ERROR(e) \
105 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
106 #define pmd_ERROR(e) \
107 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
108 #define pud_ERROR(e) \
109 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
110 #define pgd_ERROR(e) \
111 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
115 * The vmalloc and module area will always be on the topmost area of the kernel
116 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc and modules.
117 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
118 * modules will reside. That makes sure that inter module branches always
119 * happen without trampolines and in addition the placement within a 2GB frame
120 * is branch prediction unit friendly.
122 extern unsigned long VMALLOC_START;
123 extern unsigned long VMALLOC_END;
124 extern struct page *vmemmap;
126 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
129 extern unsigned long MODULES_VADDR;
130 extern unsigned long MODULES_END;
131 #define MODULES_VADDR MODULES_VADDR
132 #define MODULES_END MODULES_END
133 #define MODULES_LEN (1UL << 31)
137 * A 31 bit pagetable entry of S390 has following format:
140 * 00000000001111111111222222222233
141 * 01234567890123456789012345678901
143 * I Page-Invalid Bit: Page is not available for address-translation
144 * P Page-Protection Bit: Store access not possible for page
146 * A 31 bit segmenttable entry of S390 has following format:
147 * | P-table origin | |PTL
149 * 00000000001111111111222222222233
150 * 01234567890123456789012345678901
152 * I Segment-Invalid Bit: Segment is not available for address-translation
153 * C Common-Segment Bit: Segment is not private (PoP 3-30)
154 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
156 * The 31 bit segmenttable origin of S390 has following format:
158 * |S-table origin | | STL |
160 * 00000000001111111111222222222233
161 * 01234567890123456789012345678901
163 * X Space-Switch event:
164 * G Segment-Invalid Bit: *
165 * P Private-Space Bit: Segment is not private (PoP 3-30)
166 * S Storage-Alteration:
167 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
169 * A 64 bit pagetable entry of S390 has following format:
171 * 0000000000111111111122222222223333333333444444444455555555556666
172 * 0123456789012345678901234567890123456789012345678901234567890123
174 * I Page-Invalid Bit: Page is not available for address-translation
175 * P Page-Protection Bit: Store access not possible for page
176 * C Change-bit override: HW is not required to set change bit
178 * A 64 bit segmenttable entry of S390 has following format:
179 * | P-table origin | TT
180 * 0000000000111111111122222222223333333333444444444455555555556666
181 * 0123456789012345678901234567890123456789012345678901234567890123
183 * I Segment-Invalid Bit: Segment is not available for address-translation
184 * C Common-Segment Bit: Segment is not private (PoP 3-30)
185 * P Page-Protection Bit: Store access not possible for page
188 * A 64 bit region table entry of S390 has following format:
189 * | S-table origin | TF TTTL
190 * 0000000000111111111122222222223333333333444444444455555555556666
191 * 0123456789012345678901234567890123456789012345678901234567890123
193 * I Segment-Invalid Bit: Segment is not available for address-translation
198 * The 64 bit regiontable origin of S390 has following format:
199 * | region table origon | DTTL
200 * 0000000000111111111122222222223333333333444444444455555555556666
201 * 0123456789012345678901234567890123456789012345678901234567890123
203 * X Space-Switch event:
204 * G Segment-Invalid Bit:
205 * P Private-Space Bit:
206 * S Storage-Alteration:
210 * A storage key has the following format:
214 * F : fetch protection bit
219 /* Hardware bits in the page table entry */
220 #define _PAGE_CO 0x100 /* HW Change-bit override */
221 #define _PAGE_PROTECT 0x200 /* HW read-only bit */
222 #define _PAGE_INVALID 0x400 /* HW invalid bit */
223 #define _PAGE_LARGE 0x800 /* Bit to mark a large pte */
225 /* Software bits in the page table entry */
226 #define _PAGE_PRESENT 0x001 /* SW pte present bit */
227 #define _PAGE_TYPE 0x002 /* SW pte type bit */
228 #define _PAGE_YOUNG 0x004 /* SW pte young bit */
229 #define _PAGE_DIRTY 0x008 /* SW pte dirty bit */
230 #define _PAGE_READ 0x010 /* SW pte read bit */
231 #define _PAGE_WRITE 0x020 /* SW pte write bit */
232 #define _PAGE_SPECIAL 0x040 /* SW associated with special page */
233 #define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
234 #define __HAVE_ARCH_PTE_SPECIAL
236 /* Set of bits not changed in pte_modify */
237 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_CO | \
238 _PAGE_DIRTY | _PAGE_YOUNG)
241 * handle_pte_fault uses pte_present, pte_none and pte_file to find out the
242 * pte type WITHOUT holding the page table lock. The _PAGE_PRESENT bit
243 * is used to distinguish present from not-present ptes. It is changed only
244 * with the page table lock held.
246 * The following table gives the different possible bit combinations for
247 * the pte hardware and software bits in the last 12 bits of a pte:
256 * prot-none, clean, old .11...000001
257 * prot-none, clean, young .11...000101
258 * prot-none, dirty, old .10...001001
259 * prot-none, dirty, young .10...001101
260 * read-only, clean, old .11...010001
261 * read-only, clean, young .01...010101
262 * read-only, dirty, old .11...011001
263 * read-only, dirty, young .01...011101
264 * read-write, clean, old .11...110001
265 * read-write, clean, young .01...110101
266 * read-write, dirty, old .10...111001
267 * read-write, dirty, young .00...111101
269 * pte_present is true for the bit pattern .xx...xxxxx1, (pte & 0x001) == 0x001
270 * pte_none is true for the bit pattern .10...xxxx00, (pte & 0x603) == 0x400
271 * pte_file is true for the bit pattern .11...xxxxx0, (pte & 0x601) == 0x600
272 * pte_swap is true for the bit pattern .10...xxxx10, (pte & 0x603) == 0x402
277 /* Bits in the segment table address-space-control-element */
278 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
279 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
280 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
281 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
282 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
284 /* Bits in the segment table entry */
285 #define _SEGMENT_ENTRY_BITS 0x7fffffffUL /* Valid segment table bits */
286 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
287 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
288 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
289 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
290 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
292 #define _SEGMENT_ENTRY_DIRTY 0 /* No sw dirty bit for 31-bit */
293 #define _SEGMENT_ENTRY_YOUNG 0 /* No sw young bit for 31-bit */
294 #define _SEGMENT_ENTRY_READ 0 /* No sw read bit for 31-bit */
295 #define _SEGMENT_ENTRY_WRITE 0 /* No sw write bit for 31-bit */
296 #define _SEGMENT_ENTRY_LARGE 0 /* No large pages for 31-bit */
297 #define _SEGMENT_ENTRY_BITS_LARGE 0
298 #define _SEGMENT_ENTRY_ORIGIN_LARGE 0
300 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
301 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
304 * Segment table entry encoding (I = invalid, R = read-only bit):
306 * prot-none ..1...1.....
307 * read-only ..1...0.....
308 * read-write ..0...0.....
312 /* Page status table bits for virtualization */
313 #define PGSTE_ACC_BITS 0xf0000000UL
314 #define PGSTE_FP_BIT 0x08000000UL
315 #define PGSTE_PCL_BIT 0x00800000UL
316 #define PGSTE_HR_BIT 0x00400000UL
317 #define PGSTE_HC_BIT 0x00200000UL
318 #define PGSTE_GR_BIT 0x00040000UL
319 #define PGSTE_GC_BIT 0x00020000UL
320 #define PGSTE_UC_BIT 0x00008000UL /* user dirty (migration) */
321 #define PGSTE_IN_BIT 0x00004000UL /* IPTE notify bit */
323 #else /* CONFIG_64BIT */
325 /* Bits in the segment/region table address-space-control-element */
326 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
327 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
328 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
329 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
330 #define _ASCE_REAL_SPACE 0x20 /* real space control */
331 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
332 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
333 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
334 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
335 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
336 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
338 /* Bits in the region table entry */
339 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
340 #define _REGION_ENTRY_PROTECT 0x200 /* region protection bit */
341 #define _REGION_ENTRY_INVALID 0x20 /* invalid region table entry */
342 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
343 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
344 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
345 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
346 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
348 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
349 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
350 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
351 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
352 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
353 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
355 #define _REGION3_ENTRY_LARGE 0x400 /* RTTE-format control, large page */
356 #define _REGION3_ENTRY_RO 0x200 /* page protection bit */
357 #define _REGION3_ENTRY_CO 0x100 /* change-recording override */
359 /* Bits in the segment table entry */
360 #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe33UL
361 #define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
362 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
363 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
364 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
365 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
367 #define _SEGMENT_ENTRY (0)
368 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
370 #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
371 #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
372 #define _SEGMENT_ENTRY_SPLIT 0x0800 /* THP splitting bit */
373 #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
374 #define _SEGMENT_ENTRY_CO 0x0100 /* change-recording override */
375 #define _SEGMENT_ENTRY_READ 0x0002 /* SW segment read bit */
376 #define _SEGMENT_ENTRY_WRITE 0x0001 /* SW segment write bit */
379 * Segment table entry encoding (R = read-only, I = invalid, y = young bit):
381 * prot-none, clean, old 00..1...1...00
382 * prot-none, clean, young 01..1...1...00
383 * prot-none, dirty, old 10..1...1...00
384 * prot-none, dirty, young 11..1...1...00
385 * read-only, clean, old 00..1...1...01
386 * read-only, clean, young 01..1...0...01
387 * read-only, dirty, old 10..1...1...01
388 * read-only, dirty, young 11..1...0...01
389 * read-write, clean, old 00..1...1...11
390 * read-write, clean, young 01..1...0...11
391 * read-write, dirty, old 10..0...1...11
392 * read-write, dirty, young 11..0...0...11
393 * The segment table origin is used to distinguish empty (origin==0) from
394 * read-write, old segment table entries (origin!=0)
397 #define _SEGMENT_ENTRY_SPLIT_BIT 11 /* THP splitting bit number */
399 /* Page status table bits for virtualization */
400 #define PGSTE_ACC_BITS 0xf000000000000000UL
401 #define PGSTE_FP_BIT 0x0800000000000000UL
402 #define PGSTE_PCL_BIT 0x0080000000000000UL
403 #define PGSTE_HR_BIT 0x0040000000000000UL
404 #define PGSTE_HC_BIT 0x0020000000000000UL
405 #define PGSTE_GR_BIT 0x0004000000000000UL
406 #define PGSTE_GC_BIT 0x0002000000000000UL
407 #define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
408 #define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
410 #endif /* CONFIG_64BIT */
412 /* Guest Page State used for virtualization */
413 #define _PGSTE_GPS_ZERO 0x0000000080000000UL
414 #define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
415 #define _PGSTE_GPS_USAGE_STABLE 0x0000000000000000UL
416 #define _PGSTE_GPS_USAGE_UNUSED 0x0000000001000000UL
419 * A user page table pointer has the space-switch-event bit, the
420 * private-space-control bit and the storage-alteration-event-control
421 * bit set. A kernel page table pointer doesn't need them.
423 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
427 * Page protection definitions.
429 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID)
430 #define PAGE_READ __pgprot(_PAGE_PRESENT | _PAGE_READ | \
431 _PAGE_INVALID | _PAGE_PROTECT)
432 #define PAGE_WRITE __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
433 _PAGE_INVALID | _PAGE_PROTECT)
435 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
436 _PAGE_YOUNG | _PAGE_DIRTY)
437 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
438 _PAGE_YOUNG | _PAGE_DIRTY)
439 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
443 * On s390 the page table entry has an invalid bit and a read-only bit.
444 * Read permission implies execute permission and write permission
445 * implies read permission.
448 #define __P000 PAGE_NONE
449 #define __P001 PAGE_READ
450 #define __P010 PAGE_READ
451 #define __P011 PAGE_READ
452 #define __P100 PAGE_READ
453 #define __P101 PAGE_READ
454 #define __P110 PAGE_READ
455 #define __P111 PAGE_READ
457 #define __S000 PAGE_NONE
458 #define __S001 PAGE_READ
459 #define __S010 PAGE_WRITE
460 #define __S011 PAGE_WRITE
461 #define __S100 PAGE_READ
462 #define __S101 PAGE_READ
463 #define __S110 PAGE_WRITE
464 #define __S111 PAGE_WRITE
467 * Segment entry (large page) protection definitions.
469 #define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \
470 _SEGMENT_ENTRY_PROTECT)
471 #define SEGMENT_READ __pgprot(_SEGMENT_ENTRY_PROTECT | \
473 #define SEGMENT_WRITE __pgprot(_SEGMENT_ENTRY_READ | \
474 _SEGMENT_ENTRY_WRITE)
476 static inline int mm_has_pgste(struct mm_struct *mm)
479 if (unlikely(mm->context.has_pgste))
485 static inline int mm_use_skey(struct mm_struct *mm)
488 if (mm->context.use_skey)
495 * pgd/pmd/pte query functions
499 static inline int pgd_present(pgd_t pgd) { return 1; }
500 static inline int pgd_none(pgd_t pgd) { return 0; }
501 static inline int pgd_bad(pgd_t pgd) { return 0; }
503 static inline int pud_present(pud_t pud) { return 1; }
504 static inline int pud_none(pud_t pud) { return 0; }
505 static inline int pud_large(pud_t pud) { return 0; }
506 static inline int pud_bad(pud_t pud) { return 0; }
508 #else /* CONFIG_64BIT */
510 static inline int pgd_present(pgd_t pgd)
512 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
514 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
517 static inline int pgd_none(pgd_t pgd)
519 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
521 return (pgd_val(pgd) & _REGION_ENTRY_INVALID) != 0UL;
524 static inline int pgd_bad(pgd_t pgd)
527 * With dynamic page table levels the pgd can be a region table
528 * entry or a segment table entry. Check for the bit that are
529 * invalid for either table entry.
532 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
533 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
534 return (pgd_val(pgd) & mask) != 0;
537 static inline int pud_present(pud_t pud)
539 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
541 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
544 static inline int pud_none(pud_t pud)
546 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
548 return (pud_val(pud) & _REGION_ENTRY_INVALID) != 0UL;
551 static inline int pud_large(pud_t pud)
553 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
555 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
558 static inline int pud_bad(pud_t pud)
561 * With dynamic page table levels the pud can be a region table
562 * entry or a segment table entry. Check for the bit that are
563 * invalid for either table entry.
566 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
567 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
568 return (pud_val(pud) & mask) != 0;
571 #endif /* CONFIG_64BIT */
573 static inline int pmd_present(pmd_t pmd)
575 return pmd_val(pmd) != _SEGMENT_ENTRY_INVALID;
578 static inline int pmd_none(pmd_t pmd)
580 return pmd_val(pmd) == _SEGMENT_ENTRY_INVALID;
583 static inline int pmd_large(pmd_t pmd)
585 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;
588 static inline int pmd_pfn(pmd_t pmd)
590 unsigned long origin_mask;
592 origin_mask = _SEGMENT_ENTRY_ORIGIN;
594 origin_mask = _SEGMENT_ENTRY_ORIGIN_LARGE;
595 return (pmd_val(pmd) & origin_mask) >> PAGE_SHIFT;
598 static inline int pmd_bad(pmd_t pmd)
601 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS_LARGE) != 0;
602 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS) != 0;
605 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
606 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
607 unsigned long addr, pmd_t *pmdp);
609 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
610 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
611 unsigned long address, pmd_t *pmdp,
612 pmd_t entry, int dirty);
614 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
615 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
616 unsigned long address, pmd_t *pmdp);
618 #define __HAVE_ARCH_PMD_WRITE
619 static inline int pmd_write(pmd_t pmd)
621 return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0;
624 static inline int pmd_dirty(pmd_t pmd)
628 dirty = (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0;
632 static inline int pmd_young(pmd_t pmd)
636 young = (pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG) != 0;
640 static inline int pte_present(pte_t pte)
642 /* Bit pattern: (pte & 0x001) == 0x001 */
643 return (pte_val(pte) & _PAGE_PRESENT) != 0;
646 static inline int pte_none(pte_t pte)
648 /* Bit pattern: pte == 0x400 */
649 return pte_val(pte) == _PAGE_INVALID;
652 static inline int pte_swap(pte_t pte)
654 /* Bit pattern: (pte & 0x603) == 0x402 */
655 return (pte_val(pte) & (_PAGE_INVALID | _PAGE_PROTECT |
656 _PAGE_TYPE | _PAGE_PRESENT))
657 == (_PAGE_INVALID | _PAGE_TYPE);
660 static inline int pte_file(pte_t pte)
662 /* Bit pattern: (pte & 0x601) == 0x600 */
663 return (pte_val(pte) & (_PAGE_INVALID | _PAGE_PROTECT | _PAGE_PRESENT))
664 == (_PAGE_INVALID | _PAGE_PROTECT);
667 static inline int pte_special(pte_t pte)
669 return (pte_val(pte) & _PAGE_SPECIAL);
672 #define __HAVE_ARCH_PTE_SAME
673 static inline int pte_same(pte_t a, pte_t b)
675 return pte_val(a) == pte_val(b);
678 static inline pgste_t pgste_get_lock(pte_t *ptep)
680 unsigned long new = 0;
688 " nihh %0,0xff7f\n" /* clear PCL bit in old */
689 " oihh %1,0x0080\n" /* set PCL bit in new */
692 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
693 : "Q" (ptep[PTRS_PER_PTE]) : "cc", "memory");
698 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
702 " nihh %1,0xff7f\n" /* clear PCL bit */
704 : "=Q" (ptep[PTRS_PER_PTE])
705 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE])
711 static inline pgste_t pgste_get(pte_t *ptep)
713 unsigned long pgste = 0;
715 pgste = *(unsigned long *)(ptep + PTRS_PER_PTE);
717 return __pgste(pgste);
720 static inline void pgste_set(pte_t *ptep, pgste_t pgste)
723 *(pgste_t *)(ptep + PTRS_PER_PTE) = pgste;
727 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste,
728 struct mm_struct *mm)
731 unsigned long address, bits, skey;
733 if (!mm_use_skey(mm) || pte_val(*ptep) & _PAGE_INVALID)
735 address = pte_val(*ptep) & PAGE_MASK;
736 skey = (unsigned long) page_get_storage_key(address);
737 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
738 /* Transfer page changed & referenced bit to guest bits in pgste */
739 pgste_val(pgste) |= bits << 48; /* GR bit & GC bit */
740 /* Copy page access key and fetch protection bit to pgste */
741 pgste_val(pgste) &= ~(PGSTE_ACC_BITS | PGSTE_FP_BIT);
742 pgste_val(pgste) |= (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
748 static inline void pgste_set_key(pte_t *ptep, pgste_t pgste, pte_t entry,
749 struct mm_struct *mm)
752 unsigned long address;
755 if (!mm_use_skey(mm) || pte_val(entry) & _PAGE_INVALID)
757 VM_BUG_ON(!(pte_val(*ptep) & _PAGE_INVALID));
758 address = pte_val(entry) & PAGE_MASK;
760 * Set page access key and fetch protection bit from pgste.
761 * The guest C/R information is still in the PGSTE, set real
764 nkey = (pgste_val(pgste) & (PGSTE_ACC_BITS | PGSTE_FP_BIT)) >> 56;
765 nkey |= (pgste_val(pgste) & (PGSTE_GR_BIT | PGSTE_GC_BIT)) >> 48;
766 page_set_storage_key(address, nkey, 0);
770 static inline pgste_t pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
772 if ((pte_val(entry) & _PAGE_PRESENT) &&
773 (pte_val(entry) & _PAGE_WRITE) &&
774 !(pte_val(entry) & _PAGE_INVALID)) {
775 if (!MACHINE_HAS_ESOP) {
777 * Without enhanced suppression-on-protection force
778 * the dirty bit on for all writable ptes.
780 pte_val(entry) |= _PAGE_DIRTY;
781 pte_val(entry) &= ~_PAGE_PROTECT;
783 if (!(pte_val(entry) & _PAGE_PROTECT))
784 /* This pte allows write access, set user-dirty */
785 pgste_val(pgste) |= PGSTE_UC_BIT;
792 * struct gmap_struct - guest address space
793 * @crst_list: list of all crst tables used in the guest address space
794 * @mm: pointer to the parent mm_struct
795 * @guest_to_host: radix tree with guest to host address translation
796 * @host_to_guest: radix tree with pointer to segment table entries
797 * @guest_table_lock: spinlock to protect all entries in the guest page table
798 * @table: pointer to the page directory
799 * @asce: address space control element for gmap page table
800 * @pfault_enabled: defines if pfaults are applicable for the guest
803 struct list_head list;
804 struct list_head crst_list;
805 struct mm_struct *mm;
806 struct radix_tree_root guest_to_host;
807 struct radix_tree_root host_to_guest;
808 spinlock_t guest_table_lock;
809 unsigned long *table;
811 unsigned long asce_end;
817 * struct gmap_notifier - notify function block for page invalidation
818 * @notifier_call: address of callback function
820 struct gmap_notifier {
821 struct list_head list;
822 void (*notifier_call)(struct gmap *gmap, unsigned long gaddr);
825 struct gmap *gmap_alloc(struct mm_struct *mm, unsigned long limit);
826 void gmap_free(struct gmap *gmap);
827 void gmap_enable(struct gmap *gmap);
828 void gmap_disable(struct gmap *gmap);
829 int gmap_map_segment(struct gmap *gmap, unsigned long from,
830 unsigned long to, unsigned long len);
831 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
832 unsigned long __gmap_translate(struct gmap *, unsigned long gaddr);
833 unsigned long gmap_translate(struct gmap *, unsigned long gaddr);
834 int __gmap_link(struct gmap *gmap, unsigned long gaddr, unsigned long vmaddr);
835 int gmap_fault(struct gmap *, unsigned long gaddr, unsigned int fault_flags);
836 void gmap_discard(struct gmap *, unsigned long from, unsigned long to);
837 void __gmap_zap(struct gmap *, unsigned long gaddr);
838 bool gmap_test_and_clear_dirty(unsigned long address, struct gmap *);
841 void gmap_register_ipte_notifier(struct gmap_notifier *);
842 void gmap_unregister_ipte_notifier(struct gmap_notifier *);
843 int gmap_ipte_notify(struct gmap *, unsigned long start, unsigned long len);
844 void gmap_do_ipte_notify(struct mm_struct *, unsigned long addr, pte_t *);
846 static inline pgste_t pgste_ipte_notify(struct mm_struct *mm,
848 pte_t *ptep, pgste_t pgste)
851 if (pgste_val(pgste) & PGSTE_IN_BIT) {
852 pgste_val(pgste) &= ~PGSTE_IN_BIT;
853 gmap_do_ipte_notify(mm, addr, ptep);
860 * Certain architectures need to do special things when PTEs
861 * within a page table are directly modified. Thus, the following
862 * hook is made available.
864 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
865 pte_t *ptep, pte_t entry)
869 if (mm_has_pgste(mm)) {
870 pgste = pgste_get_lock(ptep);
871 pgste_val(pgste) &= ~_PGSTE_GPS_ZERO;
872 pgste_set_key(ptep, pgste, entry, mm);
873 pgste = pgste_set_pte(ptep, pgste, entry);
874 pgste_set_unlock(ptep, pgste);
876 if (!(pte_val(entry) & _PAGE_INVALID) && MACHINE_HAS_EDAT1)
877 pte_val(entry) |= _PAGE_CO;
883 * query functions pte_write/pte_dirty/pte_young only work if
884 * pte_present() is true. Undefined behaviour if not..
886 static inline int pte_write(pte_t pte)
888 return (pte_val(pte) & _PAGE_WRITE) != 0;
891 static inline int pte_dirty(pte_t pte)
893 return (pte_val(pte) & _PAGE_DIRTY) != 0;
896 static inline int pte_young(pte_t pte)
898 return (pte_val(pte) & _PAGE_YOUNG) != 0;
901 #define __HAVE_ARCH_PTE_UNUSED
902 static inline int pte_unused(pte_t pte)
904 return pte_val(pte) & _PAGE_UNUSED;
908 * pgd/pmd/pte modification functions
911 static inline void pgd_clear(pgd_t *pgd)
914 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
915 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
919 static inline void pud_clear(pud_t *pud)
922 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
923 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
927 static inline void pmd_clear(pmd_t *pmdp)
929 pmd_val(*pmdp) = _SEGMENT_ENTRY_INVALID;
932 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
934 pte_val(*ptep) = _PAGE_INVALID;
938 * The following pte modification functions only work if
939 * pte_present() is true. Undefined behaviour if not..
941 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
943 pte_val(pte) &= _PAGE_CHG_MASK;
944 pte_val(pte) |= pgprot_val(newprot);
946 * newprot for PAGE_NONE, PAGE_READ and PAGE_WRITE has the
947 * invalid bit set, clear it again for readable, young pages
949 if ((pte_val(pte) & _PAGE_YOUNG) && (pte_val(pte) & _PAGE_READ))
950 pte_val(pte) &= ~_PAGE_INVALID;
952 * newprot for PAGE_READ and PAGE_WRITE has the page protection
953 * bit set, clear it again for writable, dirty pages
955 if ((pte_val(pte) & _PAGE_DIRTY) && (pte_val(pte) & _PAGE_WRITE))
956 pte_val(pte) &= ~_PAGE_PROTECT;
960 static inline pte_t pte_wrprotect(pte_t pte)
962 pte_val(pte) &= ~_PAGE_WRITE;
963 pte_val(pte) |= _PAGE_PROTECT;
967 static inline pte_t pte_mkwrite(pte_t pte)
969 pte_val(pte) |= _PAGE_WRITE;
970 if (pte_val(pte) & _PAGE_DIRTY)
971 pte_val(pte) &= ~_PAGE_PROTECT;
975 static inline pte_t pte_mkclean(pte_t pte)
977 pte_val(pte) &= ~_PAGE_DIRTY;
978 pte_val(pte) |= _PAGE_PROTECT;
982 static inline pte_t pte_mkdirty(pte_t pte)
984 pte_val(pte) |= _PAGE_DIRTY;
985 if (pte_val(pte) & _PAGE_WRITE)
986 pte_val(pte) &= ~_PAGE_PROTECT;
990 static inline pte_t pte_mkold(pte_t pte)
992 pte_val(pte) &= ~_PAGE_YOUNG;
993 pte_val(pte) |= _PAGE_INVALID;
997 static inline pte_t pte_mkyoung(pte_t pte)
999 pte_val(pte) |= _PAGE_YOUNG;
1000 if (pte_val(pte) & _PAGE_READ)
1001 pte_val(pte) &= ~_PAGE_INVALID;
1005 static inline pte_t pte_mkspecial(pte_t pte)
1007 pte_val(pte) |= _PAGE_SPECIAL;
1011 #ifdef CONFIG_HUGETLB_PAGE
1012 static inline pte_t pte_mkhuge(pte_t pte)
1014 pte_val(pte) |= _PAGE_LARGE;
1019 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1021 unsigned long pto = (unsigned long) ptep;
1023 #ifndef CONFIG_64BIT
1024 /* pto in ESA mode must point to the start of the segment table */
1027 /* Invalidation + global TLB flush for the pte */
1030 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
1033 static inline void __ptep_ipte_local(unsigned long address, pte_t *ptep)
1035 unsigned long pto = (unsigned long) ptep;
1037 #ifndef CONFIG_64BIT
1038 /* pto in ESA mode must point to the start of the segment table */
1041 /* Invalidation + local TLB flush for the pte */
1043 " .insn rrf,0xb2210000,%2,%3,0,1"
1044 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
1047 static inline void ptep_flush_direct(struct mm_struct *mm,
1048 unsigned long address, pte_t *ptep)
1052 if (pte_val(*ptep) & _PAGE_INVALID)
1054 active = (mm == current->active_mm) ? 1 : 0;
1055 count = atomic_add_return(0x10000, &mm->context.attach_count);
1056 if (MACHINE_HAS_TLB_LC && (count & 0xffff) <= active &&
1057 cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1058 __ptep_ipte_local(address, ptep);
1060 __ptep_ipte(address, ptep);
1061 atomic_sub(0x10000, &mm->context.attach_count);
1064 static inline void ptep_flush_lazy(struct mm_struct *mm,
1065 unsigned long address, pte_t *ptep)
1069 if (pte_val(*ptep) & _PAGE_INVALID)
1071 active = (mm == current->active_mm) ? 1 : 0;
1072 count = atomic_add_return(0x10000, &mm->context.attach_count);
1073 if ((count & 0xffff) <= active) {
1074 pte_val(*ptep) |= _PAGE_INVALID;
1075 mm->context.flush_mm = 1;
1077 __ptep_ipte(address, ptep);
1078 atomic_sub(0x10000, &mm->context.attach_count);
1082 * Get (and clear) the user dirty bit for a pte.
1084 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
1092 if (!mm_has_pgste(mm))
1094 pgste = pgste_get_lock(ptep);
1095 dirty = !!(pgste_val(pgste) & PGSTE_UC_BIT);
1096 pgste_val(pgste) &= ~PGSTE_UC_BIT;
1098 if (dirty && (pte_val(pte) & _PAGE_PRESENT)) {
1099 pgste = pgste_ipte_notify(mm, addr, ptep, pgste);
1100 __ptep_ipte(addr, ptep);
1101 if (MACHINE_HAS_ESOP || !(pte_val(pte) & _PAGE_WRITE))
1102 pte_val(pte) |= _PAGE_PROTECT;
1104 pte_val(pte) |= _PAGE_INVALID;
1107 pgste_set_unlock(ptep, pgste);
1111 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1112 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1113 unsigned long addr, pte_t *ptep)
1119 if (mm_has_pgste(vma->vm_mm)) {
1120 pgste = pgste_get_lock(ptep);
1121 pgste = pgste_ipte_notify(vma->vm_mm, addr, ptep, pgste);
1124 oldpte = pte = *ptep;
1125 ptep_flush_direct(vma->vm_mm, addr, ptep);
1126 young = pte_young(pte);
1127 pte = pte_mkold(pte);
1129 if (mm_has_pgste(vma->vm_mm)) {
1130 pgste = pgste_update_all(&oldpte, pgste, vma->vm_mm);
1131 pgste = pgste_set_pte(ptep, pgste, pte);
1132 pgste_set_unlock(ptep, pgste);
1139 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1140 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
1141 unsigned long address, pte_t *ptep)
1143 return ptep_test_and_clear_young(vma, address, ptep);
1147 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1148 * both clear the TLB for the unmapped pte. The reason is that
1149 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1150 * to modify an active pte. The sequence is
1151 * 1) ptep_get_and_clear
1153 * 3) flush_tlb_range
1154 * On s390 the tlb needs to get flushed with the modification of the pte
1155 * if the pte is active. The only way how this can be implemented is to
1156 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1159 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1160 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
1161 unsigned long address, pte_t *ptep)
1166 if (mm_has_pgste(mm)) {
1167 pgste = pgste_get_lock(ptep);
1168 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1172 ptep_flush_lazy(mm, address, ptep);
1173 pte_val(*ptep) = _PAGE_INVALID;
1175 if (mm_has_pgste(mm)) {
1176 pgste = pgste_update_all(&pte, pgste, mm);
1177 pgste_set_unlock(ptep, pgste);
1182 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1183 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
1184 unsigned long address,
1190 if (mm_has_pgste(mm)) {
1191 pgste = pgste_get_lock(ptep);
1192 pgste_ipte_notify(mm, address, ptep, pgste);
1196 ptep_flush_lazy(mm, address, ptep);
1198 if (mm_has_pgste(mm)) {
1199 pgste = pgste_update_all(&pte, pgste, mm);
1200 pgste_set(ptep, pgste);
1205 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
1206 unsigned long address,
1207 pte_t *ptep, pte_t pte)
1211 if (mm_has_pgste(mm)) {
1212 pgste = pgste_get(ptep);
1213 pgste_set_key(ptep, pgste, pte, mm);
1214 pgste = pgste_set_pte(ptep, pgste, pte);
1215 pgste_set_unlock(ptep, pgste);
1220 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1221 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1222 unsigned long address, pte_t *ptep)
1227 if (mm_has_pgste(vma->vm_mm)) {
1228 pgste = pgste_get_lock(ptep);
1229 pgste = pgste_ipte_notify(vma->vm_mm, address, ptep, pgste);
1233 ptep_flush_direct(vma->vm_mm, address, ptep);
1234 pte_val(*ptep) = _PAGE_INVALID;
1236 if (mm_has_pgste(vma->vm_mm)) {
1237 if ((pgste_val(pgste) & _PGSTE_GPS_USAGE_MASK) ==
1238 _PGSTE_GPS_USAGE_UNUSED)
1239 pte_val(pte) |= _PAGE_UNUSED;
1240 pgste = pgste_update_all(&pte, pgste, vma->vm_mm);
1241 pgste_set_unlock(ptep, pgste);
1247 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1248 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1249 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1250 * cannot be accessed while the batched unmap is running. In this case
1251 * full==1 and a simple pte_clear is enough. See tlb.h.
1253 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1254 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1255 unsigned long address,
1256 pte_t *ptep, int full)
1261 if (!full && mm_has_pgste(mm)) {
1262 pgste = pgste_get_lock(ptep);
1263 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1268 ptep_flush_lazy(mm, address, ptep);
1269 pte_val(*ptep) = _PAGE_INVALID;
1271 if (!full && mm_has_pgste(mm)) {
1272 pgste = pgste_update_all(&pte, pgste, mm);
1273 pgste_set_unlock(ptep, pgste);
1278 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1279 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1280 unsigned long address, pte_t *ptep)
1285 if (pte_write(pte)) {
1286 if (mm_has_pgste(mm)) {
1287 pgste = pgste_get_lock(ptep);
1288 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1291 ptep_flush_lazy(mm, address, ptep);
1292 pte = pte_wrprotect(pte);
1294 if (mm_has_pgste(mm)) {
1295 pgste = pgste_set_pte(ptep, pgste, pte);
1296 pgste_set_unlock(ptep, pgste);
1303 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1304 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1305 unsigned long address, pte_t *ptep,
1306 pte_t entry, int dirty)
1310 if (pte_same(*ptep, entry))
1312 if (mm_has_pgste(vma->vm_mm)) {
1313 pgste = pgste_get_lock(ptep);
1314 pgste = pgste_ipte_notify(vma->vm_mm, address, ptep, pgste);
1317 ptep_flush_direct(vma->vm_mm, address, ptep);
1319 if (mm_has_pgste(vma->vm_mm)) {
1320 pgste_set_key(ptep, pgste, entry, vma->vm_mm);
1321 pgste = pgste_set_pte(ptep, pgste, entry);
1322 pgste_set_unlock(ptep, pgste);
1329 * Conversion functions: convert a page and protection to a page entry,
1330 * and a page entry and page directory to the page they refer to.
1332 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1335 pte_val(__pte) = physpage + pgprot_val(pgprot);
1336 return pte_mkyoung(__pte);
1339 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1341 unsigned long physpage = page_to_phys(page);
1342 pte_t __pte = mk_pte_phys(physpage, pgprot);
1344 if (pte_write(__pte) && PageDirty(page))
1345 __pte = pte_mkdirty(__pte);
1349 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1350 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1351 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1352 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1354 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1355 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1357 #ifndef CONFIG_64BIT
1359 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1360 #define pud_deref(pmd) ({ BUG(); 0UL; })
1361 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1363 #define pud_offset(pgd, address) ((pud_t *) pgd)
1364 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1366 #else /* CONFIG_64BIT */
1368 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1369 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1370 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1372 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1374 pud_t *pud = (pud_t *) pgd;
1375 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1376 pud = (pud_t *) pgd_deref(*pgd);
1377 return pud + pud_index(address);
1380 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1382 pmd_t *pmd = (pmd_t *) pud;
1383 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1384 pmd = (pmd_t *) pud_deref(*pud);
1385 return pmd + pmd_index(address);
1388 #endif /* CONFIG_64BIT */
1390 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1391 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1392 #define pte_page(x) pfn_to_page(pte_pfn(x))
1394 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1396 /* Find an entry in the lowest level page table.. */
1397 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1398 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1399 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1400 #define pte_unmap(pte) do { } while (0)
1402 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1403 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1406 * pgprot is PAGE_NONE, PAGE_READ, or PAGE_WRITE (see __Pxxx / __Sxxx)
1407 * Convert to segment table entry format.
1409 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1410 return pgprot_val(SEGMENT_NONE);
1411 if (pgprot_val(pgprot) == pgprot_val(PAGE_READ))
1412 return pgprot_val(SEGMENT_READ);
1413 return pgprot_val(SEGMENT_WRITE);
1416 static inline pmd_t pmd_wrprotect(pmd_t pmd)
1418 pmd_val(pmd) &= ~_SEGMENT_ENTRY_WRITE;
1419 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1423 static inline pmd_t pmd_mkwrite(pmd_t pmd)
1425 pmd_val(pmd) |= _SEGMENT_ENTRY_WRITE;
1426 if (pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1428 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1432 static inline pmd_t pmd_mkclean(pmd_t pmd)
1434 if (pmd_large(pmd)) {
1435 pmd_val(pmd) &= ~_SEGMENT_ENTRY_DIRTY;
1436 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1441 static inline pmd_t pmd_mkdirty(pmd_t pmd)
1443 if (pmd_large(pmd)) {
1444 pmd_val(pmd) |= _SEGMENT_ENTRY_DIRTY;
1445 if (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE)
1446 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1451 static inline pmd_t pmd_mkyoung(pmd_t pmd)
1453 if (pmd_large(pmd)) {
1454 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1455 if (pmd_val(pmd) & _SEGMENT_ENTRY_READ)
1456 pmd_val(pmd) &= ~_SEGMENT_ENTRY_INVALID;
1461 static inline pmd_t pmd_mkold(pmd_t pmd)
1463 if (pmd_large(pmd)) {
1464 pmd_val(pmd) &= ~_SEGMENT_ENTRY_YOUNG;
1465 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1470 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1472 if (pmd_large(pmd)) {
1473 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN_LARGE |
1474 _SEGMENT_ENTRY_DIRTY | _SEGMENT_ENTRY_YOUNG |
1475 _SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_SPLIT;
1476 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1477 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1478 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1479 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG))
1480 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1483 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN;
1484 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1488 static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1491 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1495 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1497 static inline void __pmdp_csp(pmd_t *pmdp)
1499 register unsigned long reg2 asm("2") = pmd_val(*pmdp);
1500 register unsigned long reg3 asm("3") = pmd_val(*pmdp) |
1501 _SEGMENT_ENTRY_INVALID;
1502 register unsigned long reg4 asm("4") = ((unsigned long) pmdp) + 5;
1507 : "d" (reg2), "d" (reg3), "d" (reg4), "m" (*pmdp) : "cc");
1510 static inline void __pmdp_idte(unsigned long address, pmd_t *pmdp)
1514 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1516 " .insn rrf,0xb98e0000,%2,%3,0,0"
1518 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1522 static inline void __pmdp_idte_local(unsigned long address, pmd_t *pmdp)
1526 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1528 " .insn rrf,0xb98e0000,%2,%3,0,1"
1530 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1534 static inline void pmdp_flush_direct(struct mm_struct *mm,
1535 unsigned long address, pmd_t *pmdp)
1539 if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
1541 if (!MACHINE_HAS_IDTE) {
1545 active = (mm == current->active_mm) ? 1 : 0;
1546 count = atomic_add_return(0x10000, &mm->context.attach_count);
1547 if (MACHINE_HAS_TLB_LC && (count & 0xffff) <= active &&
1548 cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1549 __pmdp_idte_local(address, pmdp);
1551 __pmdp_idte(address, pmdp);
1552 atomic_sub(0x10000, &mm->context.attach_count);
1555 static inline void pmdp_flush_lazy(struct mm_struct *mm,
1556 unsigned long address, pmd_t *pmdp)
1560 if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
1562 active = (mm == current->active_mm) ? 1 : 0;
1563 count = atomic_add_return(0x10000, &mm->context.attach_count);
1564 if ((count & 0xffff) <= active) {
1565 pmd_val(*pmdp) |= _SEGMENT_ENTRY_INVALID;
1566 mm->context.flush_mm = 1;
1567 } else if (MACHINE_HAS_IDTE)
1568 __pmdp_idte(address, pmdp);
1571 atomic_sub(0x10000, &mm->context.attach_count);
1574 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1576 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1577 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
1580 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1581 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
1583 static inline int pmd_trans_splitting(pmd_t pmd)
1585 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) &&
1586 (pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT);
1589 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1590 pmd_t *pmdp, pmd_t entry)
1595 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1597 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1598 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1599 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1603 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1604 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1605 unsigned long address, pmd_t *pmdp)
1610 pmdp_flush_direct(vma->vm_mm, address, pmdp);
1611 *pmdp = pmd_mkold(pmd);
1612 return pmd_young(pmd);
1615 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
1616 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
1617 unsigned long address, pmd_t *pmdp)
1621 pmdp_flush_direct(mm, address, pmdp);
1626 #define __HAVE_ARCH_PMDP_CLEAR_FLUSH
1627 static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
1628 unsigned long address, pmd_t *pmdp)
1630 return pmdp_get_and_clear(vma->vm_mm, address, pmdp);
1633 #define __HAVE_ARCH_PMDP_INVALIDATE
1634 static inline void pmdp_invalidate(struct vm_area_struct *vma,
1635 unsigned long address, pmd_t *pmdp)
1637 pmdp_flush_direct(vma->vm_mm, address, pmdp);
1640 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1641 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1642 unsigned long address, pmd_t *pmdp)
1646 if (pmd_write(pmd)) {
1647 pmdp_flush_direct(mm, address, pmdp);
1648 set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
1652 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1653 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1655 static inline int pmd_trans_huge(pmd_t pmd)
1657 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1660 static inline int has_transparent_hugepage(void)
1662 return MACHINE_HAS_HPAGE ? 1 : 0;
1664 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1667 * 31 bit swap entry format:
1668 * A page-table entry has some bits we have to treat in a special way.
1669 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1670 * exception will occur instead of a page translation exception. The
1671 * specifiation exception has the bad habit not to store necessary
1672 * information in the lowcore.
1673 * Bits 21, 22, 30 and 31 are used to indicate the page type.
1674 * A swap pte is indicated by bit pattern (pte & 0x603) == 0x402
1675 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1676 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1677 * plus 24 for the offset.
1678 * 0| offset |0110|o|type |00|
1679 * 0 0000000001111111111 2222 2 22222 33
1680 * 0 1234567890123456789 0123 4 56789 01
1682 * 64 bit swap entry format:
1683 * A page-table entry has some bits we have to treat in a special way.
1684 * Bits 52 and bit 55 have to be zero, otherwise an specification
1685 * exception will occur instead of a page translation exception. The
1686 * specifiation exception has the bad habit not to store necessary
1687 * information in the lowcore.
1688 * Bits 53, 54, 62 and 63 are used to indicate the page type.
1689 * A swap pte is indicated by bit pattern (pte & 0x603) == 0x402
1690 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1691 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1692 * plus 56 for the offset.
1693 * | offset |0110|o|type |00|
1694 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1695 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1697 #ifndef CONFIG_64BIT
1698 #define __SWP_OFFSET_MASK (~0UL >> 12)
1700 #define __SWP_OFFSET_MASK (~0UL >> 11)
1702 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1705 offset &= __SWP_OFFSET_MASK;
1706 pte_val(pte) = _PAGE_INVALID | _PAGE_TYPE | ((type & 0x1f) << 2) |
1707 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1711 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1712 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1713 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1715 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1716 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1718 #ifndef CONFIG_64BIT
1719 # define PTE_FILE_MAX_BITS 26
1720 #else /* CONFIG_64BIT */
1721 # define PTE_FILE_MAX_BITS 59
1722 #endif /* CONFIG_64BIT */
1724 #define pte_to_pgoff(__pte) \
1725 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1727 #define pgoff_to_pte(__off) \
1728 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1729 | _PAGE_INVALID | _PAGE_PROTECT })
1731 #endif /* !__ASSEMBLY__ */
1733 #define kern_addr_valid(addr) (1)
1735 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1736 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1737 extern int s390_enable_sie(void);
1738 extern void s390_enable_skey(void);
1741 * No page table caches to initialise
1743 static inline void pgtable_cache_init(void) { }
1744 static inline void check_pgt_cache(void) { }
1746 #include <asm-generic/pgtable.h>
1748 #endif /* _S390_PAGE_H */