3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Offsets in the user_regs_struct. They are used for the ptrace
12 * system call and in entry.S
16 #define PT_PSWMASK 0x00
17 #define PT_PSWADDR 0x04
50 #define PT_ORIGGPR2 0x88
53 * A nasty fact of life that the ptrace api
54 * only supports passing of longs.
56 #define PT_FPR0_HI 0x98
57 #define PT_FPR0_LO 0x9C
58 #define PT_FPR1_HI 0xA0
59 #define PT_FPR1_LO 0xA4
60 #define PT_FPR2_HI 0xA8
61 #define PT_FPR2_LO 0xAC
62 #define PT_FPR3_HI 0xB0
63 #define PT_FPR3_LO 0xB4
64 #define PT_FPR4_HI 0xB8
65 #define PT_FPR4_LO 0xBC
66 #define PT_FPR5_HI 0xC0
67 #define PT_FPR5_LO 0xC4
68 #define PT_FPR6_HI 0xC8
69 #define PT_FPR6_LO 0xCC
70 #define PT_FPR7_HI 0xD0
71 #define PT_FPR7_LO 0xD4
72 #define PT_FPR8_HI 0xD8
73 #define PT_FPR8_LO 0XDC
74 #define PT_FPR9_HI 0xE0
75 #define PT_FPR9_LO 0xE4
76 #define PT_FPR10_HI 0xE8
77 #define PT_FPR10_LO 0xEC
78 #define PT_FPR11_HI 0xF0
79 #define PT_FPR11_LO 0xF4
80 #define PT_FPR12_HI 0xF8
81 #define PT_FPR12_LO 0xFC
82 #define PT_FPR13_HI 0x100
83 #define PT_FPR13_LO 0x104
84 #define PT_FPR14_HI 0x108
85 #define PT_FPR14_LO 0x10C
86 #define PT_FPR15_HI 0x110
87 #define PT_FPR15_LO 0x114
89 #define PT_CR_10 0x11C
90 #define PT_CR_11 0x120
91 #define PT_IEEE_IP 0x13C
92 #define PT_LASTOFF PT_IEEE_IP
93 #define PT_ENDREGS 0x140-1
98 #define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */
100 #else /* __s390x__ */
102 #define PT_PSWMASK 0x00
103 #define PT_PSWADDR 0x08
114 #define PT_GPR10 0x60
115 #define PT_GPR11 0x68
116 #define PT_GPR12 0x70
117 #define PT_GPR13 0x78
118 #define PT_GPR14 0x80
119 #define PT_GPR15 0x88
130 #define PT_ACR10 0xB8
131 #define PT_ACR11 0xBC
132 #define PT_ACR12 0xC0
133 #define PT_ACR13 0xC4
134 #define PT_ACR14 0xC8
135 #define PT_ACR15 0xCC
136 #define PT_ORIGGPR2 0xD0
142 #define PT_FPR4 0x100
143 #define PT_FPR5 0x108
144 #define PT_FPR6 0x110
145 #define PT_FPR7 0x118
146 #define PT_FPR8 0x120
147 #define PT_FPR9 0x128
148 #define PT_FPR10 0x130
149 #define PT_FPR11 0x138
150 #define PT_FPR12 0x140
151 #define PT_FPR13 0x148
152 #define PT_FPR14 0x150
153 #define PT_FPR15 0x158
154 #define PT_CR_9 0x160
155 #define PT_CR_10 0x168
156 #define PT_CR_11 0x170
157 #define PT_IEEE_IP 0x1A8
158 #define PT_LASTOFF PT_IEEE_IP
159 #define PT_ENDREGS 0x1B0-1
164 #define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */
166 #endif /* __s390x__ */
173 #define NUM_CR_WORDS 3
177 #define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */
181 #define PTRACE_OLDSETOPTIONS 21
184 #include <linux/stddef.h>
185 #include <linux/types.h>
202 freg_t fprs[NUM_FPRS];
205 #define FPC_EXCEPTION_MASK 0xF8000000
206 #define FPC_FLAGS_MASK 0x00F80000
207 #define FPC_DXC_MASK 0x0000FF00
208 #define FPC_RM_MASK 0x00000003
209 #define FPC_VALID_MASK 0xF8F8FF03
211 /* this typedef defines how a Program Status Word looks like */
216 } __attribute__ ((aligned(8))) psw_t;
222 } __attribute__ ((aligned(8))) psw_compat_t;
226 #define PSW_MASK_PER 0x40000000UL
227 #define PSW_MASK_DAT 0x04000000UL
228 #define PSW_MASK_IO 0x02000000UL
229 #define PSW_MASK_EXT 0x01000000UL
230 #define PSW_MASK_KEY 0x00F00000UL
231 #define PSW_MASK_BASE 0x00080000UL /* always one */
232 #define PSW_MASK_MCHECK 0x00040000UL
233 #define PSW_MASK_WAIT 0x00020000UL
234 #define PSW_MASK_PSTATE 0x00010000UL
235 #define PSW_MASK_ASC 0x0000C000UL
236 #define PSW_MASK_CC 0x00003000UL
237 #define PSW_MASK_PM 0x00000F00UL
238 #define PSW_MASK_RI 0x00000000UL
239 #define PSW_MASK_EA 0x00000000UL
240 #define PSW_MASK_BA 0x00000000UL
242 #define PSW_MASK_USER 0x00003F00UL
244 #define PSW_ADDR_AMODE 0x80000000UL
245 #define PSW_ADDR_INSN 0x7FFFFFFFUL
247 #define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 20)
249 #define PSW_ASC_PRIMARY 0x00000000UL
250 #define PSW_ASC_ACCREG 0x00004000UL
251 #define PSW_ASC_SECONDARY 0x00008000UL
252 #define PSW_ASC_HOME 0x0000C000UL
254 #else /* __s390x__ */
256 #define PSW_MASK_PER 0x4000000000000000UL
257 #define PSW_MASK_DAT 0x0400000000000000UL
258 #define PSW_MASK_IO 0x0200000000000000UL
259 #define PSW_MASK_EXT 0x0100000000000000UL
260 #define PSW_MASK_BASE 0x0000000000000000UL
261 #define PSW_MASK_KEY 0x00F0000000000000UL
262 #define PSW_MASK_MCHECK 0x0004000000000000UL
263 #define PSW_MASK_WAIT 0x0002000000000000UL
264 #define PSW_MASK_PSTATE 0x0001000000000000UL
265 #define PSW_MASK_ASC 0x0000C00000000000UL
266 #define PSW_MASK_CC 0x0000300000000000UL
267 #define PSW_MASK_PM 0x00000F0000000000UL
268 #define PSW_MASK_RI 0x0000008000000000UL
269 #define PSW_MASK_EA 0x0000000100000000UL
270 #define PSW_MASK_BA 0x0000000080000000UL
272 #define PSW_MASK_USER 0x00003F8180000000UL
274 #define PSW_ADDR_AMODE 0x0000000000000000UL
275 #define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
277 #define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 52)
279 #define PSW_ASC_PRIMARY 0x0000000000000000UL
280 #define PSW_ASC_ACCREG 0x0000400000000000UL
281 #define PSW_ASC_SECONDARY 0x0000800000000000UL
282 #define PSW_ASC_HOME 0x0000C00000000000UL
284 #endif /* __s390x__ */
287 extern long psw_kernel_bits;
288 extern long psw_user_bits;
292 * The s390_regs structure is used to define the elf_gregset_t.
297 unsigned long gprs[NUM_GPRS];
298 unsigned int acrs[NUM_ACRS];
299 unsigned long orig_gpr2;
305 __u32 gprs[NUM_GPRS];
306 __u32 acrs[NUM_ACRS];
312 __u32 gprs_high[NUM_GPRS];
313 } s390_compat_regs_high;
318 * The pt_regs struct defines the way the registers are stored on
319 * the stack during a system call.
323 unsigned long args[1];
325 unsigned long gprs[NUM_GPRS];
326 unsigned long orig_gpr2;
327 unsigned int int_code;
328 unsigned long int_parm_long;
332 * Program event recording (PER) register set.
335 unsigned long control; /* PER control bits */
336 unsigned long start; /* PER starting address */
337 unsigned long end; /* PER ending address */
341 * PER event contains information about the cause of the last PER exception.
344 unsigned short cause; /* PER code, ATMID and AI */
345 unsigned long address; /* PER address */
346 unsigned char paid; /* PER access identification */
350 * Simplified per_info structure used to decode the ptrace user space ABI.
352 struct per_struct_kernel {
353 unsigned long cr9; /* PER control bits */
354 unsigned long cr10; /* PER starting address */
355 unsigned long cr11; /* PER ending address */
356 unsigned long bits; /* Obsolete software bits */
357 unsigned long starting_addr; /* User specified start address */
358 unsigned long ending_addr; /* User specified end address */
359 unsigned short perc_atmid; /* PER trap ATMID */
360 unsigned long address; /* PER trap instruction address */
361 unsigned char access_id; /* PER trap access identification */
364 #define PER_EVENT_MASK 0xEB000000UL
366 #define PER_EVENT_BRANCH 0x80000000UL
367 #define PER_EVENT_IFETCH 0x40000000UL
368 #define PER_EVENT_STORE 0x20000000UL
369 #define PER_EVENT_STORE_REAL 0x08000000UL
370 #define PER_EVENT_TRANSACTION_END 0x02000000UL
371 #define PER_EVENT_NULLIFICATION 0x01000000UL
373 #define PER_CONTROL_MASK 0x00e00000UL
375 #define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
376 #define PER_CONTROL_SUSPENSION 0x00400000UL
377 #define PER_CONTROL_ALTERATION 0x00200000UL
382 * Now for the user space program event recording (trace) definitions.
383 * The following structures are used only for the ptrace interface, don't
384 * touch or even look at it if you don't want to modify the user-space
385 * ptrace interface. In particular stay away from it for in-kernel PER.
389 unsigned long cr[NUM_CR_WORDS];
392 #define PER_EM_MASK 0xE8000000UL
398 #endif /* __s390x__ */
399 unsigned em_branching : 1;
400 unsigned em_instruction_fetch : 1;
402 * Switching on storage alteration automatically fixes
403 * the storage alteration event bit in the users std.
405 unsigned em_storage_alteration : 1;
406 unsigned em_gpr_alt_unused : 1;
407 unsigned em_store_real_address : 1;
409 unsigned branch_addr_ctl : 1;
411 unsigned storage_alt_space_ctl : 1;
413 unsigned long starting_addr;
414 unsigned long ending_addr;
419 unsigned short perc_atmid;
420 unsigned long address;
421 unsigned char access_id;
426 unsigned perc_branching : 1;
427 unsigned perc_instruction_fetch : 1;
428 unsigned perc_storage_alteration : 1;
429 unsigned perc_gpr_alt_unused : 1;
430 unsigned perc_store_real_address : 1;
432 unsigned atmid_psw_bit_31 : 1;
433 unsigned atmid_validity_bit : 1;
434 unsigned atmid_psw_bit_32 : 1;
435 unsigned atmid_psw_bit_5 : 1;
436 unsigned atmid_psw_bit_16 : 1;
437 unsigned atmid_psw_bit_17 : 1;
439 unsigned long address;
441 unsigned access_id : 4;
451 * Use these flags instead of setting em_instruction_fetch
452 * directly they are used so that single stepping can be
453 * switched on & off while not affecting other tracing
455 unsigned single_step : 1;
456 unsigned instruction_fetch : 1;
459 * These addresses are copied into cr10 & cr11 if single
460 * stepping is switched off
462 unsigned long starting_addr;
463 unsigned long ending_addr;
465 per_lowcore_words words;
466 per_lowcore_bits bits;
473 unsigned long kernel_addr;
474 unsigned long process_addr;
478 * S/390 specific non posix ptrace requests. I chose unusual values so
479 * they are unlikely to clash with future ptrace definitions.
481 #define PTRACE_PEEKUSR_AREA 0x5000
482 #define PTRACE_POKEUSR_AREA 0x5001
483 #define PTRACE_PEEKTEXT_AREA 0x5002
484 #define PTRACE_PEEKDATA_AREA 0x5003
485 #define PTRACE_POKETEXT_AREA 0x5004
486 #define PTRACE_POKEDATA_AREA 0x5005
487 #define PTRACE_GET_LAST_BREAK 0x5006
488 #define PTRACE_PEEK_SYSTEM_CALL 0x5007
489 #define PTRACE_POKE_SYSTEM_CALL 0x5008
490 #define PTRACE_ENABLE_TE 0x5009
491 #define PTRACE_DISABLE_TE 0x5010
494 * PT_PROT definition is loosely based on hppa bsd definition in
497 #define PTRACE_PROT 21
501 ptprot_set_access_watchpoint,
502 ptprot_set_write_watchpoint,
503 ptprot_disable_watchpoint
508 unsigned long lowaddr;
509 unsigned long hiaddr;
513 /* Sequence of bytes for breakpoint illegal instruction. */
514 #define S390_BREAKPOINT {0x0,0x1}
515 #define S390_BREAKPOINT_U16 ((__u16)0x0001)
516 #define S390_SYSCALL_OPCODE ((__u16)0x0a00)
517 #define S390_SYSCALL_SIZE 2
520 * The user_regs_struct defines the way the user registers are
521 * store on the stack for signal handling.
523 struct user_regs_struct
526 unsigned long gprs[NUM_GPRS];
527 unsigned int acrs[NUM_ACRS];
528 unsigned long orig_gpr2;
529 s390_fp_regs fp_regs;
531 * These per registers are in here so that gdb can modify them
532 * itself as there is no "official" ptrace interface for hardware
533 * watchpoints. This is the way intel does it.
536 unsigned long ieee_instruction_pointer; /* obsolete, always 0 */
541 * These are defined as per linux/ptrace.h, which see.
543 #define arch_has_single_step() (1)
545 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
546 #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
547 #define user_stack_pointer(regs)((regs)->gprs[15])
548 #define profile_pc(regs) instruction_pointer(regs)
550 static inline long regs_return_value(struct pt_regs *regs)
552 return regs->gprs[2];
555 int regs_query_register_offset(const char *name);
556 const char *regs_query_register_name(unsigned int offset);
557 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
558 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
560 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
562 return regs->gprs[15] & PSW_ADDR_INSN;
565 #endif /* __KERNEL__ */
566 #endif /* __ASSEMBLY__ */
568 #endif /* _S390_PTRACE_H */