2 * S390 low-level entry points.
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
23 #include <asm/vx-insn.h>
24 #include <asm/setup.h>
26 #include <asm/export.h>
29 __PT_R1 = __PT_GPRS + 8
30 __PT_R2 = __PT_GPRS + 16
31 __PT_R3 = __PT_GPRS + 24
32 __PT_R4 = __PT_GPRS + 32
33 __PT_R5 = __PT_GPRS + 40
34 __PT_R6 = __PT_GPRS + 48
35 __PT_R7 = __PT_GPRS + 56
36 __PT_R8 = __PT_GPRS + 64
37 __PT_R9 = __PT_GPRS + 72
38 __PT_R10 = __PT_GPRS + 80
39 __PT_R11 = __PT_GPRS + 88
40 __PT_R12 = __PT_GPRS + 96
41 __PT_R13 = __PT_GPRS + 104
42 __PT_R14 = __PT_GPRS + 112
43 __PT_R15 = __PT_GPRS + 120
45 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
46 STACK_SIZE = 1 << STACK_SHIFT
47 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
49 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
51 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
52 _TIF_SYSCALL_TRACEPOINT)
53 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
54 _PIF_WORK = (_PIF_PER_TRAP)
56 #define BASED(name) name-cleanup_critical(%r13)
59 #ifdef CONFIG_TRACE_IRQFLAGS
61 brasl %r14,trace_hardirqs_on_caller
66 #ifdef CONFIG_TRACE_IRQFLAGS
68 brasl %r14,trace_hardirqs_off_caller
72 .macro LOCKDEP_SYS_EXIT
74 tm __PT_PSW+1(%r11),0x01 # returning to user ?
76 brasl %r14,lockdep_sys_exit
80 .macro CHECK_STACK stacksize,savearea
81 #ifdef CONFIG_CHECK_STACK
82 tml %r15,\stacksize - CONFIG_STACK_GUARD
88 .macro SWITCH_ASYNC savearea,timer
89 tmhh %r8,0x0001 # interrupting from user ?
92 slg %r14,BASED(.Lcritical_start)
93 clg %r14,BASED(.Lcritical_length)
95 lghi %r11,\savearea # inside critical section, do cleanup
96 brasl %r14,cleanup_critical
97 tmhh %r8,0x0001 # retest problem state after cleanup
99 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
101 srag %r14,%r14,STACK_SHIFT
103 CHECK_STACK 1<<STACK_SHIFT,\savearea
104 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
107 UPDATE_VTIME %r14,%r15,\timer
108 2: lg %r15,__LC_ASYNC_STACK # load async stack
109 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
112 .macro UPDATE_VTIME w1,w2,enter_timer
113 lg \w1,__LC_EXIT_TIMER
114 lg \w2,__LC_LAST_UPDATE_TIMER
116 slg \w2,__LC_EXIT_TIMER
117 alg \w1,__LC_USER_TIMER
118 alg \w2,__LC_SYSTEM_TIMER
119 stg \w1,__LC_USER_TIMER
120 stg \w2,__LC_SYSTEM_TIMER
121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
124 .macro LAST_BREAK scratch
125 srag \scratch,%r10,23
127 stg %r10,__TI_last_break(%r12)
131 stg %r8,__LC_RETURN_PSW
132 ni __LC_RETURN_PSW,0xbf
137 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
138 .insn s,0xb27c0000,\savearea # store clock fast
140 .insn s,0xb2050000,\savearea # store clock
145 * The TSTMSK macro generates a test-under-mask instruction by
146 * calculating the memory offset for the specified mask value.
147 * Mask value can be any constant. The macro shifts the mask
148 * value to calculate the memory offset for the test-under-mask
151 .macro TSTMSK addr, mask, size=8, bytepos=0
152 .if (\bytepos < \size) && (\mask >> 8)
154 .error "Mask exceeds byte boundary"
156 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
160 .error "Mask must not be zero"
162 off = \size - \bytepos - 1
166 .section .kprobes.text, "ax"
169 * This nop exists only in order to avoid that __switch_to starts at
170 * the beginning of the kprobes text section. In that case we would
171 * have several symbols at the same address. E.g. objdump would take
172 * an arbitrary symbol name when disassembling this code.
173 * With the added nop in between the __switch_to symbol is unique
179 * Scheduler resume function, called by switch_to
180 * gpr2 = (task_struct *) prev
181 * gpr3 = (task_struct *) next
186 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
188 aghi %r1,__TASK_thread # thread_struct of prev task
189 lg %r5,__TASK_thread_info(%r3) # get thread_info of next
190 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
192 aghi %r1,__TASK_thread # thread_struct of next task
194 aghi %r15,STACK_INIT # end of kernel stack of next
195 stg %r3,__LC_CURRENT # store task struct of next
196 stg %r5,__LC_THREAD_INFO # store thread info of next
197 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
198 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
199 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
200 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
201 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
202 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
203 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
205 .insn s,0xb2800000,__LC_LPP # set program parameter
210 #if IS_ENABLED(CONFIG_KVM)
212 * sie64a calling convention:
213 * %r2 pointer to sie control block
214 * %r3 guest register save area
217 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
218 stg %r2,__SF_EMPTY(%r15) # save control block pointer
219 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
220 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
221 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
222 jno .Lsie_load_guest_gprs
223 brasl %r14,load_fpu_regs # load guest fp/vx regs
224 .Lsie_load_guest_gprs:
225 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
226 lg %r14,__LC_GMAP # get gmap pointer
229 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
231 lg %r14,__SF_EMPTY(%r15) # get control block pointer
232 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
233 tm __SIE_PROG20+3(%r14),3 # last exit...
235 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
236 jo .Lsie_skip # exit if fp/vx regs changed
239 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
240 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
242 # some program checks are suppressing. C code (e.g. do_protection_exception)
243 # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
244 # instructions between sie64a and .Lsie_done should not cause program
245 # interrupts. So lets use a nop (47 00 00 00) as a landing pad.
246 # See also .Lcleanup_sie
251 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
252 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
253 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
254 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
258 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
261 EX_TABLE(.Lrewind_pad,.Lsie_fault)
262 EX_TABLE(sie_exit,.Lsie_fault)
263 EXPORT_SYMBOL(sie64a)
264 EXPORT_SYMBOL(sie_exit)
268 * SVC interrupt handler routine. System calls are synchronous events and
269 * are executed with interrupts enabled.
273 stpt __LC_SYNC_ENTER_TIMER
275 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
276 lg %r10,__LC_LAST_BREAK
277 lg %r12,__LC_THREAD_INFO
278 lghi %r14,_PIF_SYSCALL
280 lg %r15,__LC_KERNEL_STACK
281 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
284 UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
285 stmg %r0,%r7,__PT_R0(%r11)
286 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
287 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
288 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
289 stg %r14,__PT_FLAGS(%r11)
291 lg %r10,__TI_sysc_table(%r12) # address of system call table
292 llgh %r8,__PT_INT_CODE+2(%r11)
293 slag %r8,%r8,2 # shift and test for svc 0
295 # svc 0: system call number in %r1
296 llgfr %r1,%r1 # clear high word in r1
299 sth %r1,__PT_INT_CODE+2(%r11)
302 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
303 stg %r2,__PT_ORIG_GPR2(%r11)
304 stg %r7,STACK_FRAME_OVERHEAD(%r15)
305 lgf %r9,0(%r8,%r10) # get system call add.
306 TSTMSK __TI_flags(%r12),_TIF_TRACE
308 basr %r14,%r9 # call sys_xxxx
309 stg %r2,__PT_R2(%r11) # store return value
314 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
316 TSTMSK __TI_flags(%r12),_TIF_WORK
317 jnz .Lsysc_work # check for work
318 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
321 lg %r14,__LC_VDSO_PER_CPU
322 lmg %r0,%r10,__PT_R0(%r11)
323 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
325 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
326 lmg %r11,%r15,__PT_R11(%r11)
327 lpswe __LC_RETURN_PSW
331 # One of the work bits is on. Find out which one.
334 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
335 jo .Lsysc_mcck_pending
336 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
338 #ifdef CONFIG_UPROBES
339 TSTMSK __TI_flags(%r12),_TIF_UPROBE
340 jo .Lsysc_uprobe_notify
342 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
344 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
346 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
347 jo .Lsysc_notify_resume
348 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
350 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
352 j .Lsysc_return # beware of critical section cleanup
355 # _TIF_NEED_RESCHED is set, call schedule
358 larl %r14,.Lsysc_return
362 # _CIF_MCCK_PENDING is set, call handler
365 larl %r14,.Lsysc_return
366 jg s390_handle_mcck # TIF bit will be cleared by handler
369 # _CIF_ASCE is set, load user space asce
372 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
373 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
377 # CIF_FPU is set, restore floating-point controls and floating-point registers.
380 larl %r14,.Lsysc_return
384 # _TIF_SIGPENDING is set, call do_signal
387 lgr %r2,%r11 # pass pointer to pt_regs
389 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
391 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
392 lg %r10,__TI_sysc_table(%r12) # address of system call table
393 lghi %r8,0 # svc 0 returns -ENOSYS
394 llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number
396 jnl .Lsysc_nr_ok # invalid svc number -> do svc 0
398 j .Lsysc_nr_ok # restart svc
401 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
403 .Lsysc_notify_resume:
404 lgr %r2,%r11 # pass pointer to pt_regs
405 larl %r14,.Lsysc_return
409 # _TIF_UPROBE is set, call uprobe_notify_resume
411 #ifdef CONFIG_UPROBES
412 .Lsysc_uprobe_notify:
413 lgr %r2,%r11 # pass pointer to pt_regs
414 larl %r14,.Lsysc_return
415 jg uprobe_notify_resume
419 # _PIF_PER_TRAP is set, call do_per_trap
422 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
423 lgr %r2,%r11 # pass pointer to pt_regs
424 larl %r14,.Lsysc_return
428 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
429 # and after the system call
432 lgr %r2,%r11 # pass pointer to pt_regs
434 llgh %r0,__PT_INT_CODE+2(%r11)
435 stg %r0,__PT_R2(%r11)
436 brasl %r14,do_syscall_trace_enter
443 lmg %r3,%r7,__PT_R3(%r11)
444 stg %r7,STACK_FRAME_OVERHEAD(%r15)
445 lg %r2,__PT_ORIG_GPR2(%r11)
446 basr %r14,%r9 # call sys_xxx
447 stg %r2,__PT_R2(%r11) # store return value
449 TSTMSK __TI_flags(%r12),_TIF_TRACE
451 lgr %r2,%r11 # pass pointer to pt_regs
452 larl %r14,.Lsysc_return
453 jg do_syscall_trace_exit
456 # a new process exits the kernel with ret_from_fork
459 la %r11,STACK_FRAME_OVERHEAD(%r15)
460 lg %r12,__LC_THREAD_INFO
461 brasl %r14,schedule_tail
463 ssm __LC_SVC_NEW_PSW # reenable interrupts
464 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
466 # it's a kernel thread
467 lmg %r9,%r10,__PT_R9(%r11) # load gprs
468 ENTRY(kernel_thread_starter)
474 * Program check handler routine
477 ENTRY(pgm_check_handler)
478 stpt __LC_SYNC_ENTER_TIMER
479 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
480 lg %r10,__LC_LAST_BREAK
481 lg %r12,__LC_THREAD_INFO
482 larl %r13,cleanup_critical
483 lmg %r8,%r9,__LC_PGM_OLD_PSW
484 tmhh %r8,0x0001 # test problem state bit
485 jnz 2f # -> fault in user space
486 #if IS_ENABLED(CONFIG_KVM)
487 # cleanup critical section for sie64a
489 slg %r14,BASED(.Lsie_critical_start)
490 clg %r14,BASED(.Lsie_critical_length)
492 brasl %r14,.Lcleanup_sie
494 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
495 jnz 1f # -> enabled, can't be a double fault
496 tm __LC_PGM_ILC+3,0x80 # check for per exception
497 jnz .Lpgm_svcper # -> single stepped svc
498 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
499 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
502 UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
503 lg %r15,__LC_KERNEL_STACK
504 lg %r14,__TI_task(%r12)
505 aghi %r14,__TASK_thread # pointer to thread_struct
506 lghi %r13,__LC_PGM_TDB
507 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
509 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
510 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
511 stmg %r0,%r7,__PT_R0(%r11)
512 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
513 stmg %r8,%r9,__PT_PSW(%r11)
514 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
515 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
516 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
517 stg %r10,__PT_ARGS(%r11)
518 tm __LC_PGM_ILC+3,0x80 # check for per exception
520 tmhh %r8,0x0001 # kernel per event ?
522 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
523 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
524 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
525 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
527 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
528 larl %r1,pgm_check_table
529 llgh %r10,__PT_INT_CODE+2(%r11)
533 lgf %r1,0(%r10,%r1) # load address of handler routine
534 lgr %r2,%r11 # pass pointer to pt_regs
535 basr %r14,%r1 # branch to interrupt-handler
538 tm __PT_PSW+1(%r11),0x01 # returning to user ?
543 # PER event in supervisor state, must be kprobes
547 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
548 lgr %r2,%r11 # pass pointer to pt_regs
549 brasl %r14,do_per_trap
553 # single stepped system call
556 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
558 stg %r14,__LC_RETURN_PSW+8
559 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
560 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
563 * IO interrupt handler routine
565 ENTRY(io_int_handler)
567 stpt __LC_ASYNC_ENTER_TIMER
568 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
569 lg %r10,__LC_LAST_BREAK
570 lg %r12,__LC_THREAD_INFO
571 larl %r13,cleanup_critical
572 lmg %r8,%r9,__LC_IO_OLD_PSW
573 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
574 stmg %r0,%r7,__PT_R0(%r11)
575 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
576 stmg %r8,%r9,__PT_PSW(%r11)
577 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
578 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
579 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
582 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
584 lgr %r2,%r11 # pass pointer to pt_regs
585 lghi %r3,IO_INTERRUPT
586 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
588 lghi %r3,THIN_INTERRUPT
591 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
595 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
601 TSTMSK __TI_flags(%r12),_TIF_WORK
602 jnz .Lio_work # there is work to do (signals etc.)
603 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
606 lg %r14,__LC_VDSO_PER_CPU
607 lmg %r0,%r10,__PT_R0(%r11)
608 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
610 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
611 lmg %r11,%r15,__PT_R11(%r11)
612 lpswe __LC_RETURN_PSW
616 # There is work todo, find out in which context we have been interrupted:
617 # 1) if we return to user space we can do all _TIF_WORK work
618 # 2) if we return to kernel code and kvm is enabled check if we need to
619 # modify the psw to leave SIE
620 # 3) if we return to kernel code and preemptive scheduling is enabled check
621 # the preemption counter and if it is zero call preempt_schedule_irq
622 # Before any work can be done, a switch to the kernel stack is required.
625 tm __PT_PSW+1(%r11),0x01 # returning to user ?
626 jo .Lio_work_user # yes -> do resched & signal
627 #ifdef CONFIG_PREEMPT
628 # check for preemptive scheduling
629 icm %r0,15,__TI_precount(%r12)
630 jnz .Lio_restore # preemption is disabled
631 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
633 # switch to kernel stack
634 lg %r1,__PT_R15(%r11)
635 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
636 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
637 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
638 la %r11,STACK_FRAME_OVERHEAD(%r1)
640 # TRACE_IRQS_ON already done at .Lio_return, call
641 # TRACE_IRQS_OFF to keep things symmetrical
643 brasl %r14,preempt_schedule_irq
650 # Need to do work before returning to userspace, switch to kernel stack
653 lg %r1,__LC_KERNEL_STACK
654 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
655 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
656 la %r11,STACK_FRAME_OVERHEAD(%r1)
660 # One of the work bits is on. Find out which one.
663 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
665 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
667 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
669 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
670 jo .Lio_notify_resume
671 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
673 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
675 j .Lio_return # beware of critical section cleanup
678 # _CIF_MCCK_PENDING is set, call handler
681 # TRACE_IRQS_ON already done at .Lio_return
682 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
687 # _CIF_ASCE is set, load user space asce
690 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
691 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
695 # CIF_FPU is set, restore floating-point controls and floating-point registers.
698 larl %r14,.Lio_return
702 # _TIF_NEED_RESCHED is set, call schedule
705 # TRACE_IRQS_ON already done at .Lio_return
706 ssm __LC_SVC_NEW_PSW # reenable interrupts
707 brasl %r14,schedule # call scheduler
708 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
713 # _TIF_SIGPENDING or is set, call do_signal
716 # TRACE_IRQS_ON already done at .Lio_return
717 ssm __LC_SVC_NEW_PSW # reenable interrupts
718 lgr %r2,%r11 # pass pointer to pt_regs
720 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
725 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
728 # TRACE_IRQS_ON already done at .Lio_return
729 ssm __LC_SVC_NEW_PSW # reenable interrupts
730 lgr %r2,%r11 # pass pointer to pt_regs
731 brasl %r14,do_notify_resume
732 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
737 * External interrupt handler routine
739 ENTRY(ext_int_handler)
741 stpt __LC_ASYNC_ENTER_TIMER
742 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
743 lg %r10,__LC_LAST_BREAK
744 lg %r12,__LC_THREAD_INFO
745 larl %r13,cleanup_critical
746 lmg %r8,%r9,__LC_EXT_OLD_PSW
747 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
748 stmg %r0,%r7,__PT_R0(%r11)
749 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
750 stmg %r8,%r9,__PT_PSW(%r11)
751 lghi %r1,__LC_EXT_PARAMS2
752 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
753 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
754 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
755 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
756 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
759 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
760 lgr %r2,%r11 # pass pointer to pt_regs
761 lghi %r3,EXT_INTERRUPT
766 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
769 stg %r3,__SF_EMPTY(%r15)
770 larl %r1,.Lpsw_idle_lpsw+4
771 stg %r1,__SF_EMPTY+8(%r15)
773 larl %r1,smp_cpu_mtid
777 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
780 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
781 STCK __CLOCK_IDLE_ENTER(%r2)
782 stpt __TIMER_IDLE_ENTER(%r2)
784 lpswe __SF_EMPTY(%r15)
789 * Store floating-point controls and floating-point or vector register
790 * depending whether the vector facility is available. A critical section
791 * cleanup assures that the registers are stored even if interrupted for
792 * some other work. The CIF_FPU flag is set to trigger a lazy restore
793 * of the register contents at return from io or a system call.
797 aghi %r2,__TASK_thread
798 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
800 stfpc __THREAD_FPU_fpc(%r2)
801 .Lsave_fpu_regs_fpc_end:
802 lg %r3,__THREAD_FPU_regs(%r2)
803 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
804 jz .Lsave_fpu_regs_fp # no -> store FP regs
805 .Lsave_fpu_regs_vx_low:
806 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
807 .Lsave_fpu_regs_vx_high:
808 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
809 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
827 .Lsave_fpu_regs_done:
828 oi __LC_CPU_FLAGS+7,_CIF_FPU
831 #if IS_ENABLED(CONFIG_KVM)
832 EXPORT_SYMBOL(save_fpu_regs)
836 * Load floating-point controls and floating-point or vector registers.
837 * A critical section cleanup assures that the register contents are
838 * loaded even if interrupted for some other work.
840 * There are special calling conventions to fit into sysc and io return work:
841 * %r15: <kernel stack>
842 * The function requires:
847 aghi %r4,__TASK_thread
848 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
850 lfpc __THREAD_FPU_fpc(%r4)
851 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
852 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
853 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
856 .Lload_fpu_regs_vx_high:
857 VLM %v16,%v31,256,%r4
858 j .Lload_fpu_regs_done
876 .Lload_fpu_regs_done:
877 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
884 * Machine check handler routines
886 ENTRY(mcck_int_handler)
888 la %r1,4095 # revalidate r1
889 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
890 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
891 lg %r10,__LC_LAST_BREAK
892 lg %r12,__LC_THREAD_INFO
893 larl %r13,cleanup_critical
894 lmg %r8,%r9,__LC_MCK_OLD_PSW
895 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
896 jo .Lmcck_panic # yes -> rest of mcck code invalid
897 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
898 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
899 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
901 la %r14,__LC_SYNC_ENTER_TIMER
902 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
904 la %r14,__LC_ASYNC_ENTER_TIMER
905 0: clc 0(8,%r14),__LC_EXIT_TIMER
907 la %r14,__LC_EXIT_TIMER
908 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
910 la %r14,__LC_LAST_UPDATE_TIMER
912 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
913 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
914 jno .Lmcck_panic # no -> skip cleanup critical
915 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
917 lghi %r14,__LC_GPREGS_SAVE_AREA+64
918 stmg %r0,%r7,__PT_R0(%r11)
919 mvc __PT_R8(64,%r11),0(%r14)
920 stmg %r8,%r9,__PT_PSW(%r11)
921 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
922 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
923 lgr %r2,%r11 # pass pointer to pt_regs
924 brasl %r14,s390_do_machine_check
925 tm __PT_PSW+1(%r11),0x01 # returning to user ?
927 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
928 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
929 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
930 la %r11,STACK_FRAME_OVERHEAD(%r1)
932 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
933 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
936 brasl %r14,s390_handle_mcck
939 lg %r14,__LC_VDSO_PER_CPU
940 lmg %r0,%r10,__PT_R0(%r11)
941 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
942 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
945 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
946 0: lmg %r11,%r15,__PT_R11(%r11)
947 lpswe __LC_RETURN_MCCK_PSW
950 lg %r15,__LC_PANIC_STACK
951 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
955 # PSW restart interrupt handler
957 ENTRY(restart_int_handler)
958 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
960 .insn s,0xb2800000,__LC_LPP
961 0: stg %r15,__LC_SAVE_AREA_RESTART
962 lg %r15,__LC_RESTART_STACK
963 aghi %r15,-__PT_SIZE # create pt_regs on stack
964 xc 0(__PT_SIZE,%r15),0(%r15)
965 stmg %r0,%r14,__PT_R0(%r15)
966 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
967 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
968 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
969 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
970 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
971 lg %r2,__LC_RESTART_DATA
972 lg %r3,__LC_RESTART_SOURCE
973 ltgr %r3,%r3 # test source cpu address
974 jm 1f # negative -> skip source stop
975 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
976 brc 10,0b # wait for status stored
977 1: basr %r14,%r1 # call function
978 stap __SF_EMPTY(%r15) # store cpu address
979 llgh %r3,__SF_EMPTY(%r15)
980 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
984 .section .kprobes.text, "ax"
986 #ifdef CONFIG_CHECK_STACK
988 * The synchronous or the asynchronous stack overflowed. We are dead.
989 * No need to properly save the registers, we are going to panic anyway.
990 * Setup a pt_regs so that show_trace can provide a good call trace.
993 lg %r15,__LC_PANIC_STACK # change to panic stack
994 la %r11,STACK_FRAME_OVERHEAD(%r15)
995 stmg %r0,%r7,__PT_R0(%r11)
996 stmg %r8,%r9,__PT_PSW(%r11)
997 mvc __PT_R8(64,%r11),0(%r14)
998 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
999 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1000 lgr %r2,%r11 # pass pointer to pt_regs
1001 jg kernel_stack_overflow
1005 #if IS_ENABLED(CONFIG_KVM)
1006 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1008 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1011 clg %r9,BASED(.Lcleanup_table) # system_call
1013 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1014 jl .Lcleanup_system_call
1015 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1017 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1018 jl .Lcleanup_sysc_tif
1019 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1020 jl .Lcleanup_sysc_restore
1021 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1023 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1025 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1026 jl .Lcleanup_io_restore
1027 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1029 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1031 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1033 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1034 jl .Lcleanup_save_fpu_regs
1035 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1037 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1038 jl .Lcleanup_load_fpu_regs
1046 .quad .Lsysc_restore
1052 .quad .Lpsw_idle_end
1054 .quad .Lsave_fpu_regs_end
1056 .quad .Lload_fpu_regs_end
1058 #if IS_ENABLED(CONFIG_KVM)
1059 .Lcleanup_table_sie:
1064 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1065 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1066 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1067 larl %r9,sie_exit # skip forward to sie_exit
1071 .Lcleanup_system_call:
1072 # check if stpt has been executed
1073 clg %r9,BASED(.Lcleanup_system_call_insn)
1075 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1076 cghi %r11,__LC_SAVE_AREA_ASYNC
1078 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1079 0: # check if stmg has been executed
1080 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1082 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1083 0: # check if base register setup + TIF bit load has been done
1084 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1086 # set up saved registers r10 and r12
1087 stg %r10,16(%r11) # r10 last break
1088 stg %r12,32(%r11) # r12 thread-info pointer
1089 0: # check if the user time update has been done
1090 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1092 lg %r15,__LC_EXIT_TIMER
1093 slg %r15,__LC_SYNC_ENTER_TIMER
1094 alg %r15,__LC_USER_TIMER
1095 stg %r15,__LC_USER_TIMER
1096 0: # check if the system time update has been done
1097 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1099 lg %r15,__LC_LAST_UPDATE_TIMER
1100 slg %r15,__LC_EXIT_TIMER
1101 alg %r15,__LC_SYSTEM_TIMER
1102 stg %r15,__LC_SYSTEM_TIMER
1103 0: # update accounting time stamp
1104 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1109 mvc __TI_last_break(8,%r12),16(%r11)
1110 0: # set up saved register r11
1111 lg %r15,__LC_KERNEL_STACK
1112 la %r9,STACK_FRAME_OVERHEAD(%r15)
1113 stg %r9,24(%r11) # r11 pt_regs pointer
1115 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1116 stmg %r0,%r7,__PT_R0(%r9)
1117 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1118 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1119 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1120 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1121 # setup saved register r15
1122 stg %r15,56(%r11) # r15 stack pointer
1123 # set new psw address and exit
1124 larl %r9,.Lsysc_do_svc
1126 .Lcleanup_system_call_insn:
1130 .quad .Lsysc_vtime+36
1131 .quad .Lsysc_vtime+42
1137 .Lcleanup_sysc_restore:
1138 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1140 lg %r9,24(%r11) # get saved pointer to pt_regs
1141 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1142 mvc 0(64,%r11),__PT_R8(%r9)
1143 lmg %r0,%r7,__PT_R0(%r9)
1144 0: lmg %r8,%r9,__LC_RETURN_PSW
1146 .Lcleanup_sysc_restore_insn:
1147 .quad .Lsysc_done - 4
1153 .Lcleanup_io_restore:
1154 clg %r9,BASED(.Lcleanup_io_restore_insn)
1156 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1157 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1158 mvc 0(64,%r11),__PT_R8(%r9)
1159 lmg %r0,%r7,__PT_R0(%r9)
1160 0: lmg %r8,%r9,__LC_RETURN_PSW
1162 .Lcleanup_io_restore_insn:
1166 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1167 # copy interrupt clock & cpu timer
1168 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1169 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1170 cghi %r11,__LC_SAVE_AREA_ASYNC
1172 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1173 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1174 0: # check if stck & stpt have been executed
1175 clg %r9,BASED(.Lcleanup_idle_insn)
1177 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1178 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1179 1: # calculate idle cycles
1181 clg %r9,BASED(.Lcleanup_idle_insn)
1183 larl %r1,smp_cpu_mtid
1187 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1189 ag %r3,__LC_PERCPU_OFFSET
1190 la %r4,__SF_EMPTY+16(%r15)
1199 3: # account system time going idle
1200 lg %r9,__LC_STEAL_TIMER
1201 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1202 slg %r9,__LC_LAST_UPDATE_CLOCK
1203 stg %r9,__LC_STEAL_TIMER
1204 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1205 lg %r9,__LC_SYSTEM_TIMER
1206 alg %r9,__LC_LAST_UPDATE_TIMER
1207 slg %r9,__TIMER_IDLE_ENTER(%r2)
1208 stg %r9,__LC_SYSTEM_TIMER
1209 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1210 # prepare return psw
1211 nihh %r8,0xfcfd # clear irq & wait state bits
1212 lg %r9,48(%r11) # return from psw_idle
1214 .Lcleanup_idle_insn:
1215 .quad .Lpsw_idle_lpsw
1217 .Lcleanup_save_fpu_regs:
1218 larl %r9,save_fpu_regs
1221 .Lcleanup_load_fpu_regs:
1222 larl %r9,load_fpu_regs
1230 .quad .L__critical_start
1232 .quad .L__critical_end - .L__critical_start
1233 #if IS_ENABLED(CONFIG_KVM)
1234 .Lsie_critical_start:
1236 .Lsie_critical_length:
1237 .quad .Lsie_done - .Lsie_gmap
1240 .section .rodata, "a"
1241 #define SYSCALL(esame,emu) .long esame
1242 .globl sys_call_table
1244 #include "syscalls.S"
1247 #ifdef CONFIG_COMPAT
1249 #define SYSCALL(esame,emu) .long emu
1250 .globl sys_call_table_emu
1252 #include "syscalls.S"