2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <linux/err.h>
40 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
41 #include <linux/elf-em.h>
42 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
43 #define __AUDIT_ARCH_64BIT 0x80000000
44 #define __AUDIT_ARCH_LE 0x40000000
47 .section .entry.text, "ax"
49 #ifdef CONFIG_PARAVIRT
50 ENTRY(native_usergs_sysret64)
53 ENDPROC(native_usergs_sysret64)
54 #endif /* CONFIG_PARAVIRT */
56 .macro TRACE_IRQS_IRETQ
57 #ifdef CONFIG_TRACE_IRQFLAGS
58 bt $9, EFLAGS(%rsp) /* interrupts off? */
66 * When dynamic function tracer is enabled it will add a breakpoint
67 * to all locations that it is about to modify, sync CPUs, update
68 * all the code, sync CPUs, then remove the breakpoints. In this time
69 * if lockdep is enabled, it might jump back into the debug handler
70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
73 * make sure the stack pointer does not get reset back to the top
74 * of the debug stack, and instead just reuses the current stack.
76 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
78 .macro TRACE_IRQS_OFF_DEBUG
79 call debug_stack_set_zero
81 call debug_stack_reset
84 .macro TRACE_IRQS_ON_DEBUG
85 call debug_stack_set_zero
87 call debug_stack_reset
90 .macro TRACE_IRQS_IRETQ_DEBUG
91 bt $9, EFLAGS(%rsp) /* interrupts off? */
98 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
99 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
100 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
106 * This is the only entry point used for 64-bit system calls. The
107 * hardware interface is reasonably well designed and the register to
108 * argument mapping Linux uses fits well with the registers that are
109 * available when SYSCALL is used.
111 * SYSCALL instructions can be found inlined in libc implementations as
112 * well as some other programs and libraries. There are also a handful
113 * of SYSCALL instructions in the vDSO used, for example, as a
114 * clock_gettimeofday fallback.
116 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
117 * then loads new ss, cs, and rip from previously programmed MSRs.
118 * rflags gets masked by a value from another MSR (so CLD and CLAC
119 * are not needed). SYSCALL does not save anything on the stack
120 * and does not change rsp.
122 * Registers on entry:
123 * rax system call number
125 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
129 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
132 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
134 * Only called from user space.
136 * When user can change pt_regs->foo always force IRET. That is because
137 * it deals with uncanonical addresses better. SYSRET has trouble
138 * with them due to bugs in both AMD and Intel CPUs.
141 ENTRY(entry_SYSCALL_64)
143 * Interrupts are off on entry.
144 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
145 * it is too small to ever cause noticeable irq latency.
149 * A hypervisor implementation might want to use a label
150 * after the swapgs, so that it can do the swapgs
151 * for the guest and jump here on syscall.
153 GLOBAL(entry_SYSCALL_64_after_swapgs)
155 movq %rsp, PER_CPU_VAR(rsp_scratch)
156 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
160 /* Construct struct pt_regs on stack */
161 pushq $__USER_DS /* pt_regs->ss */
162 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
163 pushq %r11 /* pt_regs->flags */
164 pushq $__USER_CS /* pt_regs->cs */
165 pushq %rcx /* pt_regs->ip */
166 pushq %rax /* pt_regs->orig_ax */
167 pushq %rdi /* pt_regs->di */
168 pushq %rsi /* pt_regs->si */
169 pushq %rdx /* pt_regs->dx */
170 pushq %rcx /* pt_regs->cx */
171 pushq $-ENOSYS /* pt_regs->ax */
172 pushq %r8 /* pt_regs->r8 */
173 pushq %r9 /* pt_regs->r9 */
174 pushq %r10 /* pt_regs->r10 */
175 pushq %r11 /* pt_regs->r11 */
176 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
179 * If we need to do entry work or if we guess we'll need to do
180 * exit work, go straight to the slow path.
182 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
183 jnz entry_SYSCALL64_slow_path
185 entry_SYSCALL_64_fastpath:
187 * Easy case: enable interrupts and issue the syscall. If the syscall
188 * needs pt_regs, we'll call a stub that disables interrupts again
189 * and jumps to the slow path.
192 ENABLE_INTERRUPTS(CLBR_NONE)
193 #if __SYSCALL_MASK == ~0
194 cmpq $__NR_syscall_max, %rax
196 andl $__SYSCALL_MASK, %eax
197 cmpl $__NR_syscall_max, %eax
199 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
203 * This call instruction is handled specially in stub_ptregs_64.
204 * It might end up jumping to the slow path. If it jumps, RAX
205 * and all argument registers are clobbered.
207 call *sys_call_table(, %rax, 8)
208 .Lentry_SYSCALL_64_after_fastpath_call:
214 * If we get here, then we know that pt_regs is clean for SYSRET64.
215 * If we see that no exit work is required (which we are required
216 * to check with IRQs off), then we can go straight to SYSRET64.
218 DISABLE_INTERRUPTS(CLBR_NONE)
220 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
224 TRACE_IRQS_ON /* user mode is traced as IRQs on */
226 movq EFLAGS(%rsp), %r11
227 RESTORE_C_REGS_EXCEPT_RCX_R11
233 * The fast path looked good when we started, but something changed
234 * along the way and we need to switch to the slow path. Calling
235 * raise(3) will trigger this, for example. IRQs are off.
238 ENABLE_INTERRUPTS(CLBR_NONE)
241 call syscall_return_slowpath /* returns with IRQs disabled */
242 jmp return_from_SYSCALL_64
244 entry_SYSCALL64_slow_path:
248 call do_syscall_64 /* returns with IRQs disabled */
250 return_from_SYSCALL_64:
252 TRACE_IRQS_IRETQ /* we're about to change IF */
255 * Try to use SYSRET instead of IRET if we're returning to
256 * a completely clean 64-bit userspace context.
260 cmpq %rcx, %r11 /* RCX == RIP */
261 jne opportunistic_sysret_failed
264 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
265 * in kernel space. This essentially lets the user take over
266 * the kernel, since userspace controls RSP.
268 * If width of "canonical tail" ever becomes variable, this will need
269 * to be updated to remain correct on both old and new CPUs.
271 .ifne __VIRTUAL_MASK_SHIFT - 47
272 .error "virtual address width changed -- SYSRET checks need update"
275 /* Change top 16 bits to be the sign-extension of 47th bit */
276 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
277 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
279 /* If this changed %rcx, it was not canonical */
281 jne opportunistic_sysret_failed
283 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
284 jne opportunistic_sysret_failed
287 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
288 jne opportunistic_sysret_failed
291 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
292 * restoring TF results in a trap from userspace immediately after
293 * SYSRET. This would cause an infinite loop whenever #DB happens
294 * with register state that satisfies the opportunistic SYSRET
295 * conditions. For example, single-stepping this user code:
297 * movq $stuck_here, %rcx
302 * would never get past 'stuck_here'.
304 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
305 jnz opportunistic_sysret_failed
307 /* nothing to check for RSP */
309 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
310 jne opportunistic_sysret_failed
313 * We win! This label is here just for ease of understanding
314 * perf profiles. Nothing jumps here.
316 syscall_return_via_sysret:
317 /* rcx and r11 are already restored (see code above) */
318 RESTORE_C_REGS_EXCEPT_RCX_R11
322 opportunistic_sysret_failed:
324 jmp restore_c_regs_and_iret
325 END(entry_SYSCALL_64)
327 ENTRY(stub_ptregs_64)
329 * Syscalls marked as needing ptregs land here.
330 * If we are on the fast path, we need to save the extra regs,
331 * which we achieve by trying again on the slow path. If we are on
332 * the slow path, the extra regs are already saved.
334 * RAX stores a pointer to the C function implementing the syscall.
337 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
341 * Called from fast path -- disable IRQs again, pop return address
342 * and jump to slow path
344 DISABLE_INTERRUPTS(CLBR_NONE)
347 jmp entry_SYSCALL64_slow_path
351 jmp *%rax /* called from C */
354 .macro ptregs_stub func
356 leaq \func(%rip), %rax
361 /* Instantiate ptregs_stub for each ptregs-using syscall */
362 #define __SYSCALL_64_QUAL_(sym)
363 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
364 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
365 #include <asm/syscalls_64.h>
368 * A newly forked process directly context switches into this address.
370 * rdi: prev task we switched from
373 LOCK ; btr $TIF_FORK, TI_flags(%r8)
375 call schedule_tail /* rdi: 'prev' task parameter */
377 testb $3, CS(%rsp) /* from kernel_thread? */
381 * We came from kernel_thread. This code path is quite twisted, and
382 * someone should clean it up.
384 * copy_thread_tls stashes the function pointer in RBX and the
385 * parameter to be passed in RBP. The called function is permitted
386 * to call do_execve and thereby jump to user mode.
393 * Fall through as though we're exiting a syscall. This makes a
394 * twisted sort of sense if we just called do_execve.
399 call syscall_return_slowpath /* returns with IRQs disabled */
400 TRACE_IRQS_ON /* user mode is traced as IRQS on */
402 jmp restore_regs_and_iret
406 * Build the entry stubs with some assembler magic.
407 * We pack 1 stub into every 8-byte block.
410 ENTRY(irq_entries_start)
411 vector=FIRST_EXTERNAL_VECTOR
412 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
413 pushq $(~vector+0x80) /* Note: always in signed byte range */
418 END(irq_entries_start)
421 * Interrupt entry/exit.
423 * Interrupt entry points save only callee clobbered registers in fast path.
425 * Entry runs with interrupts off.
428 /* 0(%rsp): ~(interrupt number) */
429 .macro interrupt func
431 ALLOC_PT_GPREGS_ON_STACK
439 * IRQ from user mode. Switch to kernel gsbase and inform context
440 * tracking that we're in kernel mode.
445 * We need to tell lockdep that IRQs are off. We can't do this until
446 * we fix gsbase, and we should do it before enter_from_user_mode
447 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
448 * the simplest way to handle it is to just call it twice if
449 * we enter from user mode. There's no reason to optimize this since
450 * TRACE_IRQS_OFF is a no-op if lockdep is off.
454 CALL_enter_from_user_mode
458 * Save previous stack pointer, optionally switch to interrupt stack.
459 * irq_count is used to check if a CPU is already on an interrupt stack
460 * or not. While this is essentially redundant with preempt_count it is
461 * a little cheaper to use a separate counter in the PDA (short of
462 * moving irq_enter into assembly, which would be too much work)
465 incl PER_CPU_VAR(irq_count)
466 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
468 /* We entered an interrupt context - irqs are off: */
471 call \func /* rdi points to pt_regs */
475 * The interrupt stubs push (~vector+0x80) onto the stack and
476 * then jump to common_interrupt.
478 .p2align CONFIG_X86_L1_CACHE_SHIFT
481 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
483 /* 0(%rsp): old RSP */
485 DISABLE_INTERRUPTS(CLBR_NONE)
487 decl PER_CPU_VAR(irq_count)
489 /* Restore saved previous stack */
495 /* Interrupt came from user space */
498 call prepare_exit_to_usermode
501 jmp restore_regs_and_iret
503 /* Returning to kernel space */
505 #ifdef CONFIG_PREEMPT
506 /* Interrupts are off */
507 /* Check if we need preemption */
508 bt $9, EFLAGS(%rsp) /* were interrupts off? */
510 0: cmpl $0, PER_CPU_VAR(__preempt_count)
512 call preempt_schedule_irq
517 * The iretq could re-enable interrupts:
522 * At this label, code paths which return to kernel and to user,
523 * which come from interrupts/exception and from syscalls, merge.
525 GLOBAL(restore_regs_and_iret)
527 restore_c_regs_and_iret:
529 REMOVE_PT_GPREGS_FROM_STACK 8
534 * Are we returning to a stack segment from the LDT? Note: in
535 * 64-bit mode SS:RSP on the exception stack is always valid.
537 #ifdef CONFIG_X86_ESPFIX64
538 testb $4, (SS-RIP)(%rsp)
539 jnz native_irq_return_ldt
542 .global native_irq_return_iret
543 native_irq_return_iret:
545 * This may fault. Non-paranoid faults on return to userspace are
546 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
547 * Double-faults due to espfix64 are handled in do_double_fault.
548 * Other faults here are fatal.
552 #ifdef CONFIG_X86_ESPFIX64
553 native_irq_return_ldt:
557 movq PER_CPU_VAR(espfix_waddr), %rdi
558 movq %rax, (0*8)(%rdi) /* RAX */
559 movq (2*8)(%rsp), %rax /* RIP */
560 movq %rax, (1*8)(%rdi)
561 movq (3*8)(%rsp), %rax /* CS */
562 movq %rax, (2*8)(%rdi)
563 movq (4*8)(%rsp), %rax /* RFLAGS */
564 movq %rax, (3*8)(%rdi)
565 movq (6*8)(%rsp), %rax /* SS */
566 movq %rax, (5*8)(%rdi)
567 movq (5*8)(%rsp), %rax /* RSP */
568 movq %rax, (4*8)(%rdi)
569 andl $0xffff0000, %eax
571 orq PER_CPU_VAR(espfix_stack), %rax
575 jmp native_irq_return_iret
577 END(common_interrupt)
582 .macro apicinterrupt3 num sym do_sym
592 #ifdef CONFIG_TRACING
593 #define trace(sym) trace_##sym
594 #define smp_trace(sym) smp_trace_##sym
596 .macro trace_apicinterrupt num sym
597 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
600 .macro trace_apicinterrupt num sym do_sym
604 /* Make sure APIC interrupt handlers end up in the irqentry section: */
605 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
606 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
607 # define POP_SECTION_IRQENTRY .popsection
609 # define PUSH_SECTION_IRQENTRY
610 # define POP_SECTION_IRQENTRY
613 .macro apicinterrupt num sym do_sym
614 PUSH_SECTION_IRQENTRY
615 apicinterrupt3 \num \sym \do_sym
616 trace_apicinterrupt \num \sym
621 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
622 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
626 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
629 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
630 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
632 #ifdef CONFIG_HAVE_KVM
633 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
634 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
637 #ifdef CONFIG_X86_MCE_THRESHOLD
638 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
641 #ifdef CONFIG_X86_MCE_AMD
642 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
645 #ifdef CONFIG_X86_THERMAL_VECTOR
646 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
650 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
651 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
652 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
655 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
656 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
658 #ifdef CONFIG_IRQ_WORK
659 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
663 * Exception entry points.
665 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
667 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
670 .if \shift_ist != -1 && \paranoid == 0
671 .error "using shift_ist requires paranoid=1"
675 PARAVIRT_ADJUST_EXCEPTION_FRAME
677 .ifeq \has_error_code
678 pushq $-1 /* ORIG_RAX: no syscall to restart */
681 ALLOC_PT_GPREGS_ON_STACK
685 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
692 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
696 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
702 movq %rsp, %rdi /* pt_regs pointer */
705 movq ORIG_RAX(%rsp), %rsi /* get error code */
706 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
708 xorl %esi, %esi /* no error code */
712 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
718 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
721 /* these procedures expect "no swapgs" flag in ebx */
730 * Paranoid entry from userspace. Switch stacks and treat it
731 * as a normal entry. This means that paranoid handlers
732 * run in real process context if user_mode(regs).
738 movq %rsp, %rdi /* pt_regs pointer */
740 movq %rax, %rsp /* switch stack */
742 movq %rsp, %rdi /* pt_regs pointer */
745 movq ORIG_RAX(%rsp), %rsi /* get error code */
746 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
748 xorl %esi, %esi /* no error code */
753 jmp error_exit /* %ebx: no swapgs flag */
758 #ifdef CONFIG_TRACING
759 .macro trace_idtentry sym do_sym has_error_code:req
760 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
761 idtentry \sym \do_sym has_error_code=\has_error_code
764 .macro trace_idtentry sym do_sym has_error_code:req
765 idtentry \sym \do_sym has_error_code=\has_error_code
769 idtentry divide_error do_divide_error has_error_code=0
770 idtentry overflow do_overflow has_error_code=0
771 idtentry bounds do_bounds has_error_code=0
772 idtentry invalid_op do_invalid_op has_error_code=0
773 idtentry device_not_available do_device_not_available has_error_code=0
774 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
775 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
776 idtentry invalid_TSS do_invalid_TSS has_error_code=1
777 idtentry segment_not_present do_segment_not_present has_error_code=1
778 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
779 idtentry coprocessor_error do_coprocessor_error has_error_code=0
780 idtentry alignment_check do_alignment_check has_error_code=1
781 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
785 * Reload gs selector with exception handling
788 ENTRY(native_load_gs_index)
790 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
794 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
798 END(native_load_gs_index)
800 _ASM_EXTABLE(.Lgs_change, bad_gs)
801 .section .fixup, "ax"
802 /* running with kernelgs */
804 SWAPGS /* switch back to user gs */
806 /* This can't be a string because the preprocessor needs to see it. */
807 movl $__USER_DS, %eax
810 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
816 /* Call softirq on interrupt stack. Interrupts are off. */
817 ENTRY(do_softirq_own_stack)
820 incl PER_CPU_VAR(irq_count)
821 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
822 push %rbp /* frame pointer backlink */
825 decl PER_CPU_VAR(irq_count)
827 END(do_softirq_own_stack)
830 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
833 * A note on the "critical region" in our callback handler.
834 * We want to avoid stacking callback handlers due to events occurring
835 * during handling of the last event. To do this, we keep events disabled
836 * until we've done all processing. HOWEVER, we must enable events before
837 * popping the stack frame (can't be done atomically) and so it would still
838 * be possible to get enough handler activations to overflow the stack.
839 * Although unlikely, bugs of that kind are hard to track down, so we'd
840 * like to avoid the possibility.
841 * So, on entry to the handler we detect whether we interrupted an
842 * existing activation in its critical region -- if so, we pop the current
843 * activation and restart the handler using the previous one.
845 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
848 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
849 * see the correct pointer to the pt_regs
851 movq %rdi, %rsp /* we don't return, adjust the stack frame */
852 11: incl PER_CPU_VAR(irq_count)
854 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
855 pushq %rbp /* frame pointer backlink */
856 call xen_evtchn_do_upcall
858 decl PER_CPU_VAR(irq_count)
859 #ifndef CONFIG_PREEMPT
860 call xen_maybe_preempt_hcall
863 END(xen_do_hypervisor_callback)
866 * Hypervisor uses this for application faults while it executes.
867 * We get here for two reasons:
868 * 1. Fault while reloading DS, ES, FS or GS
869 * 2. Fault while executing IRET
870 * Category 1 we do not need to fix up as Xen has already reloaded all segment
871 * registers that could be reloaded and zeroed the others.
872 * Category 2 we fix up by killing the current process. We cannot use the
873 * normal Linux return path in this case because if we use the IRET hypercall
874 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
875 * We distinguish between categories by comparing each saved segment register
876 * with its current contents: any discrepancy means we in category 1.
878 ENTRY(xen_failsafe_callback)
891 /* All segments match their saved values => Category 2 (Bad IRET). */
898 jmp general_protection
899 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
903 pushq $-1 /* orig_ax = -1 => not a system call */
904 ALLOC_PT_GPREGS_ON_STACK
908 END(xen_failsafe_callback)
910 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
911 xen_hvm_callback_vector xen_evtchn_do_upcall
913 #endif /* CONFIG_XEN */
915 #if IS_ENABLED(CONFIG_HYPERV)
916 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
917 hyperv_callback_vector hyperv_vector_handler
918 #endif /* CONFIG_HYPERV */
920 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
921 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
922 idtentry stack_segment do_stack_segment has_error_code=1
925 idtentry xen_debug do_debug has_error_code=0
926 idtentry xen_int3 do_int3 has_error_code=0
927 idtentry xen_stack_segment do_stack_segment has_error_code=1
930 idtentry general_protection do_general_protection has_error_code=1
931 trace_idtentry page_fault do_page_fault has_error_code=1
933 #ifdef CONFIG_KVM_GUEST
934 idtentry async_page_fault do_async_page_fault has_error_code=1
937 #ifdef CONFIG_X86_MCE
938 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
942 * Save all registers in pt_regs, and switch gs if needed.
943 * Use slow, but surefire "are we in kernel?" check.
944 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
946 ENTRY(paranoid_entry)
951 movl $MSR_GS_BASE, %ecx
954 js 1f /* negative -> in kernel */
961 * "Paranoid" exit path from exception stack. This is invoked
962 * only on return from non-NMI IST interrupts that came
965 * We may be returning to very strange contexts (e.g. very early
966 * in syscall entry), so checking for preemption here would
967 * be complicated. Fortunately, we there's no good reason
968 * to try to handle preemption here.
970 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
973 DISABLE_INTERRUPTS(CLBR_NONE)
975 testl %ebx, %ebx /* swapgs needed? */
976 jnz paranoid_exit_no_swapgs
979 jmp paranoid_exit_restore
980 paranoid_exit_no_swapgs:
981 TRACE_IRQS_IRETQ_DEBUG
982 paranoid_exit_restore:
985 REMOVE_PT_GPREGS_FROM_STACK 8
990 * Save all registers in pt_regs, and switch gs if needed.
991 * Return: EBX=0: came from user mode; EBX=1: otherwise
999 jz .Lerror_kernelspace
1001 .Lerror_entry_from_usermode_swapgs:
1003 * We entered from user mode or we're pretending to have entered
1004 * from user mode due to an IRET fault.
1008 .Lerror_entry_from_usermode_after_swapgs:
1010 * We need to tell lockdep that IRQs are off. We can't do this until
1011 * we fix gsbase, and we should do it before enter_from_user_mode
1012 * (which can take locks).
1015 CALL_enter_from_user_mode
1023 * There are two places in the kernel that can potentially fault with
1024 * usergs. Handle them here. B stepping K8s sometimes report a
1025 * truncated RIP for IRET exceptions returning to compat mode. Check
1026 * for these here too.
1028 .Lerror_kernelspace:
1030 leaq native_irq_return_iret(%rip), %rcx
1031 cmpq %rcx, RIP+8(%rsp)
1033 movl %ecx, %eax /* zero extend */
1034 cmpq %rax, RIP+8(%rsp)
1036 cmpq $.Lgs_change, RIP+8(%rsp)
1037 jne .Lerror_entry_done
1040 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1041 * gsbase and proceed. We'll fix up the exception and land in
1042 * .Lgs_change's error handler with kernel gsbase.
1044 jmp .Lerror_entry_from_usermode_swapgs
1047 /* Fix truncated RIP */
1048 movq %rcx, RIP+8(%rsp)
1053 * We came from an IRET to user mode, so we have user gsbase.
1054 * Switch to kernel gsbase:
1059 * Pretend that the exception came from user mode: set up pt_regs
1060 * as if we faulted immediately after IRET and clear EBX so that
1061 * error_exit knows that we will be returning to user mode.
1067 jmp .Lerror_entry_from_usermode_after_swapgs
1072 * On entry, EBS is a "return to kernel mode" flag:
1073 * 1: already in kernel mode, don't need SWAPGS
1074 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1078 DISABLE_INTERRUPTS(CLBR_NONE)
1085 /* Runs on exception stack */
1088 * Fix up the exception frame if we're on Xen.
1089 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1090 * one value to the stack on native, so it may clobber the rdx
1091 * scratch slot, but it won't clobber any of the important
1094 * Xen is a different story, because the Xen frame itself overlaps
1095 * the "NMI executing" variable.
1097 PARAVIRT_ADJUST_EXCEPTION_FRAME
1100 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1101 * the iretq it performs will take us out of NMI context.
1102 * This means that we can have nested NMIs where the next
1103 * NMI is using the top of the stack of the previous NMI. We
1104 * can't let it execute because the nested NMI will corrupt the
1105 * stack of the previous NMI. NMI handlers are not re-entrant
1108 * To handle this case we do the following:
1109 * Check the a special location on the stack that contains
1110 * a variable that is set when NMIs are executing.
1111 * The interrupted task's stack is also checked to see if it
1113 * If the variable is not set and the stack is not the NMI
1115 * o Set the special variable on the stack
1116 * o Copy the interrupt frame into an "outermost" location on the
1118 * o Copy the interrupt frame into an "iret" location on the stack
1119 * o Continue processing the NMI
1120 * If the variable is set or the previous stack is the NMI stack:
1121 * o Modify the "iret" location to jump to the repeat_nmi
1122 * o return back to the first NMI
1124 * Now on exit of the first NMI, we first clear the stack variable
1125 * The NMI stack will tell any nested NMIs at that point that it is
1126 * nested. Then we pop the stack normally with iret, and if there was
1127 * a nested NMI that updated the copy interrupt stack frame, a
1128 * jump will be made to the repeat_nmi code that will handle the second
1131 * However, espfix prevents us from directly returning to userspace
1132 * with a single IRET instruction. Similarly, IRET to user mode
1133 * can fault. We therefore handle NMIs from user space like
1134 * other IST entries.
1137 /* Use %rdx as our temp variable throughout */
1140 testb $3, CS-RIP+8(%rsp)
1141 jz .Lnmi_from_kernel
1144 * NMI from user mode. We need to run on the thread stack, but we
1145 * can't go through the normal entry paths: NMIs are masked, and
1146 * we don't want to enable interrupts, because then we'll end
1147 * up in an awkward situation in which IRQs are on but NMIs
1150 * We also must not push anything to the stack before switching
1151 * stacks lest we corrupt the "NMI executing" variable.
1157 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1158 pushq 5*8(%rdx) /* pt_regs->ss */
1159 pushq 4*8(%rdx) /* pt_regs->rsp */
1160 pushq 3*8(%rdx) /* pt_regs->flags */
1161 pushq 2*8(%rdx) /* pt_regs->cs */
1162 pushq 1*8(%rdx) /* pt_regs->rip */
1163 pushq $-1 /* pt_regs->orig_ax */
1164 pushq %rdi /* pt_regs->di */
1165 pushq %rsi /* pt_regs->si */
1166 pushq (%rdx) /* pt_regs->dx */
1167 pushq %rcx /* pt_regs->cx */
1168 pushq %rax /* pt_regs->ax */
1169 pushq %r8 /* pt_regs->r8 */
1170 pushq %r9 /* pt_regs->r9 */
1171 pushq %r10 /* pt_regs->r10 */
1172 pushq %r11 /* pt_regs->r11 */
1173 pushq %rbx /* pt_regs->rbx */
1174 pushq %rbp /* pt_regs->rbp */
1175 pushq %r12 /* pt_regs->r12 */
1176 pushq %r13 /* pt_regs->r13 */
1177 pushq %r14 /* pt_regs->r14 */
1178 pushq %r15 /* pt_regs->r15 */
1181 * At this point we no longer need to worry about stack damage
1182 * due to nesting -- we're on the normal thread stack and we're
1183 * done with the NMI stack.
1191 * Return back to user mode. We must *not* do the normal exit
1192 * work, because we don't want to enable interrupts. Fortunately,
1193 * do_nmi doesn't modify pt_regs.
1196 jmp restore_c_regs_and_iret
1200 * Here's what our stack frame will look like:
1201 * +---------------------------------------------------------+
1203 * | original Return RSP |
1204 * | original RFLAGS |
1207 * +---------------------------------------------------------+
1208 * | temp storage for rdx |
1209 * +---------------------------------------------------------+
1210 * | "NMI executing" variable |
1211 * +---------------------------------------------------------+
1212 * | iret SS } Copied from "outermost" frame |
1213 * | iret Return RSP } on each loop iteration; overwritten |
1214 * | iret RFLAGS } by a nested NMI to force another |
1215 * | iret CS } iteration if needed. |
1217 * +---------------------------------------------------------+
1218 * | outermost SS } initialized in first_nmi; |
1219 * | outermost Return RSP } will not be changed before |
1220 * | outermost RFLAGS } NMI processing is done. |
1221 * | outermost CS } Copied to "iret" frame on each |
1222 * | outermost RIP } iteration. |
1223 * +---------------------------------------------------------+
1225 * +---------------------------------------------------------+
1227 * The "original" frame is used by hardware. Before re-enabling
1228 * NMIs, we need to be done with it, and we need to leave enough
1229 * space for the asm code here.
1231 * We return by executing IRET while RSP points to the "iret" frame.
1232 * That will either return for real or it will loop back into NMI
1235 * The "outermost" frame is copied to the "iret" frame on each
1236 * iteration of the loop, so each iteration starts with the "iret"
1237 * frame pointing to the final return target.
1241 * Determine whether we're a nested NMI.
1243 * If we interrupted kernel code between repeat_nmi and
1244 * end_repeat_nmi, then we are a nested NMI. We must not
1245 * modify the "iret" frame because it's being written by
1246 * the outer NMI. That's okay; the outer NMI handler is
1247 * about to about to call do_nmi anyway, so we can just
1248 * resume the outer NMI.
1251 movq $repeat_nmi, %rdx
1254 movq $end_repeat_nmi, %rdx
1260 * Now check "NMI executing". If it's set, then we're nested.
1261 * This will not detect if we interrupted an outer NMI just
1268 * Now test if the previous stack was an NMI stack. This covers
1269 * the case where we interrupt an outer NMI after it clears
1270 * "NMI executing" but before IRET. We need to be careful, though:
1271 * there is one case in which RSP could point to the NMI stack
1272 * despite there being no NMI active: naughty userspace controls
1273 * RSP at the very beginning of the SYSCALL targets. We can
1274 * pull a fast one on naughty userspace, though: we program
1275 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1276 * if it controls the kernel's RSP. We set DF before we clear
1280 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1281 cmpq %rdx, 4*8(%rsp)
1282 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1285 subq $EXCEPTION_STKSZ, %rdx
1286 cmpq %rdx, 4*8(%rsp)
1287 /* If it is below the NMI stack, it is a normal NMI */
1290 /* Ah, it is within the NMI stack. */
1292 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1293 jz first_nmi /* RSP was user controlled. */
1295 /* This is a nested NMI. */
1299 * Modify the "iret" frame to point to repeat_nmi, forcing another
1300 * iteration of NMI handling.
1303 leaq -10*8(%rsp), %rdx
1310 /* Put stack back */
1316 /* We are returning to kernel mode, so this cannot result in a fault. */
1323 /* Make room for "NMI executing". */
1326 /* Leave room for the "iret" frame */
1329 /* Copy the "original" frame to the "outermost" frame */
1334 /* Everything up to here is safe from nested NMIs */
1336 #ifdef CONFIG_DEBUG_ENTRY
1338 * For ease of testing, unmask NMIs right away. Disabled by
1339 * default because IRET is very expensive.
1342 pushq %rsp /* RSP (minus 8 because of the previous push) */
1343 addq $8, (%rsp) /* Fix up RSP */
1345 pushq $__KERNEL_CS /* CS */
1347 INTERRUPT_RETURN /* continues at repeat_nmi below */
1353 * If there was a nested NMI, the first NMI's iret will return
1354 * here. But NMIs are still enabled and we can take another
1355 * nested NMI. The nested NMI checks the interrupted RIP to see
1356 * if it is between repeat_nmi and end_repeat_nmi, and if so
1357 * it will just return, as we are about to repeat an NMI anyway.
1358 * This makes it safe to copy to the stack frame that a nested
1361 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1362 * we're repeating an NMI, gsbase has the same value that it had on
1363 * the first iteration. paranoid_entry will load the kernel
1364 * gsbase if needed before we call do_nmi. "NMI executing"
1367 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1370 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1371 * here must not modify the "iret" frame while we're writing to
1372 * it or it will end up containing garbage.
1382 * Everything below this point can be preempted by a nested NMI.
1383 * If this happens, then the inner NMI will change the "iret"
1384 * frame to point back to repeat_nmi.
1386 pushq $-1 /* ORIG_RAX: no syscall to restart */
1387 ALLOC_PT_GPREGS_ON_STACK
1390 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1391 * as we should not be calling schedule in NMI context.
1392 * Even with normal interrupts enabled. An NMI should not be
1393 * setting NEED_RESCHED or anything that normal interrupts and
1394 * exceptions might do.
1398 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1403 testl %ebx, %ebx /* swapgs needed? */
1411 /* Point RSP at the "iret" frame. */
1412 REMOVE_PT_GPREGS_FROM_STACK 6*8
1415 * Clear "NMI executing". Set DF first so that we can easily
1416 * distinguish the remaining code between here and IRET from
1417 * the SYSCALL entry and exit paths. On a native kernel, we
1418 * could just inspect RIP, but, on paravirt kernels,
1419 * INTERRUPT_RETURN can translate into a jump into a
1423 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1426 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1427 * stack in a single instruction. We are returning to kernel
1428 * mode, so this cannot result in a fault.
1433 ENTRY(ignore_sysret)
1438 ENTRY(rewind_stack_do_exit)
1439 /* Prevent any naive code from trying to unwind to our caller. */
1442 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1443 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1447 END(rewind_stack_do_exit)