1 #include <linux/module.h>
2 #include <linux/slab.h>
4 #include <linux/perf_event.h>
5 #include "../../kernel/cpu/perf_event.h"
7 #define UNCORE_PMU_NAME_LEN 32
8 #define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC)
9 #define UNCORE_SNB_IMC_HRTIMER_INTERVAL (5ULL * NSEC_PER_SEC)
11 #define UNCORE_FIXED_EVENT 0xff
12 #define UNCORE_PMC_IDX_MAX_GENERIC 8
13 #define UNCORE_PMC_IDX_FIXED UNCORE_PMC_IDX_MAX_GENERIC
14 #define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FIXED + 1)
16 #define UNCORE_PCI_DEV_DATA(type, idx) ((type << 8) | idx)
17 #define UNCORE_PCI_DEV_TYPE(data) ((data >> 8) & 0xff)
18 #define UNCORE_PCI_DEV_IDX(data) (data & 0xff)
19 #define UNCORE_EXTRA_PCI_DEV 0xff
20 #define UNCORE_EXTRA_PCI_DEV_MAX 3
22 /* support up to 8 sockets */
23 #define UNCORE_SOCKET_MAX 8
25 #define UNCORE_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, 0xff)
27 struct intel_uncore_ops;
28 struct intel_uncore_pmu;
29 struct intel_uncore_box;
30 struct uncore_event_desc;
32 struct intel_uncore_type {
45 unsigned num_shared_regs:8;
46 unsigned single_fixed:1;
47 unsigned pair_ctr_ctl:1;
48 unsigned *msr_offsets;
49 struct event_constraint unconstrainted;
50 struct event_constraint *constraints;
51 struct intel_uncore_pmu *pmus;
52 struct intel_uncore_ops *ops;
53 struct uncore_event_desc *event_descs;
54 const struct attribute_group *attr_groups[4];
55 struct pmu *pmu; /* for custom pmu ops */
58 #define pmu_group attr_groups[0]
59 #define format_group attr_groups[1]
60 #define events_group attr_groups[2]
62 struct intel_uncore_ops {
63 void (*init_box)(struct intel_uncore_box *);
64 void (*disable_box)(struct intel_uncore_box *);
65 void (*enable_box)(struct intel_uncore_box *);
66 void (*disable_event)(struct intel_uncore_box *, struct perf_event *);
67 void (*enable_event)(struct intel_uncore_box *, struct perf_event *);
68 u64 (*read_counter)(struct intel_uncore_box *, struct perf_event *);
69 int (*hw_config)(struct intel_uncore_box *, struct perf_event *);
70 struct event_constraint *(*get_constraint)(struct intel_uncore_box *,
72 void (*put_constraint)(struct intel_uncore_box *, struct perf_event *);
75 struct intel_uncore_pmu {
77 char name[UNCORE_PMU_NAME_LEN];
80 struct intel_uncore_type *type;
81 struct intel_uncore_box ** __percpu box;
82 struct list_head box_list;
85 struct intel_uncore_extra_reg {
87 u64 config, config1, config2;
91 struct intel_uncore_box {
93 int n_active; /* number of active events */
95 int cpu; /* cpu to collect events */
98 struct perf_event *events[UNCORE_PMC_IDX_MAX];
99 struct perf_event *event_list[UNCORE_PMC_IDX_MAX];
100 struct event_constraint *event_constraint[UNCORE_PMC_IDX_MAX];
101 unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)];
102 u64 tags[UNCORE_PMC_IDX_MAX];
103 struct pci_dev *pci_dev;
104 struct intel_uncore_pmu *pmu;
105 u64 hrtimer_duration; /* hrtimer timeout for this box */
106 struct hrtimer hrtimer;
107 struct list_head list;
108 struct list_head active_list;
110 struct intel_uncore_extra_reg shared_regs[0];
113 #define UNCORE_BOX_FLAG_INITIATED 0
115 struct uncore_event_desc {
116 struct kobj_attribute attr;
121 struct list_head list;
123 int pbus_to_physid[256];
126 int uncore_pcibus_to_physid(struct pci_bus *bus);
127 struct pci2phy_map *__find_pci2phy_map(int segment);
129 ssize_t uncore_event_show(struct kobject *kobj,
130 struct kobj_attribute *attr, char *buf);
132 #define INTEL_UNCORE_EVENT_DESC(_name, _config) \
134 .attr = __ATTR(_name, 0444, uncore_event_show, NULL), \
138 #define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \
139 static ssize_t __uncore_##_var##_show(struct kobject *kobj, \
140 struct kobj_attribute *attr, \
143 BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
144 return sprintf(page, _format "\n"); \
146 static struct kobj_attribute format_attr_##_var = \
147 __ATTR(_name, 0444, __uncore_##_var##_show, NULL)
149 static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box)
151 return box->pmu->type->box_ctl;
154 static inline unsigned uncore_pci_fixed_ctl(struct intel_uncore_box *box)
156 return box->pmu->type->fixed_ctl;
159 static inline unsigned uncore_pci_fixed_ctr(struct intel_uncore_box *box)
161 return box->pmu->type->fixed_ctr;
165 unsigned uncore_pci_event_ctl(struct intel_uncore_box *box, int idx)
167 return idx * 4 + box->pmu->type->event_ctl;
171 unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
173 return idx * 8 + box->pmu->type->perf_ctr;
176 static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
178 struct intel_uncore_pmu *pmu = box->pmu;
179 return pmu->type->msr_offsets ?
180 pmu->type->msr_offsets[pmu->pmu_idx] :
181 pmu->type->msr_offset * pmu->pmu_idx;
184 static inline unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
186 if (!box->pmu->type->box_ctl)
188 return box->pmu->type->box_ctl + uncore_msr_box_offset(box);
191 static inline unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
193 if (!box->pmu->type->fixed_ctl)
195 return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box);
198 static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
200 return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
204 unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
206 return box->pmu->type->event_ctl +
207 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
208 uncore_msr_box_offset(box);
212 unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx)
214 return box->pmu->type->perf_ctr +
215 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
216 uncore_msr_box_offset(box);
220 unsigned uncore_fixed_ctl(struct intel_uncore_box *box)
223 return uncore_pci_fixed_ctl(box);
225 return uncore_msr_fixed_ctl(box);
229 unsigned uncore_fixed_ctr(struct intel_uncore_box *box)
232 return uncore_pci_fixed_ctr(box);
234 return uncore_msr_fixed_ctr(box);
238 unsigned uncore_event_ctl(struct intel_uncore_box *box, int idx)
241 return uncore_pci_event_ctl(box, idx);
243 return uncore_msr_event_ctl(box, idx);
247 unsigned uncore_perf_ctr(struct intel_uncore_box *box, int idx)
250 return uncore_pci_perf_ctr(box, idx);
252 return uncore_msr_perf_ctr(box, idx);
255 static inline int uncore_perf_ctr_bits(struct intel_uncore_box *box)
257 return box->pmu->type->perf_ctr_bits;
260 static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
262 return box->pmu->type->fixed_ctr_bits;
265 static inline int uncore_num_counters(struct intel_uncore_box *box)
267 return box->pmu->type->num_counters;
270 static inline void uncore_disable_box(struct intel_uncore_box *box)
272 if (box->pmu->type->ops->disable_box)
273 box->pmu->type->ops->disable_box(box);
276 static inline void uncore_enable_box(struct intel_uncore_box *box)
278 if (box->pmu->type->ops->enable_box)
279 box->pmu->type->ops->enable_box(box);
282 static inline void uncore_disable_event(struct intel_uncore_box *box,
283 struct perf_event *event)
285 box->pmu->type->ops->disable_event(box, event);
288 static inline void uncore_enable_event(struct intel_uncore_box *box,
289 struct perf_event *event)
291 box->pmu->type->ops->enable_event(box, event);
294 static inline u64 uncore_read_counter(struct intel_uncore_box *box,
295 struct perf_event *event)
297 return box->pmu->type->ops->read_counter(box, event);
300 static inline void uncore_box_init(struct intel_uncore_box *box)
302 if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
303 if (box->pmu->type->ops->init_box)
304 box->pmu->type->ops->init_box(box);
308 static inline bool uncore_box_is_fake(struct intel_uncore_box *box)
310 return (box->phys_id < 0);
313 struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event);
314 struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
315 struct intel_uncore_box *uncore_event_to_box(struct perf_event *event);
316 u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event);
317 void uncore_pmu_start_hrtimer(struct intel_uncore_box *box);
318 void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box);
319 void uncore_pmu_event_read(struct perf_event *event);
320 void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *event);
321 struct event_constraint *
322 uncore_get_constraint(struct intel_uncore_box *box, struct perf_event *event);
323 void uncore_put_constraint(struct intel_uncore_box *box, struct perf_event *event);
324 u64 uncore_shared_reg_config(struct intel_uncore_box *box, int idx);
326 extern struct intel_uncore_type **uncore_msr_uncores;
327 extern struct intel_uncore_type **uncore_pci_uncores;
328 extern struct pci_driver *uncore_pci_driver;
329 extern raw_spinlock_t pci2phy_map_lock;
330 extern struct list_head pci2phy_map_head;
331 extern struct pci_dev *uncore_extra_pci_dev[UNCORE_SOCKET_MAX][UNCORE_EXTRA_PCI_DEV_MAX];
332 extern struct event_constraint uncore_constraint_empty;
334 /* perf_event_intel_uncore_snb.c */
335 int snb_uncore_pci_init(void);
336 int ivb_uncore_pci_init(void);
337 int hsw_uncore_pci_init(void);
338 int bdw_uncore_pci_init(void);
339 int skl_uncore_pci_init(void);
340 void snb_uncore_cpu_init(void);
341 void nhm_uncore_cpu_init(void);
342 int snb_pci2phy_map_init(int devid);
344 /* perf_event_intel_uncore_snbep.c */
345 int snbep_uncore_pci_init(void);
346 void snbep_uncore_cpu_init(void);
347 int ivbep_uncore_pci_init(void);
348 void ivbep_uncore_cpu_init(void);
349 int hswep_uncore_pci_init(void);
350 void hswep_uncore_cpu_init(void);
351 int bdx_uncore_pci_init(void);
352 void bdx_uncore_cpu_init(void);
353 int knl_uncore_pci_init(void);
354 void knl_uncore_cpu_init(void);
356 /* perf_event_intel_uncore_nhmex.c */
357 void nhmex_uncore_cpu_init(void);