arch/x86/kernel/fpu/xstate.c

   1 /*
   2  * xsave/xrstor support.
   3  *
   4  * Author: Suresh Siddha <suresh.b.siddha@intel.com>
   5  */
   6 #include <linux/compat.h>
   7 #include <linux/cpu.h>
   8 #include <asm/fpu/api.h>
   9 #include <asm/fpu/internal.h>
  10 #include <asm/sigframe.h>
  11 #include <asm/tlbflush.h>
  12
  13 static const char *xfeature_names[] =
  14 {
  15         "x87 floating point registers"  ,
  16         "SSE registers"                 ,
  17         "AVX registers"                 ,
  18         "MPX bounds registers"          ,
  19         "MPX CSR"                       ,
  20         "AVX-512 opmask"                ,
  21         "AVX-512 Hi256"                 ,
  22         "AVX-512 ZMM_Hi256"             ,
  23         "unknown xstate feature"        ,
  24 };
  25
  26 /*
  27  * Mask of xstate features supported by the CPU and the kernel:
  28  */
  29 u64 xfeatures_mask __read_mostly;
  30
  31 /*
  32  * Represents init state for the supported extended state.
  33  */
  34 struct xsave_struct init_xstate_ctx;
  35
  36 static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
  37 static unsigned int xstate_offsets[XFEATURES_NR_MAX], xstate_sizes[XFEATURES_NR_MAX];
  38 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
  39
  40 /* The number of supported xfeatures in xfeatures_mask: */
  41 static unsigned int xfeatures_nr;
  42
  43 /*
  44  * Return whether the system supports a given xfeature.
  45  *
  46  * Also return the name of the (most advanced) feature that the caller requested:
  47  */
  48 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
  49 {
  50         u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
  51
  52         if (unlikely(feature_name)) {
  53                 long xfeature_idx, max_idx;
  54                 u64 xfeatures_print;
  55                 /*
  56                  * So we use FLS here to be able to print the most advanced
  57                  * feature that was requested but is missing. So if a driver
  58                  * asks about "XSTATE_SSE | XSTATE_YMM" we'll print the
  59                  * missing AVX feature - this is the most informative message
  60                  * to users:
  61                  */
  62                 if (xfeatures_missing)
  63                         xfeatures_print = xfeatures_missing;
  64                 else
  65                         xfeatures_print = xfeatures_needed;
  66
  67                 xfeature_idx = fls64(xfeatures_print)-1;
  68                 max_idx = ARRAY_SIZE(xfeature_names)-1;
  69                 xfeature_idx = min(xfeature_idx, max_idx);
  70
  71                 *feature_name = xfeature_names[xfeature_idx];
  72         }
  73
  74         if (xfeatures_missing)
  75                 return 0;
  76
  77         return 1;
  78 }
  79 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
  80
  81 /*
  82  * When executing XSAVEOPT (optimized XSAVE), if a processor implementation
  83  * detects that an FPU state component is still (or is again) in its
  84  * initialized state, it may clear the corresponding bit in the header.xfeatures
  85  * field, and can skip the writeout of registers to the corresponding memory layout.
  86  *
  87  * This means that when the bit is zero, the state component might still contain
  88  * some previous - non-initialized register state.
  89  *
  90  * Before writing xstate information to user-space we sanitize those components,
  91  * to always ensure that the memory layout of a feature will be in the init state
  92  * if the corresponding header bit is zero. This is to ensure that user-space doesn't
  93  * see some stale state in the memory layout during signal handling, debugging etc.
  94  */
  95 void fpstate_sanitize_xstate(struct fpu *fpu)
  96 {
  97         struct i387_fxsave_struct *fx = &fpu->state.fxsave;
  98         int feature_bit;
  99         u64 xfeatures;
 100
 101         if (!use_xsaveopt())
 102                 return;
 103
 104         xfeatures = fpu->state.xsave.header.xfeatures;
 105
 106         /*
 107          * None of the feature bits are in init state. So nothing else
 108          * to do for us, as the memory layout is up to date.
 109          */
 110         if ((xfeatures & xfeatures_mask) == xfeatures_mask)
 111                 return;
 112
 113         /*
 114          * FP is in init state
 115          */
 116         if (!(xfeatures & XSTATE_FP)) {
 117                 fx->cwd = 0x37f;
 118                 fx->swd = 0;
 119                 fx->twd = 0;
 120                 fx->fop = 0;
 121                 fx->rip = 0;
 122                 fx->rdp = 0;
 123                 memset(&fx->st_space[0], 0, 128);
 124         }
 125
 126         /*
 127          * SSE is in init state
 128          */
 129         if (!(xfeatures & XSTATE_SSE))
 130                 memset(&fx->xmm_space[0], 0, 256);
 131
 132         /*
 133          * First two features are FPU and SSE, which above we handled
 134          * in a special way already:
 135          */
 136         feature_bit = 0x2;
 137         xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
 138
 139         /*
 140          * Update all the remaining memory layouts according to their
 141          * standard xstate layout, if their header bit is in the init
 142          * state:
 143          */
 144         while (xfeatures) {
 145                 if (xfeatures & 0x1) {
 146                         int offset = xstate_offsets[feature_bit];
 147                         int size = xstate_sizes[feature_bit];
 148
 149                         memcpy((void *)fx + offset,
 150                                (void *)&init_xstate_ctx + offset,
 151                                size);
 152                 }
 153
 154                 xfeatures >>= 1;
 155                 feature_bit++;
 156         }
 157 }
 158
 159 /*
 160  * Check for the presence of extended state information in the
 161  * user fpstate pointer in the sigcontext.
 162  */
 163 static inline int check_for_xstate(struct i387_fxsave_struct __user *buf,
 164                                    void __user *fpstate,
 165                                    struct _fpx_sw_bytes *fx_sw)
 166 {
 167         int min_xstate_size = sizeof(struct i387_fxsave_struct) +
 168                               sizeof(struct xstate_header);
 169         unsigned int magic2;
 170
 171         if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
 172                 return -1;
 173
 174         /* Check for the first magic field and other error scenarios. */
 175         if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
 176             fx_sw->xstate_size < min_xstate_size ||
 177             fx_sw->xstate_size > xstate_size ||
 178             fx_sw->xstate_size > fx_sw->extended_size)
 179                 return -1;
 180
 181         /*
 182          * Check for the presence of second magic word at the end of memory
 183          * layout. This detects the case where the user just copied the legacy
 184          * fpstate layout with out copying the extended state information
 185          * in the memory layout.
 186          */
 187         if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
 188             || magic2 != FP_XSTATE_MAGIC2)
 189                 return -1;
 190
 191         return 0;
 192 }
 193
 194 /*
 195  * Signal frame handlers.
 196  */
 197 static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)
 198 {
 199         if (use_fxsr()) {
 200                 struct xsave_struct *xsave = &tsk->thread.fpu.state.xsave;
 201                 struct user_i387_ia32_struct env;
 202                 struct _fpstate_ia32 __user *fp = buf;
 203
 204                 convert_from_fxsr(&env, tsk);
 205
 206                 if (__copy_to_user(buf, &env, sizeof(env)) ||
 207                     __put_user(xsave->i387.swd, &fp->status) ||
 208                     __put_user(X86_FXSR_MAGIC, &fp->magic))
 209                         return -1;
 210         } else {
 211                 struct i387_fsave_struct __user *fp = buf;
 212                 u32 swd;
 213                 if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
 214                         return -1;
 215         }
 216
 217         return 0;
 218 }
 219
 220 static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
 221 {
 222         struct xsave_struct __user *x = buf;
 223         struct _fpx_sw_bytes *sw_bytes;
 224         u32 xfeatures;
 225         int err;
 226
 227         /* Setup the bytes not touched by the [f]xsave and reserved for SW. */
 228         sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved;
 229         err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));
 230
 231         if (!use_xsave())
 232                 return err;
 233
 234         err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));
 235
 236         /*
 237          * Read the xfeatures which we copied (directly from the cpu or
 238          * from the state in task struct) to the user buffers.
 239          */
 240         err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures);
 241
 242         /*
 243          * For legacy compatible, we always set FP/SSE bits in the bit
 244          * vector while saving the state to the user context. This will
 245          * enable us capturing any changes(during sigreturn) to
 246          * the FP/SSE bits by the legacy applications which don't touch
 247          * xfeatures in the xsave header.
 248          *
 249          * xsave aware apps can change the xfeatures in the xsave
 250          * header as well as change any contents in the memory layout.
 251          * xrestore as part of sigreturn will capture all the changes.
 252          */
 253         xfeatures |= XSTATE_FPSSE;
 254
 255         err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures);
 256
 257         return err;
 258 }
 259
 260 static inline int copy_fpregs_to_sigframe(struct xsave_struct __user *buf)
 261 {
 262         int err;
 263
 264         if (use_xsave())
 265                 err = xsave_user(buf);
 266         else if (use_fxsr())
 267                 err = fxsave_user((struct i387_fxsave_struct __user *) buf);
 268         else
 269                 err = fsave_user((struct i387_fsave_struct __user *) buf);
 270
 271         if (unlikely(err) && __clear_user(buf, xstate_size))
 272                 err = -EFAULT;
 273         return err;
 274 }
 275
 276 /*
 277  * Save the fpu, extended register state to the user signal frame.
 278  *
 279  * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save
 280  *  state is copied.
 281  *  'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.
 282  *
 283  *      buf == buf_fx for 64-bit frames and 32-bit fsave frame.
 284  *      buf != buf_fx for 32-bit frames with fxstate.
 285  *
 286  * If the fpu, extended register state is live, save the state directly
 287  * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise,
 288  * copy the thread's fpu state to the user frame starting at 'buf_fx'.
 289  *
 290  * If this is a 32-bit frame with fxstate, put a fsave header before
 291  * the aligned state at 'buf_fx'.
 292  *
 293  * For [f]xsave state, update the SW reserved fields in the [f]xsave frame
 294  * indicating the absence/presence of the extended state to the user.
 295  */
 296 int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
 297 {
 298         struct xsave_struct *xsave = &current->thread.fpu.state.xsave;
 299         struct task_struct *tsk = current;
 300         int ia32_fxstate = (buf != buf_fx);
 301
 302         ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
 303                          config_enabled(CONFIG_IA32_EMULATION));
 304
 305         if (!access_ok(VERIFY_WRITE, buf, size))
 306                 return -EACCES;
 307
 308         if (!static_cpu_has(X86_FEATURE_FPU))
 309                 return fpregs_soft_get(current, NULL, 0,
 310                         sizeof(struct user_i387_ia32_struct), NULL,
 311                         (struct _fpstate_ia32 __user *) buf) ? -1 : 1;
 312
 313         if (fpregs_active()) {
 314                 /* Save the live register state to the user directly. */
 315                 if (copy_fpregs_to_sigframe(buf_fx))
 316                         return -1;
 317                 /* Update the thread's fxstate to save the fsave header. */
 318                 if (ia32_fxstate)
 319                         fpu_fxsave(&tsk->thread.fpu);
 320         } else {
 321                 fpstate_sanitize_xstate(&tsk->thread.fpu);
 322                 if (__copy_to_user(buf_fx, xsave, xstate_size))
 323                         return -1;
 324         }
 325
 326         /* Save the fsave header for the 32-bit frames. */
 327         if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf))
 328                 return -1;
 329
 330         if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate))
 331                 return -1;
 332
 333         return 0;
 334 }
 335
 336 static inline void
 337 sanitize_restored_xstate(struct task_struct *tsk,
 338                          struct user_i387_ia32_struct *ia32_env,
 339                          u64 xfeatures, int fx_only)
 340 {
 341         struct xsave_struct *xsave = &tsk->thread.fpu.state.xsave;
 342         struct xstate_header *header = &xsave->header;
 343
 344         if (use_xsave()) {
 345                 /* These bits must be zero. */
 346                 memset(header->reserved, 0, 48);
 347
 348                 /*
 349                  * Init the state that is not present in the memory
 350                  * layout and not enabled by the OS.
 351                  */
 352                 if (fx_only)
 353                         header->xfeatures = XSTATE_FPSSE;
 354                 else
 355                         header->xfeatures &= (xfeatures_mask & xfeatures);
 356         }
 357
 358         if (use_fxsr()) {
 359                 /*
 360                  * mscsr reserved bits must be masked to zero for security
 361                  * reasons.
 362                  */
 363                 xsave->i387.mxcsr &= mxcsr_feature_mask;
 364
 365                 convert_to_fxsr(tsk, ia32_env);
 366         }
 367 }
 368
 369 /*
 370  * Restore the extended state if present. Otherwise, restore the FP/SSE state.
 371  */
 372 static inline int restore_user_xstate(void __user *buf, u64 xbv, int fx_only)
 373 {
 374         if (use_xsave()) {
 375                 if ((unsigned long)buf % 64 || fx_only) {
 376                         u64 init_bv = xfeatures_mask & ~XSTATE_FPSSE;
 377                         xrstor_state(&init_xstate_ctx, init_bv);
 378                         return fxrstor_user(buf);
 379                 } else {
 380                         u64 init_bv = xfeatures_mask & ~xbv;
 381                         if (unlikely(init_bv))
 382                                 xrstor_state(&init_xstate_ctx, init_bv);
 383                         return xrestore_user(buf, xbv);
 384                 }
 385         } else if (use_fxsr()) {
 386                 return fxrstor_user(buf);
 387         } else
 388                 return frstor_user(buf);
 389 }
 390
 391 static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
 392 {
 393         int ia32_fxstate = (buf != buf_fx);
 394         struct task_struct *tsk = current;
 395         struct fpu *fpu = &tsk->thread.fpu;
 396         int state_size = xstate_size;
 397         u64 xfeatures = 0;
 398         int fx_only = 0;
 399
 400         ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
 401                          config_enabled(CONFIG_IA32_EMULATION));
 402
 403         if (!buf) {
 404                 fpu__clear(fpu);
 405                 return 0;
 406         }
 407
 408         if (!access_ok(VERIFY_READ, buf, size))
 409                 return -EACCES;
 410
 411         fpu__activate_curr(fpu);
 412
 413         if (!static_cpu_has(X86_FEATURE_FPU))
 414                 return fpregs_soft_set(current, NULL,
 415                                        0, sizeof(struct user_i387_ia32_struct),
 416                                        NULL, buf) != 0;
 417
 418         if (use_xsave()) {
 419                 struct _fpx_sw_bytes fx_sw_user;
 420                 if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
 421                         /*
 422                          * Couldn't find the extended state information in the
 423                          * memory layout. Restore just the FP/SSE and init all
 424                          * the other extended state.
 425                          */
 426                         state_size = sizeof(struct i387_fxsave_struct);
 427                         fx_only = 1;
 428                 } else {
 429                         state_size = fx_sw_user.xstate_size;
 430                         xfeatures = fx_sw_user.xfeatures;
 431                 }
 432         }
 433
 434         if (ia32_fxstate) {
 435                 /*
 436                  * For 32-bit frames with fxstate, copy the user state to the
 437                  * thread's fpu state, reconstruct fxstate from the fsave
 438                  * header. Sanitize the copied state etc.
 439                  */
 440                 struct fpu *fpu = &tsk->thread.fpu;
 441                 struct user_i387_ia32_struct env;
 442                 int err = 0;
 443
 444                 /*
 445                  * Drop the current fpu which clears fpu->fpstate_active. This ensures
 446                  * that any context-switch during the copy of the new state,
 447                  * avoids the intermediate state from getting restored/saved.
 448                  * Thus avoiding the new restored state from getting corrupted.
 449                  * We will be ready to restore/save the state only after
 450                  * fpu->fpstate_active is again set.
 451                  */
 452                 fpu__drop(fpu);
 453
 454                 if (__copy_from_user(&fpu->state.xsave, buf_fx, state_size) ||
 455                     __copy_from_user(&env, buf, sizeof(env))) {
 456                         fpstate_init(fpu);
 457                         err = -1;
 458                 } else {
 459                         sanitize_restored_xstate(tsk, &env, xfeatures, fx_only);
 460                 }
 461
 462                 fpu->fpstate_active = 1;
 463                 if (use_eager_fpu()) {
 464                         preempt_disable();
 465                         fpu__restore();
 466                         preempt_enable();
 467                 }
 468
 469                 return err;
 470         } else {
 471                 /*
 472                  * For 64-bit frames and 32-bit fsave frames, restore the user
 473                  * state to the registers directly (with exceptions handled).
 474                  */
 475                 user_fpu_begin();
 476                 if (restore_user_xstate(buf_fx, xfeatures, fx_only)) {
 477                         fpu__clear(fpu);
 478                         return -1;
 479                 }
 480         }
 481
 482         return 0;
 483 }
 484
 485 static inline int xstate_sigframe_size(void)
 486 {
 487         return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;
 488 }
 489
 490 /*
 491  * Restore FPU state from a sigframe:
 492  */
 493 int fpu__restore_sig(void __user *buf, int ia32_frame)
 494 {
 495         void __user *buf_fx = buf;
 496         int size = xstate_sigframe_size();
 497
 498         if (ia32_frame && use_fxsr()) {
 499                 buf_fx = buf + sizeof(struct i387_fsave_struct);
 500                 size += sizeof(struct i387_fsave_struct);
 501         }
 502
 503         return __fpu__restore_sig(buf, buf_fx, size);
 504 }
 505
 506 unsigned long
 507 fpu__alloc_mathframe(unsigned long sp, int ia32_frame,
 508                      unsigned long *buf_fx, unsigned long *size)
 509 {
 510         unsigned long frame_size = xstate_sigframe_size();
 511
 512         *buf_fx = sp = round_down(sp - frame_size, 64);
 513         if (ia32_frame && use_fxsr()) {
 514                 frame_size += sizeof(struct i387_fsave_struct);
 515                 sp -= sizeof(struct i387_fsave_struct);
 516         }
 517
 518         *size = frame_size;
 519
 520         return sp;
 521 }
 522 /*
 523  * Prepare the SW reserved portion of the fxsave memory layout, indicating
 524  * the presence of the extended state information in the memory layout
 525  * pointed by the fpstate pointer in the sigcontext.
 526  * This will be saved when ever the FP and extended state context is
 527  * saved on the user stack during the signal handler delivery to the user.
 528  */
 529 static void prepare_fx_sw_frame(void)
 530 {
 531         int fsave_header_size = sizeof(struct i387_fsave_struct);
 532         int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;
 533
 534         if (config_enabled(CONFIG_X86_32))
 535                 size += fsave_header_size;
 536
 537         fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
 538         fx_sw_reserved.extended_size = size;
 539         fx_sw_reserved.xfeatures = xfeatures_mask;
 540         fx_sw_reserved.xstate_size = xstate_size;
 541
 542         if (config_enabled(CONFIG_IA32_EMULATION)) {
 543                 fx_sw_reserved_ia32 = fx_sw_reserved;
 544                 fx_sw_reserved_ia32.extended_size += fsave_header_size;
 545         }
 546 }
 547
 548 /*
 549  * Enable the extended processor state save/restore feature.
 550  * Called once per CPU onlining.
 551  */
 552 void fpu__init_cpu_xstate(void)
 553 {
 554         if (!cpu_has_xsave || !xfeatures_mask)
 555                 return;
 556
 557         cr4_set_bits(X86_CR4_OSXSAVE);
 558         xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
 559 }
 560
 561 /*
 562  * Record the offsets and sizes of different state managed by the xsave
 563  * memory layout.
 564  */
 565 static void __init setup_xstate_features(void)
 566 {
 567         int eax, ebx, ecx, edx, leaf = 0x2;
 568
 569         xfeatures_nr = fls64(xfeatures_mask);
 570
 571         do {
 572                 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
 573
 574                 if (eax == 0)
 575                         break;
 576
 577                 xstate_offsets[leaf] = ebx;
 578                 xstate_sizes[leaf] = eax;
 579
 580                 leaf++;
 581         } while (1);
 582 }
 583
 584 static void print_xstate_feature(u64 xstate_mask)
 585 {
 586         const char *feature_name;
 587
 588         if (cpu_has_xfeatures(xstate_mask, &feature_name))
 589                 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
 590 }
 591
 592 /*
 593  * Print out all the supported xstate features:
 594  */
 595 static void print_xstate_features(void)
 596 {
 597         print_xstate_feature(XSTATE_FP);
 598         print_xstate_feature(XSTATE_SSE);
 599         print_xstate_feature(XSTATE_YMM);
 600         print_xstate_feature(XSTATE_BNDREGS);
 601         print_xstate_feature(XSTATE_BNDCSR);
 602         print_xstate_feature(XSTATE_OPMASK);
 603         print_xstate_feature(XSTATE_ZMM_Hi256);
 604         print_xstate_feature(XSTATE_Hi16_ZMM);
 605 }
 606
 607 /*
 608  * This function sets up offsets and sizes of all extended states in
 609  * xsave area. This supports both standard format and compacted format
 610  * of the xsave aread.
 611  *
 612  * Input: void
 613  * Output: void
 614  */
 615 void setup_xstate_comp(void)
 616 {
 617         unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
 618         int i;
 619
 620         /*
 621          * The FP xstates and SSE xstates are legacy states. They are always
 622          * in the fixed offsets in the xsave area in either compacted form
 623          * or standard form.
 624          */
 625         xstate_comp_offsets[0] = 0;
 626         xstate_comp_offsets[1] = offsetof(struct i387_fxsave_struct, xmm_space);
 627
 628         if (!cpu_has_xsaves) {
 629                 for (i = 2; i < xfeatures_nr; i++) {
 630                         if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
 631                                 xstate_comp_offsets[i] = xstate_offsets[i];
 632                                 xstate_comp_sizes[i] = xstate_sizes[i];
 633                         }
 634                 }
 635                 return;
 636         }
 637
 638         xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;
 639
 640         for (i = 2; i < xfeatures_nr; i++) {
 641                 if (test_bit(i, (unsigned long *)&xfeatures_mask))
 642                         xstate_comp_sizes[i] = xstate_sizes[i];
 643                 else
 644                         xstate_comp_sizes[i] = 0;
 645
 646                 if (i > 2)
 647                         xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
 648                                         + xstate_comp_sizes[i-1];
 649
 650         }
 651 }
 652
 653 /*
 654  * setup the xstate image representing the init state
 655  */
 656 static void setup_init_fpu_buf(void)
 657 {
 658         static int on_boot_cpu = 1;
 659
 660         if (!on_boot_cpu)
 661                 return;
 662         on_boot_cpu = 0;
 663
 664         if (!cpu_has_xsave)
 665                 return;
 666
 667         setup_xstate_features();
 668         print_xstate_features();
 669
 670         if (cpu_has_xsaves) {
 671                 init_xstate_ctx.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
 672                 init_xstate_ctx.header.xfeatures = xfeatures_mask;
 673         }
 674
 675         /*
 676          * Init all the features state with header_bv being 0x0
 677          */
 678         xrstor_state_booting(&init_xstate_ctx, -1);
 679
 680         /*
 681          * Dump the init state again. This is to identify the init state
 682          * of any feature which is not represented by all zero's.
 683          */
 684         xsave_state_booting(&init_xstate_ctx);
 685 }
 686
 687 /*
 688  * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
 689  */
 690 static void __init init_xstate_size(void)
 691 {
 692         unsigned int eax, ebx, ecx, edx;
 693         int i;
 694
 695         if (!cpu_has_xsaves) {
 696                 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 697                 xstate_size = ebx;
 698                 return;
 699         }
 700
 701         xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
 702         for (i = 2; i < 64; i++) {
 703                 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
 704                         cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
 705                         xstate_size += eax;
 706                 }
 707         }
 708 }
 709
 710 /*
 711  * Enable and initialize the xsave feature.
 712  * Called once per system bootup.
 713  *
 714  * ( Not marked __init because of false positive section warnings. )
 715  */
 716 void fpu__init_system_xstate(void)
 717 {
 718         unsigned int eax, ebx, ecx, edx;
 719         static bool on_boot_cpu = 1;
 720
 721         if (!on_boot_cpu)
 722                 return;
 723         on_boot_cpu = 0;
 724
 725         if (!cpu_has_xsave) {
 726                 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
 727                 return;
 728         }
 729
 730         if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
 731                 WARN(1, "x86/fpu: XSTATE_CPUID missing!\n");
 732                 return;
 733         }
 734
 735         cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 736         xfeatures_mask = eax + ((u64)edx << 32);
 737
 738         if ((xfeatures_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
 739                 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
 740                 BUG();
 741         }
 742
 743         /*
 744          * Support only the state known to OS.
 745          */
 746         xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
 747
 748         /* Enable xstate instructions to be able to continue with initialization: */
 749         fpu__init_cpu_xstate();
 750
 751         /*
 752          * Recompute the context size for enabled features
 753          */
 754         init_xstate_size();
 755
 756         update_regset_xstate_info(xstate_size, xfeatures_mask);
 757         prepare_fx_sw_frame();
 758         setup_init_fpu_buf();
 759
 760         pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is 0x%x bytes, using '%s' format.\n",
 761                 xfeatures_mask,
 762                 xstate_size,
 763                 cpu_has_xsaves ? "compacted" : "standard");
 764 }
 765
 766 /*
 767  * Restore minimal FPU state after suspend:
 768  */
 769 void fpu__resume_cpu(void)
 770 {
 771         /*
 772          * Restore XCR0 on xsave capable CPUs:
 773          */
 774         if (cpu_has_xsave)
 775                 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
 776 }
 777
 778 /*
 779  * Given the xsave area and a state inside, this function returns the
 780  * address of the state.
 781  *
 782  * This is the API that is called to get xstate address in either
 783  * standard format or compacted format of xsave area.
 784  *
 785  * Inputs:
 786  *      xsave: base address of the xsave area;
 787  *      xstate: state which is defined in xsave.h (e.g. XSTATE_FP, XSTATE_SSE,
 788  *      etc.)
 789  * Output:
 790  *      address of the state in the xsave area.
 791  */
 792 void *get_xsave_addr(struct xsave_struct *xsave, int xstate)
 793 {
 794         int feature = fls64(xstate) - 1;
 795         if (!test_bit(feature, (unsigned long *)&xfeatures_mask))
 796                 return NULL;
 797
 798         return (void *)xsave + xstate_comp_offsets[feature];
 799 }
 800 EXPORT_SYMBOL_GPL(get_xsave_addr);