2 * Driver/API for AMD Geode Multi-Function General Purpose Timers (MFGPT)
4 * Copyright (C) 2006, Advanced Micro Devices, Inc.
5 * Copyright (C) 2007, Andres Salomon <dilinger@debian.org>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of version 2 of the GNU General Public License
9 * as published by the Free Software Foundation.
11 * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
15 * We are using the 32.768kHz input clock - it's the only one that has the
16 * ranges we find desirable. The following table lists the suitable
17 * divisors and the associated Hz, minimum interval and the maximum interval:
19 * Divisor Hz Min Delta (s) Max Delta (s)
20 * 1 32768 .00048828125 2.000
21 * 2 16384 .0009765625 4.000
22 * 4 8192 .001953125 8.000
23 * 8 4096 .00390625 16.000
24 * 16 2048 .0078125 32.000
25 * 32 1024 .015625 64.000
26 * 64 512 .03125 128.000
27 * 128 256 .0625 256.000
28 * 256 128 .125 512.000
31 #include <linux/kernel.h>
32 #include <linux/interrupt.h>
33 #include <linux/module.h>
34 #include <asm/geode.h>
38 static struct mfgpt_timer_t {
41 } mfgpt_timers[MFGPT_MAX_TIMERS];
43 /* Selected from the table above */
45 #define MFGPT_DIVISOR 16
46 #define MFGPT_SCALE 4 /* divisor = 2^(scale) */
47 #define MFGPT_HZ (32768 / MFGPT_DIVISOR)
48 #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
50 #ifdef CONFIG_GEODE_MFGPT_TIMER
51 static int __init mfgpt_timer_setup(void);
53 #define mfgpt_timer_setup() (0)
56 /* Allow for disabling of MFGPTs */
58 static int __init mfgpt_disable(char *s)
63 __setup("nomfgpt", mfgpt_disable);
65 /* Reset the MFGPT timers. This is required by some broken BIOSes which already
66 * do the same and leave the system in an unstable state. TinyBIOS 0.98 is
67 * affected at least (0.99 is OK with MFGPT workaround left to off).
69 static int __init mfgpt_fix(char *s)
73 /* The following udocumented bit resets the MFGPT timers */
74 val = 0xFF; dummy = 0;
75 wrmsr(0x5140002B, val, dummy);
78 __setup("mfgptfix", mfgpt_fix);
81 * Check whether any MFGPTs are available for the kernel to use. In most
82 * cases, firmware that uses AMD's VSA code will claim all timers during
83 * bootup; we certainly don't want to take them if they're already in use.
84 * In other cases (such as with VSAless OpenFirmware), the system firmware
85 * leaves timers available for us to use.
87 int __init geode_mfgpt_detect(void)
93 printk(KERN_INFO "geode-mfgpt: Skipping MFGPT setup\n");
97 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
98 val = geode_mfgpt_read(i, MFGPT_REG_SETUP);
99 if (!(val & MFGPT_SETUP_SETUP)) {
100 mfgpt_timers[i].flags = F_AVAIL;
105 /* set up clock event device, if desired */
106 i = mfgpt_timer_setup();
111 int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
113 u32 msr, mask, value, dummy;
114 int shift = (cmp == MFGPT_CMP1) ? 0 : 8;
116 if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
120 * The register maps for these are described in sections 6.17.1.x of
121 * the AMD Geode CS5536 Companion Device Data Book.
124 case MFGPT_EVENT_RESET:
126 * XXX: According to the docs, we cannot reset timers above
127 * 6; that is, resets for 7 and 8 will be ignored. Is this
128 * a problem? -dilinger
131 mask = 1 << (timer + 24);
134 case MFGPT_EVENT_NMI:
136 mask = 1 << (timer + shift);
139 case MFGPT_EVENT_IRQ:
141 mask = 1 << (timer + shift);
148 rdmsr(msr, value, dummy);
155 wrmsr(msr, value, dummy);
159 int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
164 if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
167 if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
170 rdmsr(MSR_PIC_ZSEL_LOW, val, dummy);
172 offset = (timer % 4) * 4;
174 val &= ~((0xF << offset) | (0xF << (offset + 16)));
177 val |= (irq & 0x0F) << (offset);
178 val |= (irq & 0x0F) << (offset + 16);
181 wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
185 static int mfgpt_get(int timer, struct module *owner)
187 mfgpt_timers[timer].flags &= ~F_AVAIL;
188 mfgpt_timers[timer].owner = owner;
189 printk(KERN_INFO "geode-mfgpt: Registered timer %d\n", timer);
193 int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner)
197 if (!geode_get_dev_base(GEODE_DEV_MFGPT))
199 if (timer >= MFGPT_MAX_TIMERS)
203 /* Try to find an available timer */
204 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
205 if (mfgpt_timers[i].flags & F_AVAIL)
206 return mfgpt_get(i, owner);
208 if (i == 5 && domain == MFGPT_DOMAIN_WORKING)
212 /* If they requested a specific timer, try to honor that */
213 if (mfgpt_timers[timer].flags & F_AVAIL)
214 return mfgpt_get(timer, owner);
217 /* No timers available - too bad */
222 #ifdef CONFIG_GEODE_MFGPT_TIMER
225 * The MFPGT timers on the CS5536 provide us with suitable timers to use
226 * as clock event sources - not as good as a HPET or APIC, but certainly
227 * better then the PIT. This isn't a general purpose MFGPT driver, but
228 * a simplified one designed specifically to act as a clock event source.
229 * For full details about the MFGPT, please consult the CS5536 data sheet.
232 #include <linux/clocksource.h>
233 #include <linux/clockchips.h>
235 static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
236 static u16 mfgpt_event_clock;
239 static int __init mfgpt_setup(char *str)
241 get_option(&str, &irq);
244 __setup("mfgpt_irq=", mfgpt_setup);
246 static void mfgpt_disable_timer(u16 clock)
248 u16 val = geode_mfgpt_read(clock, MFGPT_REG_SETUP);
249 geode_mfgpt_write(clock, MFGPT_REG_SETUP, val & ~MFGPT_SETUP_CNTEN);
252 static int mfgpt_next_event(unsigned long, struct clock_event_device *);
253 static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
255 static struct clock_event_device mfgpt_clockevent = {
256 .name = "mfgpt-timer",
257 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
258 .set_mode = mfgpt_set_mode,
259 .set_next_event = mfgpt_next_event,
261 .cpumask = CPU_MASK_ALL,
265 static void mfgpt_start_timer(u16 delta)
267 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
268 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
270 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
271 MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
274 static void mfgpt_set_mode(enum clock_event_mode mode,
275 struct clock_event_device *evt)
277 mfgpt_disable_timer(mfgpt_event_clock);
279 if (mode == CLOCK_EVT_MODE_PERIODIC)
280 mfgpt_start_timer(MFGPT_PERIODIC);
282 mfgpt_tick_mode = mode;
285 static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
287 mfgpt_start_timer(delta);
291 /* Assume (foolishly?), that this interrupt was due to our tick */
293 static irqreturn_t mfgpt_tick(int irq, void *dev_id)
295 /* Turn off the clock (and clear the event) */
296 mfgpt_disable_timer(mfgpt_event_clock);
298 if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
301 /* Clear the counter */
302 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
304 /* Restart the clock in periodic mode */
306 if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
307 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
308 MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
311 mfgpt_clockevent.event_handler(&mfgpt_clockevent);
315 static struct irqaction mfgptirq = {
316 .handler = mfgpt_tick,
317 .flags = IRQF_DISABLED | IRQF_NOBALANCING,
318 .mask = CPU_MASK_NONE,
319 .name = "mfgpt-timer"
322 static int __init mfgpt_timer_setup(void)
327 timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING,
331 "mfgpt-timer: Could not allocate a MFPGT timer\n");
335 mfgpt_event_clock = timer;
337 /* Set up the IRQ on the MFGPT side */
338 if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
339 printk(KERN_ERR "mfgpt-timer: Could not set up IRQ %d\n", irq);
343 /* And register it with the kernel */
344 ret = setup_irq(irq, &mfgptirq);
348 "mfgpt-timer: Unable to set up the interrupt.\n");
352 /* Set the clock scale and enable the event mode for CMP2 */
353 val = MFGPT_SCALE | (3 << 8);
355 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
357 /* Set up the clock event */
358 mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
359 mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
361 mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
365 "mfgpt-timer: registering the MFGT timer as a clock event.\n");
366 clockevents_register_device(&mfgpt_clockevent);
371 geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
373 "mfgpt-timer: Unable to set up the MFGPT clock source\n");