2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
36 unsigned long numpages;
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 if (direct_pages_count[level] == 0)
72 direct_pages_count[level]--;
73 direct_pages_count[level - 1] += PTRS_PER_PTE;
76 void arch_report_meminfo(struct seq_file *m)
78 seq_printf(m, "DirectMap4k: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_4K] << 2);
80 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
81 seq_printf(m, "DirectMap2M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 11);
84 seq_printf(m, "DirectMap4M: %8lu kB\n",
85 direct_pages_count[PG_LEVEL_2M] << 12);
88 seq_printf(m, "DirectMap1G: %8lu kB\n",
89 direct_pages_count[PG_LEVEL_1G] << 20);
92 static inline void split_page_count(int level) { }
97 static inline unsigned long highmap_start_pfn(void)
99 return __pa_symbol(_text) >> PAGE_SHIFT;
102 static inline unsigned long highmap_end_pfn(void)
104 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
109 #ifdef CONFIG_DEBUG_PAGEALLOC
110 # define debug_pagealloc 1
112 # define debug_pagealloc 0
116 within(unsigned long addr, unsigned long start, unsigned long end)
118 return addr >= start && addr < end;
126 * clflush_cache_range - flush a cache range with clflush
127 * @vaddr: virtual start address
128 * @size: number of bytes to flush
130 * clflushopt is an unordered instruction which needs fencing with mfence or
131 * sfence to avoid ordering issues.
133 void clflush_cache_range(void *vaddr, unsigned int size)
135 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
136 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
137 void *vend = vaddr + size;
144 for (; p < vend; p += clflush_size)
149 EXPORT_SYMBOL_GPL(clflush_cache_range);
151 static void __cpa_flush_all(void *arg)
153 unsigned long cache = (unsigned long)arg;
156 * Flush all to work around Errata in early athlons regarding
157 * large page flushing.
161 if (cache && boot_cpu_data.x86 >= 4)
165 static void cpa_flush_all(unsigned long cache)
167 BUG_ON(irqs_disabled());
169 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
172 static void __cpa_flush_range(void *arg)
175 * We could optimize that further and do individual per page
176 * tlb invalidates for a low number of pages. Caveat: we must
177 * flush the high aliases on 64bit as well.
182 static void cpa_flush_range(unsigned long start, int numpages, int cache)
184 unsigned int i, level;
187 BUG_ON(irqs_disabled());
188 WARN_ON(PAGE_ALIGN(start) != start);
190 on_each_cpu(__cpa_flush_range, NULL, 1);
196 * We only need to flush on one CPU,
197 * clflush is a MESI-coherent instruction that
198 * will cause all other CPUs to flush the same
201 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
202 pte_t *pte = lookup_address(addr, &level);
205 * Only flush present addresses:
207 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
208 clflush_cache_range((void *) addr, PAGE_SIZE);
212 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
213 int in_flags, struct page **pages)
215 unsigned int i, level;
216 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
218 BUG_ON(irqs_disabled());
220 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
222 if (!cache || do_wbinvd)
226 * We only need to flush on one CPU,
227 * clflush is a MESI-coherent instruction that
228 * will cause all other CPUs to flush the same
231 for (i = 0; i < numpages; i++) {
235 if (in_flags & CPA_PAGES_ARRAY)
236 addr = (unsigned long)page_address(pages[i]);
240 pte = lookup_address(addr, &level);
243 * Only flush present addresses:
245 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
246 clflush_cache_range((void *)addr, PAGE_SIZE);
251 * Certain areas of memory on x86 require very specific protection flags,
252 * for example the BIOS area or kernel text. Callers don't always get this
253 * right (again, ioremap() on BIOS memory is not uncommon) so this function
254 * checks and fixes these known static required protection bits.
256 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
259 pgprot_t forbidden = __pgprot(0);
262 * The BIOS area between 640k and 1Mb needs to be executable for
263 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
265 #ifdef CONFIG_PCI_BIOS
266 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
267 pgprot_val(forbidden) |= _PAGE_NX;
271 * The kernel text needs to be executable for obvious reasons
272 * Does not cover __inittext since that is gone later on. On
273 * 64bit we do not enforce !NX on the low mapping
275 if (within(address, (unsigned long)_text, (unsigned long)_etext))
276 pgprot_val(forbidden) |= _PAGE_NX;
279 * The .rodata section needs to be read-only. Using the pfn
280 * catches all aliases.
282 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
283 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
284 pgprot_val(forbidden) |= _PAGE_RW;
286 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
288 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
289 * kernel text mappings for the large page aligned text, rodata sections
290 * will be always read-only. For the kernel identity mappings covering
291 * the holes caused by this alignment can be anything that user asks.
293 * This will preserve the large page mappings for kernel text/data
296 if (kernel_set_to_readonly &&
297 within(address, (unsigned long)_text,
298 (unsigned long)__end_rodata_hpage_align)) {
302 * Don't enforce the !RW mapping for the kernel text mapping,
303 * if the current mapping is already using small page mapping.
304 * No need to work hard to preserve large page mappings in this
307 * This also fixes the Linux Xen paravirt guest boot failure
308 * (because of unexpected read-only mappings for kernel identity
309 * mappings). In this paravirt guest case, the kernel text
310 * mapping and the kernel identity mapping share the same
311 * page-table pages. Thus we can't really use different
312 * protections for the kernel text and identity mappings. Also,
313 * these shared mappings are made of small page mappings.
314 * Thus this don't enforce !RW mapping for small page kernel
315 * text mapping logic will help Linux Xen parvirt guest boot
318 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
319 pgprot_val(forbidden) |= _PAGE_RW;
323 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
329 * Lookup the page table entry for a virtual address in a specific pgd.
330 * Return a pointer to the entry and the level of the mapping.
332 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
338 *level = PG_LEVEL_NONE;
343 pud = pud_offset(pgd, address);
347 *level = PG_LEVEL_1G;
348 if (pud_large(*pud) || !pud_present(*pud))
351 pmd = pmd_offset(pud, address);
355 *level = PG_LEVEL_2M;
356 if (pmd_large(*pmd) || !pmd_present(*pmd))
359 *level = PG_LEVEL_4K;
361 return pte_offset_kernel(pmd, address);
365 * Lookup the page table entry for a virtual address. Return a pointer
366 * to the entry and the level of the mapping.
368 * Note: We return pud and pmd either when the entry is marked large
369 * or when the present bit is not set. Otherwise we would return a
370 * pointer to a nonexisting mapping.
372 pte_t *lookup_address(unsigned long address, unsigned int *level)
374 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
376 EXPORT_SYMBOL_GPL(lookup_address);
378 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
382 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
385 return lookup_address(address, level);
389 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
390 * or NULL if not present.
392 pmd_t *lookup_pmd_address(unsigned long address)
397 pgd = pgd_offset_k(address);
401 pud = pud_offset(pgd, address);
402 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
405 return pmd_offset(pud, address);
409 * This is necessary because __pa() does not work on some
410 * kinds of memory, like vmalloc() or the alloc_remap()
411 * areas on 32-bit NUMA systems. The percpu areas can
412 * end up in this kind of memory, for instance.
414 * This could be optimized, but it is only intended to be
415 * used at inititalization time, and keeping it
416 * unoptimized should increase the testing coverage for
417 * the more obscure platforms.
419 phys_addr_t slow_virt_to_phys(void *__virt_addr)
421 unsigned long virt_addr = (unsigned long)__virt_addr;
422 unsigned long phys_addr, offset;
426 pte = lookup_address(virt_addr, &level);
431 phys_addr = pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
432 offset = virt_addr & ~PUD_PAGE_MASK;
435 phys_addr = pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
436 offset = virt_addr & ~PMD_PAGE_MASK;
439 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
440 offset = virt_addr & ~PAGE_MASK;
443 return (phys_addr_t)(phys_addr | offset);
445 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
448 * Set the new pmd in all the pgds we know about:
450 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
453 set_pte_atomic(kpte, pte);
455 if (!SHARED_KERNEL_PMD) {
458 list_for_each_entry(page, &pgd_list, lru) {
463 pgd = (pgd_t *)page_address(page) + pgd_index(address);
464 pud = pud_offset(pgd, address);
465 pmd = pmd_offset(pud, address);
466 set_pte_atomic((pte_t *)pmd, pte);
473 try_preserve_large_page(pte_t *kpte, unsigned long address,
474 struct cpa_data *cpa)
476 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
477 pte_t new_pte, old_pte, *tmp;
478 pgprot_t old_prot, new_prot, req_prot;
482 if (cpa->force_split)
485 spin_lock(&pgd_lock);
487 * Check for races, another CPU might have split this page
490 tmp = _lookup_address_cpa(cpa, address, &level);
496 old_prot = pmd_pgprot(*(pmd_t *)kpte);
497 old_pfn = pmd_pfn(*(pmd_t *)kpte);
500 old_prot = pud_pgprot(*(pud_t *)kpte);
501 old_pfn = pud_pfn(*(pud_t *)kpte);
508 psize = page_level_size(level);
509 pmask = page_level_mask(level);
512 * Calculate the number of pages, which fit into this large
513 * page starting at address:
515 nextpage_addr = (address + psize) & pmask;
516 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
517 if (numpages < cpa->numpages)
518 cpa->numpages = numpages;
521 * We are safe now. Check whether the new pgprot is the same:
522 * Convert protection attributes to 4k-format, as cpa->mask* are set
526 req_prot = pgprot_large_2_4k(old_prot);
528 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
529 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
532 * req_prot is in format of 4k pages. It must be converted to large
533 * page format: the caching mode includes the PAT bit located at
534 * different bit positions in the two formats.
536 req_prot = pgprot_4k_2_large(req_prot);
539 * Set the PSE and GLOBAL flags only if the PRESENT flag is
540 * set otherwise pmd_present/pmd_huge will return true even on
541 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
542 * for the ancient hardware that doesn't support it.
544 if (pgprot_val(req_prot) & _PAGE_PRESENT)
545 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
547 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
549 req_prot = canon_pgprot(req_prot);
552 * old_pfn points to the large page base pfn. So we need
553 * to add the offset of the virtual address:
555 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
558 new_prot = static_protections(req_prot, address, pfn);
561 * We need to check the full range, whether
562 * static_protection() requires a different pgprot for one of
563 * the pages in the range we try to preserve:
565 addr = address & pmask;
567 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
568 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
570 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
575 * If there are no changes, return. maxpages has been updated
578 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
584 * We need to change the attributes. Check, whether we can
585 * change the large page in one go. We request a split, when
586 * the address is not aligned and the number of pages is
587 * smaller than the number of pages in the large page. Note
588 * that we limited the number of possible pages already to
589 * the number of pages in the large page.
591 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
593 * The address is aligned and the number of pages
594 * covers the full page.
596 new_pte = pfn_pte(old_pfn, new_prot);
597 __set_pmd_pte(kpte, address, new_pte);
598 cpa->flags |= CPA_FLUSHTLB;
603 spin_unlock(&pgd_lock);
609 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
612 pte_t *pbase = (pte_t *)page_address(base);
613 unsigned long ref_pfn, pfn, pfninc = 1;
614 unsigned int i, level;
618 spin_lock(&pgd_lock);
620 * Check for races, another CPU might have split this page
623 tmp = _lookup_address_cpa(cpa, address, &level);
625 spin_unlock(&pgd_lock);
629 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
633 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
634 /* clear PSE and promote PAT bit to correct position */
635 ref_prot = pgprot_large_2_4k(ref_prot);
636 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
640 ref_prot = pud_pgprot(*(pud_t *)kpte);
641 ref_pfn = pud_pfn(*(pud_t *)kpte);
642 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
645 * Clear the PSE flags if the PRESENT flag is not set
646 * otherwise pmd_present/pmd_huge will return true
647 * even on a non present pmd.
649 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
650 pgprot_val(ref_prot) &= ~_PAGE_PSE;
654 spin_unlock(&pgd_lock);
659 * Set the GLOBAL flags only if the PRESENT flag is set
660 * otherwise pmd/pte_present will return true even on a non
661 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
662 * for the ancient hardware that doesn't support it.
664 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
665 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
667 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
670 * Get the target pfn from the original entry:
673 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
674 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
676 if (virt_addr_valid(address)) {
677 unsigned long pfn = PFN_DOWN(__pa(address));
679 if (pfn_range_is_mapped(pfn, pfn + 1))
680 split_page_count(level);
684 * Install the new, split up pagetable.
686 * We use the standard kernel pagetable protections for the new
687 * pagetable protections, the actual ptes set above control the
688 * primary protection behavior:
690 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
693 * Intel Atom errata AAH41 workaround.
695 * The real fix should be in hw or in a microcode update, but
696 * we also probabilistically try to reduce the window of having
697 * a large TLB mixed with 4K TLBs while instruction fetches are
701 spin_unlock(&pgd_lock);
706 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
707 unsigned long address)
711 if (!debug_pagealloc)
712 spin_unlock(&cpa_lock);
713 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
714 if (!debug_pagealloc)
715 spin_lock(&cpa_lock);
719 if (__split_large_page(cpa, kpte, address, base))
725 static bool try_to_free_pte_page(pte_t *pte)
729 for (i = 0; i < PTRS_PER_PTE; i++)
730 if (!pte_none(pte[i]))
733 free_page((unsigned long)pte);
737 static bool try_to_free_pmd_page(pmd_t *pmd)
741 for (i = 0; i < PTRS_PER_PMD; i++)
742 if (!pmd_none(pmd[i]))
745 free_page((unsigned long)pmd);
749 static bool try_to_free_pud_page(pud_t *pud)
753 for (i = 0; i < PTRS_PER_PUD; i++)
754 if (!pud_none(pud[i]))
757 free_page((unsigned long)pud);
761 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
763 pte_t *pte = pte_offset_kernel(pmd, start);
765 while (start < end) {
766 set_pte(pte, __pte(0));
772 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
779 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
780 unsigned long start, unsigned long end)
782 if (unmap_pte_range(pmd, start, end))
783 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
787 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
789 pmd_t *pmd = pmd_offset(pud, start);
792 * Not on a 2MB page boundary?
794 if (start & (PMD_SIZE - 1)) {
795 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
796 unsigned long pre_end = min_t(unsigned long, end, next_page);
798 __unmap_pmd_range(pud, pmd, start, pre_end);
805 * Try to unmap in 2M chunks.
807 while (end - start >= PMD_SIZE) {
811 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
821 return __unmap_pmd_range(pud, pmd, start, end);
824 * Try again to free the PMD page if haven't succeeded above.
827 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
831 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
833 pud_t *pud = pud_offset(pgd, start);
836 * Not on a GB page boundary?
838 if (start & (PUD_SIZE - 1)) {
839 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
840 unsigned long pre_end = min_t(unsigned long, end, next_page);
842 unmap_pmd_range(pud, start, pre_end);
849 * Try to unmap in 1G chunks?
851 while (end - start >= PUD_SIZE) {
856 unmap_pmd_range(pud, start, start + PUD_SIZE);
866 unmap_pmd_range(pud, start, end);
869 * No need to try to free the PUD page because we'll free it in
870 * populate_pgd's error path
874 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
876 pgd_t *pgd_entry = root + pgd_index(addr);
878 unmap_pud_range(pgd_entry, addr, end);
880 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
881 pgd_clear(pgd_entry);
884 static int alloc_pte_page(pmd_t *pmd)
886 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
890 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
894 static int alloc_pmd_page(pud_t *pud)
896 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
900 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
904 static void populate_pte(struct cpa_data *cpa,
905 unsigned long start, unsigned long end,
906 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
910 pte = pte_offset_kernel(pmd, start);
913 * Set the GLOBAL flags only if the PRESENT flag is
914 * set otherwise pte_present will return true even on
915 * a non present pte. The canon_pgprot will clear
916 * _PAGE_GLOBAL for the ancient hardware that doesn't
919 if (pgprot_val(pgprot) & _PAGE_PRESENT)
920 pgprot_val(pgprot) |= _PAGE_GLOBAL;
922 pgprot_val(pgprot) &= ~_PAGE_GLOBAL;
924 pgprot = canon_pgprot(pgprot);
926 while (num_pages-- && start < end) {
927 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
935 static int populate_pmd(struct cpa_data *cpa,
936 unsigned long start, unsigned long end,
937 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
939 unsigned int cur_pages = 0;
944 * Not on a 2M boundary?
946 if (start & (PMD_SIZE - 1)) {
947 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
948 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
950 pre_end = min_t(unsigned long, pre_end, next_page);
951 cur_pages = (pre_end - start) >> PAGE_SHIFT;
952 cur_pages = min_t(unsigned int, num_pages, cur_pages);
957 pmd = pmd_offset(pud, start);
959 if (alloc_pte_page(pmd))
962 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
968 * We mapped them all?
970 if (num_pages == cur_pages)
973 pmd_pgprot = pgprot_4k_2_large(pgprot);
975 while (end - start >= PMD_SIZE) {
978 * We cannot use a 1G page so allocate a PMD page if needed.
981 if (alloc_pmd_page(pud))
984 pmd = pmd_offset(pud, start);
986 set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
987 massage_pgprot(pmd_pgprot)));
990 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
991 cur_pages += PMD_SIZE >> PAGE_SHIFT;
995 * Map trailing 4K pages.
998 pmd = pmd_offset(pud, start);
1000 if (alloc_pte_page(pmd))
1003 populate_pte(cpa, start, end, num_pages - cur_pages,
1009 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
1015 pgprot_t pud_pgprot;
1017 end = start + (cpa->numpages << PAGE_SHIFT);
1020 * Not on a Gb page boundary? => map everything up to it with
1023 if (start & (PUD_SIZE - 1)) {
1024 unsigned long pre_end;
1025 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1027 pre_end = min_t(unsigned long, end, next_page);
1028 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1029 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1031 pud = pud_offset(pgd, start);
1037 if (alloc_pmd_page(pud))
1040 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1048 /* We mapped them all? */
1049 if (cpa->numpages == cur_pages)
1052 pud = pud_offset(pgd, start);
1053 pud_pgprot = pgprot_4k_2_large(pgprot);
1056 * Map everything starting from the Gb boundary, possibly with 1G pages
1058 while (end - start >= PUD_SIZE) {
1059 set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1060 massage_pgprot(pud_pgprot)));
1063 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1064 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1068 /* Map trailing leftover */
1072 pud = pud_offset(pgd, start);
1074 if (alloc_pmd_page(pud))
1077 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1088 * Restrictions for kernel page table do not necessarily apply when mapping in
1091 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1093 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1094 pud_t *pud = NULL; /* shut up gcc */
1098 pgd_entry = cpa->pgd + pgd_index(addr);
1101 * Allocate a PUD page and hand it down for mapping.
1103 if (pgd_none(*pgd_entry)) {
1104 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1108 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1111 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1112 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1114 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1116 unmap_pgd_range(cpa->pgd, addr,
1117 addr + (cpa->numpages << PAGE_SHIFT));
1121 cpa->numpages = ret;
1125 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1129 return populate_pgd(cpa, vaddr);
1132 * Ignore all non primary paths.
1138 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1140 * Also set numpages to '1' indicating that we processed cpa req for
1141 * one virtual address page and its pfn. TBD: numpages can be set based
1142 * on the initial value and the level returned by lookup_address().
1144 if (within(vaddr, PAGE_OFFSET,
1145 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1147 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1150 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1151 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1158 static int __change_page_attr(struct cpa_data *cpa, int primary)
1160 unsigned long address;
1163 pte_t *kpte, old_pte;
1165 if (cpa->flags & CPA_PAGES_ARRAY) {
1166 struct page *page = cpa->pages[cpa->curpage];
1167 if (unlikely(PageHighMem(page)))
1169 address = (unsigned long)page_address(page);
1170 } else if (cpa->flags & CPA_ARRAY)
1171 address = cpa->vaddr[cpa->curpage];
1173 address = *cpa->vaddr;
1175 kpte = _lookup_address_cpa(cpa, address, &level);
1177 return __cpa_process_fault(cpa, address, primary);
1180 if (!pte_val(old_pte))
1181 return __cpa_process_fault(cpa, address, primary);
1183 if (level == PG_LEVEL_4K) {
1185 pgprot_t new_prot = pte_pgprot(old_pte);
1186 unsigned long pfn = pte_pfn(old_pte);
1188 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1189 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1191 new_prot = static_protections(new_prot, address, pfn);
1194 * Set the GLOBAL flags only if the PRESENT flag is
1195 * set otherwise pte_present will return true even on
1196 * a non present pte. The canon_pgprot will clear
1197 * _PAGE_GLOBAL for the ancient hardware that doesn't
1200 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1201 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1203 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1206 * We need to keep the pfn from the existing PTE,
1207 * after all we're only going to change it's attributes
1208 * not the memory it points to
1210 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1213 * Do we really change anything ?
1215 if (pte_val(old_pte) != pte_val(new_pte)) {
1216 set_pte_atomic(kpte, new_pte);
1217 cpa->flags |= CPA_FLUSHTLB;
1224 * Check, whether we can keep the large page intact
1225 * and just change the pte:
1227 do_split = try_preserve_large_page(kpte, address, cpa);
1229 * When the range fits into the existing large page,
1230 * return. cp->numpages and cpa->tlbflush have been updated in
1237 * We have to split the large page:
1239 err = split_large_page(cpa, kpte, address);
1242 * Do a global flush tlb after splitting the large page
1243 * and before we do the actual change page attribute in the PTE.
1245 * With out this, we violate the TLB application note, that says
1246 * "The TLBs may contain both ordinary and large-page
1247 * translations for a 4-KByte range of linear addresses. This
1248 * may occur if software modifies the paging structures so that
1249 * the page size used for the address range changes. If the two
1250 * translations differ with respect to page frame or attributes
1251 * (e.g., permissions), processor behavior is undefined and may
1252 * be implementation-specific."
1254 * We do this global tlb flush inside the cpa_lock, so that we
1255 * don't allow any other cpu, with stale tlb entries change the
1256 * page attribute in parallel, that also falls into the
1257 * just split large page entry.
1266 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1268 static int cpa_process_alias(struct cpa_data *cpa)
1270 struct cpa_data alias_cpa;
1271 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1272 unsigned long vaddr;
1275 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1279 * No need to redo, when the primary call touched the direct
1282 if (cpa->flags & CPA_PAGES_ARRAY) {
1283 struct page *page = cpa->pages[cpa->curpage];
1284 if (unlikely(PageHighMem(page)))
1286 vaddr = (unsigned long)page_address(page);
1287 } else if (cpa->flags & CPA_ARRAY)
1288 vaddr = cpa->vaddr[cpa->curpage];
1290 vaddr = *cpa->vaddr;
1292 if (!(within(vaddr, PAGE_OFFSET,
1293 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1296 alias_cpa.vaddr = &laddr;
1297 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1299 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1304 #ifdef CONFIG_X86_64
1306 * If the primary call didn't touch the high mapping already
1307 * and the physical address is inside the kernel map, we need
1308 * to touch the high mapped kernel as well:
1310 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1311 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1312 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1313 __START_KERNEL_map - phys_base;
1315 alias_cpa.vaddr = &temp_cpa_vaddr;
1316 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1319 * The high mapping range is imprecise, so ignore the
1322 __change_page_attr_set_clr(&alias_cpa, 0);
1329 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1331 int ret, numpages = cpa->numpages;
1335 * Store the remaining nr of pages for the large page
1336 * preservation check.
1338 cpa->numpages = numpages;
1339 /* for array changes, we can't use large page */
1340 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1343 if (!debug_pagealloc)
1344 spin_lock(&cpa_lock);
1345 ret = __change_page_attr(cpa, checkalias);
1346 if (!debug_pagealloc)
1347 spin_unlock(&cpa_lock);
1352 ret = cpa_process_alias(cpa);
1358 * Adjust the number of pages with the result of the
1359 * CPA operation. Either a large page has been
1360 * preserved or a single page update happened.
1362 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1363 numpages -= cpa->numpages;
1364 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1367 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1373 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1374 pgprot_t mask_set, pgprot_t mask_clr,
1375 int force_split, int in_flag,
1376 struct page **pages)
1378 struct cpa_data cpa;
1379 int ret, cache, checkalias;
1380 unsigned long baddr = 0;
1382 memset(&cpa, 0, sizeof(cpa));
1385 * Check, if we are requested to change a not supported
1388 mask_set = canon_pgprot(mask_set);
1389 mask_clr = canon_pgprot(mask_clr);
1390 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1393 /* Ensure we are PAGE_SIZE aligned */
1394 if (in_flag & CPA_ARRAY) {
1396 for (i = 0; i < numpages; i++) {
1397 if (addr[i] & ~PAGE_MASK) {
1398 addr[i] &= PAGE_MASK;
1402 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1404 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1405 * No need to cehck in that case
1407 if (*addr & ~PAGE_MASK) {
1410 * People should not be passing in unaligned addresses:
1415 * Save address for cache flush. *addr is modified in the call
1416 * to __change_page_attr_set_clr() below.
1421 /* Must avoid aliasing mappings in the highmem code */
1422 kmap_flush_unused();
1428 cpa.numpages = numpages;
1429 cpa.mask_set = mask_set;
1430 cpa.mask_clr = mask_clr;
1433 cpa.force_split = force_split;
1435 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1436 cpa.flags |= in_flag;
1438 /* No alias checking for _NX bit modifications */
1439 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1441 ret = __change_page_attr_set_clr(&cpa, checkalias);
1444 * Check whether we really changed something:
1446 if (!(cpa.flags & CPA_FLUSHTLB))
1450 * No need to flush, when we did not set any of the caching
1453 cache = !!pgprot2cachemode(mask_set);
1456 * On success we use CLFLUSH, when the CPU supports it to
1457 * avoid the WBINVD. If the CPU does not support it and in the
1458 * error case we fall back to cpa_flush_all (which uses
1461 if (!ret && cpu_has_clflush) {
1462 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1463 cpa_flush_array(addr, numpages, cache,
1466 cpa_flush_range(baddr, numpages, cache);
1468 cpa_flush_all(cache);
1474 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1475 pgprot_t mask, int array)
1477 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1478 (array ? CPA_ARRAY : 0), NULL);
1481 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1482 pgprot_t mask, int array)
1484 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1485 (array ? CPA_ARRAY : 0), NULL);
1488 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1491 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1492 CPA_PAGES_ARRAY, pages);
1495 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1498 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1499 CPA_PAGES_ARRAY, pages);
1502 int _set_memory_uc(unsigned long addr, int numpages)
1505 * for now UC MINUS. see comments in ioremap_nocache()
1506 * If you really need strong UC use ioremap_uc(), but note
1507 * that you cannot override IO areas with set_memory_*() as
1508 * these helpers cannot work with IO memory.
1510 return change_page_attr_set(&addr, numpages,
1511 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1515 int set_memory_uc(unsigned long addr, int numpages)
1520 * for now UC MINUS. see comments in ioremap_nocache()
1522 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1523 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1527 ret = _set_memory_uc(addr, numpages);
1534 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1538 EXPORT_SYMBOL(set_memory_uc);
1540 static int _set_memory_array(unsigned long *addr, int addrinarray,
1541 enum page_cache_mode new_type)
1543 enum page_cache_mode set_type;
1547 for (i = 0; i < addrinarray; i++) {
1548 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1554 /* If WC, set to UC- first and then WC */
1555 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1556 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1558 ret = change_page_attr_set(addr, addrinarray,
1559 cachemode2pgprot(set_type), 1);
1561 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1562 ret = change_page_attr_set_clr(addr, addrinarray,
1564 _PAGE_CACHE_MODE_WC),
1565 __pgprot(_PAGE_CACHE_MASK),
1566 0, CPA_ARRAY, NULL);
1573 for (j = 0; j < i; j++)
1574 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1579 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1581 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1583 EXPORT_SYMBOL(set_memory_array_uc);
1585 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1587 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1589 EXPORT_SYMBOL(set_memory_array_wc);
1591 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1593 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1595 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1597 int _set_memory_wc(unsigned long addr, int numpages)
1600 unsigned long addr_copy = addr;
1602 ret = change_page_attr_set(&addr, numpages,
1603 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1606 ret = change_page_attr_set_clr(&addr_copy, numpages,
1608 _PAGE_CACHE_MODE_WC),
1609 __pgprot(_PAGE_CACHE_MASK),
1615 int set_memory_wc(unsigned long addr, int numpages)
1619 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1620 _PAGE_CACHE_MODE_WC, NULL);
1624 ret = _set_memory_wc(addr, numpages);
1626 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1630 EXPORT_SYMBOL(set_memory_wc);
1632 int _set_memory_wt(unsigned long addr, int numpages)
1634 return change_page_attr_set(&addr, numpages,
1635 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1638 int set_memory_wt(unsigned long addr, int numpages)
1642 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1643 _PAGE_CACHE_MODE_WT, NULL);
1647 ret = _set_memory_wt(addr, numpages);
1649 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1653 EXPORT_SYMBOL_GPL(set_memory_wt);
1655 int _set_memory_wb(unsigned long addr, int numpages)
1657 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1658 return change_page_attr_clear(&addr, numpages,
1659 __pgprot(_PAGE_CACHE_MASK), 0);
1662 int set_memory_wb(unsigned long addr, int numpages)
1666 ret = _set_memory_wb(addr, numpages);
1670 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1673 EXPORT_SYMBOL(set_memory_wb);
1675 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1680 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1681 ret = change_page_attr_clear(addr, addrinarray,
1682 __pgprot(_PAGE_CACHE_MASK), 1);
1686 for (i = 0; i < addrinarray; i++)
1687 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1691 EXPORT_SYMBOL(set_memory_array_wb);
1693 int set_memory_x(unsigned long addr, int numpages)
1695 if (!(__supported_pte_mask & _PAGE_NX))
1698 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1700 EXPORT_SYMBOL(set_memory_x);
1702 int set_memory_nx(unsigned long addr, int numpages)
1704 if (!(__supported_pte_mask & _PAGE_NX))
1707 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1709 EXPORT_SYMBOL(set_memory_nx);
1711 int set_memory_ro(unsigned long addr, int numpages)
1713 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1716 int set_memory_rw(unsigned long addr, int numpages)
1718 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1721 int set_memory_np(unsigned long addr, int numpages)
1723 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1726 int set_memory_4k(unsigned long addr, int numpages)
1728 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1729 __pgprot(0), 1, 0, NULL);
1732 int set_pages_uc(struct page *page, int numpages)
1734 unsigned long addr = (unsigned long)page_address(page);
1736 return set_memory_uc(addr, numpages);
1738 EXPORT_SYMBOL(set_pages_uc);
1740 static int _set_pages_array(struct page **pages, int addrinarray,
1741 enum page_cache_mode new_type)
1743 unsigned long start;
1745 enum page_cache_mode set_type;
1750 for (i = 0; i < addrinarray; i++) {
1751 if (PageHighMem(pages[i]))
1753 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1754 end = start + PAGE_SIZE;
1755 if (reserve_memtype(start, end, new_type, NULL))
1759 /* If WC, set to UC- first and then WC */
1760 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1761 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1763 ret = cpa_set_pages_array(pages, addrinarray,
1764 cachemode2pgprot(set_type));
1765 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1766 ret = change_page_attr_set_clr(NULL, addrinarray,
1768 _PAGE_CACHE_MODE_WC),
1769 __pgprot(_PAGE_CACHE_MASK),
1770 0, CPA_PAGES_ARRAY, pages);
1773 return 0; /* Success */
1776 for (i = 0; i < free_idx; i++) {
1777 if (PageHighMem(pages[i]))
1779 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1780 end = start + PAGE_SIZE;
1781 free_memtype(start, end);
1786 int set_pages_array_uc(struct page **pages, int addrinarray)
1788 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1790 EXPORT_SYMBOL(set_pages_array_uc);
1792 int set_pages_array_wc(struct page **pages, int addrinarray)
1794 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1796 EXPORT_SYMBOL(set_pages_array_wc);
1798 int set_pages_array_wt(struct page **pages, int addrinarray)
1800 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1802 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1804 int set_pages_wb(struct page *page, int numpages)
1806 unsigned long addr = (unsigned long)page_address(page);
1808 return set_memory_wb(addr, numpages);
1810 EXPORT_SYMBOL(set_pages_wb);
1812 int set_pages_array_wb(struct page **pages, int addrinarray)
1815 unsigned long start;
1819 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1820 retval = cpa_clear_pages_array(pages, addrinarray,
1821 __pgprot(_PAGE_CACHE_MASK));
1825 for (i = 0; i < addrinarray; i++) {
1826 if (PageHighMem(pages[i]))
1828 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1829 end = start + PAGE_SIZE;
1830 free_memtype(start, end);
1835 EXPORT_SYMBOL(set_pages_array_wb);
1837 int set_pages_x(struct page *page, int numpages)
1839 unsigned long addr = (unsigned long)page_address(page);
1841 return set_memory_x(addr, numpages);
1843 EXPORT_SYMBOL(set_pages_x);
1845 int set_pages_nx(struct page *page, int numpages)
1847 unsigned long addr = (unsigned long)page_address(page);
1849 return set_memory_nx(addr, numpages);
1851 EXPORT_SYMBOL(set_pages_nx);
1853 int set_pages_ro(struct page *page, int numpages)
1855 unsigned long addr = (unsigned long)page_address(page);
1857 return set_memory_ro(addr, numpages);
1860 int set_pages_rw(struct page *page, int numpages)
1862 unsigned long addr = (unsigned long)page_address(page);
1864 return set_memory_rw(addr, numpages);
1867 #ifdef CONFIG_DEBUG_PAGEALLOC
1869 static int __set_pages_p(struct page *page, int numpages)
1871 unsigned long tempaddr = (unsigned long) page_address(page);
1872 struct cpa_data cpa = { .vaddr = &tempaddr,
1874 .numpages = numpages,
1875 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1876 .mask_clr = __pgprot(0),
1880 * No alias checking needed for setting present flag. otherwise,
1881 * we may need to break large pages for 64-bit kernel text
1882 * mappings (this adds to complexity if we want to do this from
1883 * atomic context especially). Let's keep it simple!
1885 return __change_page_attr_set_clr(&cpa, 0);
1888 static int __set_pages_np(struct page *page, int numpages)
1890 unsigned long tempaddr = (unsigned long) page_address(page);
1891 struct cpa_data cpa = { .vaddr = &tempaddr,
1893 .numpages = numpages,
1894 .mask_set = __pgprot(0),
1895 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1899 * No alias checking needed for setting not present flag. otherwise,
1900 * we may need to break large pages for 64-bit kernel text
1901 * mappings (this adds to complexity if we want to do this from
1902 * atomic context especially). Let's keep it simple!
1904 return __change_page_attr_set_clr(&cpa, 0);
1907 void __kernel_map_pages(struct page *page, int numpages, int enable)
1909 if (PageHighMem(page))
1912 debug_check_no_locks_freed(page_address(page),
1913 numpages * PAGE_SIZE);
1917 * The return value is ignored as the calls cannot fail.
1918 * Large pages for identity mappings are not used at boot time
1919 * and hence no memory allocations during large page split.
1922 __set_pages_p(page, numpages);
1924 __set_pages_np(page, numpages);
1927 * We should perform an IPI and flush all tlbs,
1928 * but that can deadlock->flush only current cpu:
1932 arch_flush_lazy_mmu_mode();
1935 #ifdef CONFIG_HIBERNATION
1937 bool kernel_page_present(struct page *page)
1942 if (PageHighMem(page))
1945 pte = lookup_address((unsigned long)page_address(page), &level);
1946 return (pte_val(*pte) & _PAGE_PRESENT);
1949 #endif /* CONFIG_HIBERNATION */
1951 #endif /* CONFIG_DEBUG_PAGEALLOC */
1953 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1954 unsigned numpages, unsigned long page_flags)
1956 int retval = -EINVAL;
1958 struct cpa_data cpa = {
1962 .numpages = numpages,
1963 .mask_set = __pgprot(0),
1964 .mask_clr = __pgprot(0),
1968 if (!(__supported_pte_mask & _PAGE_NX))
1971 if (!(page_flags & _PAGE_NX))
1972 cpa.mask_clr = __pgprot(_PAGE_NX);
1974 if (!(page_flags & _PAGE_RW))
1975 cpa.mask_clr = __pgprot(_PAGE_RW);
1977 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1979 retval = __change_page_attr_set_clr(&cpa, 0);
1986 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1989 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1993 * The testcases use internal knowledge of the implementation that shouldn't
1994 * be exposed to the rest of the kernel. Include these directly here.
1996 #ifdef CONFIG_CPA_DEBUG
1997 #include "pageattr-test.c"