2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004 - 2008 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/coprocessor.h>
20 #include <asm/thread_info.h>
21 #include <asm/uaccess.h>
22 #include <asm/unistd.h>
23 #include <asm/ptrace.h>
24 #include <asm/current.h>
25 #include <asm/pgtable.h>
27 #include <asm/signal.h>
28 #include <asm/tlbflush.h>
29 #include <variant/tie-asm.h>
31 /* Unimplemented features. */
33 #undef KERNEL_STACK_OVERFLOW_CHECK
34 #undef ALLOCA_EXCEPTION_IN_IRAM
42 * Macro to find first bit set in WINDOWBASE from the left + 1
49 .macro ffs_ws bit mask
52 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
53 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
57 _bltui \mask, 0x10000, 99f
59 extui \mask, \mask, 16, 16
62 99: _bltui \mask, 0x100, 99f
66 99: _bltui \mask, 0x10, 99f
69 99: _bltui \mask, 0x4, 99f
72 99: _bltui \mask, 0x2, 99f
79 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
82 * First-level exception handler for user exceptions.
83 * Save some special registers, extra states and all registers in the AR
84 * register file that were in use in the user task, and jump to the common
86 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
87 * save them for kernel exceptions).
89 * Entry condition for user_exception:
91 * a0: trashed, original value saved on stack (PT_AREG0)
93 * a2: new stack pointer, original value in depc
95 * depc: a2, original value saved on stack (PT_DEPC)
96 * excsave1: dispatch table
98 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
99 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
101 * Entry condition for _user_exception:
103 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
104 * excsave has been restored, and
105 * stack pointer (a1) has been set.
107 * Note: _user_exception might be at an odd address. Don't use call0..call12
110 ENTRY(user_exception)
112 /* Save a1, a2, a3, and set SP. */
115 s32i a1, a2, PT_AREG1
116 s32i a0, a2, PT_AREG2
117 s32i a3, a2, PT_AREG3
120 .globl _user_exception
123 /* Save SAR and turn off single stepping */
129 s32i a2, a1, PT_ICOUNTLEVEL
131 #if XCHAL_HAVE_THREADPTR
133 s32i a2, a1, PT_THREADPTR
136 /* Rotate ws so that the current windowbase is at bit0. */
137 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
142 s32i a2, a1, PT_WINDOWBASE
143 s32i a3, a1, PT_WINDOWSTART
144 slli a2, a3, 32-WSBITS
146 srli a2, a2, 32-WSBITS
147 s32i a2, a1, PT_WMASK # needed for restoring registers
149 /* Save only live registers. */
152 s32i a4, a1, PT_AREG4
153 s32i a5, a1, PT_AREG5
154 s32i a6, a1, PT_AREG6
155 s32i a7, a1, PT_AREG7
157 s32i a8, a1, PT_AREG8
158 s32i a9, a1, PT_AREG9
159 s32i a10, a1, PT_AREG10
160 s32i a11, a1, PT_AREG11
162 s32i a12, a1, PT_AREG12
163 s32i a13, a1, PT_AREG13
164 s32i a14, a1, PT_AREG14
165 s32i a15, a1, PT_AREG15
166 _bnei a2, 1, 1f # only one valid frame?
168 /* Only one valid frame, skip saving regs. */
172 /* Save the remaining registers.
173 * We have to save all registers up to the first '1' from
174 * the right, except the current frame (bit 0).
175 * Assume a2 is: 001001000110001
176 * All register frames starting from the top field to the marked '1'
180 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
181 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
182 and a3, a3, a2 # max. only one bit is set
184 /* Find number of frames to save */
186 ffs_ws a0, a3 # number of frames to the '1' from left
188 /* Store information into WMASK:
189 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
190 * bits 4...: number of valid 4-register frames
193 slli a3, a0, 4 # number of frames to save in bits 8..4
194 extui a2, a2, 0, 4 # mask for the first 16 registers
196 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
198 /* Save 4 registers at a time */
201 s32i a0, a5, PT_AREG_END - 16
202 s32i a1, a5, PT_AREG_END - 12
203 s32i a2, a5, PT_AREG_END - 8
204 s32i a3, a5, PT_AREG_END - 4
209 /* WINDOWBASE still in SAR! */
211 rsr a2, sar # original WINDOWBASE
215 wsr a3, windowstart # set corresponding WINDOWSTART bit
216 wsr a2, windowbase # and WINDOWSTART
219 /* We are back to the original stack pointer (a1) */
221 2: /* Now, jump to the common exception handler. */
225 ENDPROC(user_exception)
228 * First-level exit handler for kernel exceptions
229 * Save special registers and the live window frame.
230 * Note: Even though we changes the stack pointer, we don't have to do a
231 * MOVSP here, as we do that when we return from the exception.
232 * (See comment in the kernel exception exit code)
234 * Entry condition for kernel_exception:
236 * a0: trashed, original value saved on stack (PT_AREG0)
238 * a2: new stack pointer, original in DEPC
240 * depc: a2, original value saved on stack (PT_DEPC)
241 * excsave_1: dispatch table
243 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
244 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
246 * Entry condition for _kernel_exception:
248 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
249 * excsave has been restored, and
250 * stack pointer (a1) has been set.
252 * Note: _kernel_exception might be at an odd address. Don't use call0..call12
255 ENTRY(kernel_exception)
257 /* Save a1, a2, a3, and set SP. */
259 rsr a0, depc # get a2
260 s32i a1, a2, PT_AREG1
261 s32i a0, a2, PT_AREG2
262 s32i a3, a2, PT_AREG3
265 .globl _kernel_exception
268 /* Save SAR and turn off single stepping */
274 s32i a2, a1, PT_ICOUNTLEVEL
276 /* Rotate ws so that the current windowbase is at bit0. */
277 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
279 rsr a2, windowbase # don't need to save these, we only
280 rsr a3, windowstart # need shifted windowstart: windowmask
282 slli a2, a3, 32-WSBITS
284 srli a2, a2, 32-WSBITS
285 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
287 /* Save only the live window-frame */
290 s32i a4, a1, PT_AREG4
291 s32i a5, a1, PT_AREG5
292 s32i a6, a1, PT_AREG6
293 s32i a7, a1, PT_AREG7
295 s32i a8, a1, PT_AREG8
296 s32i a9, a1, PT_AREG9
297 s32i a10, a1, PT_AREG10
298 s32i a11, a1, PT_AREG11
300 s32i a12, a1, PT_AREG12
301 s32i a13, a1, PT_AREG13
302 s32i a14, a1, PT_AREG14
303 s32i a15, a1, PT_AREG15
307 #ifdef KERNEL_STACK_OVERFLOW_CHECK
309 /* Stack overflow check, for debugging */
310 extui a2, a1, TASK_SIZE_BITS,XX
312 _bge a2, a3, out_of_stack_panic
317 * This is the common exception handler.
318 * We get here from the user exception handler or simply by falling through
319 * from the kernel exception handler.
320 * Save the remaining special registers, switch to kernel mode, and jump
321 * to the second-level exception handler.
327 /* Save some registers, disable loops and clear the syscall flag. */
331 s32i a2, a1, PT_DEBUGCAUSE
336 s32i a2, a1, PT_SYSCALL
338 s32i a3, a1, PT_EXCVADDR
340 s32i a2, a1, PT_LCOUNT
342 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
347 s32i a0, a1, PT_EXCCAUSE
348 s32i a3, a2, EXC_TABLE_FIXUP
350 /* All unrecoverable states are saved on stack, now, and a1 is valid,
351 * so we can allow exceptions and interrupts (*) again.
352 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
354 * (*) We only allow interrupts if they were previously enabled and
355 * we're not handling an IRQ
359 addi a0, a0, -EXCCAUSE_LEVEL1_INTERRUPT
361 extui a3, a3, PS_INTLEVEL_SHIFT, PS_INTLEVEL_WIDTH
363 moveqz a3, a2, a0 # a3 = LOCKLEVEL iff interrupt
364 movi a2, 1 << PS_WOE_BIT
369 s32i a3, a1, PT_PS # save ps
371 /* Save lbeg, lend */
380 #if XCHAL_HAVE_S32C1I
382 s32i a2, a1, PT_SCOMPARE1
385 /* Save optional registers. */
387 save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
389 #ifdef CONFIG_TRACE_IRQFLAGS
391 /* Double exception means we came here with an exception
392 * while PS.EXCM was set, i.e. interrupts disabled.
394 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
395 l32i a4, a1, PT_EXCCAUSE
396 bnei a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
397 /* We came here with an interrupt means interrupts were enabled
398 * and we've just disabled them.
400 movi a4, trace_hardirqs_off
405 /* Go to second-level dispatcher. Set up parameters to pass to the
406 * exception handler and call the exception handler.
410 mov a6, a1 # pass stack frame
411 mov a7, a0 # pass EXCCAUSE
413 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
415 /* Call the second-level handler */
419 /* Jump here for exception exit */
420 .global common_exception_return
421 common_exception_return:
426 /* Jump if we are returning from kernel exceptions. */
429 GET_THREAD_INFO(a2, a1)
430 l32i a4, a2, TI_FLAGS
431 _bbci.l a3, PS_UM_BIT, 6f
433 /* Specific to a user exception exit:
434 * We need to check some flags for signal handling and rescheduling,
435 * and have to restore WB and WS, extra states, and all registers
436 * in the register file that were in use in the user task.
437 * Note that we don't disable interrupts here.
440 _bbsi.l a4, TIF_NEED_RESCHED, 3f
441 _bbsi.l a4, TIF_NOTIFY_RESUME, 2f
442 _bbci.l a4, TIF_SIGPENDING, 5f
444 2: l32i a4, a1, PT_DEPC
445 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
447 /* Call do_signal() */
450 movi a4, do_notify_resume # int do_notify_resume(struct pt_regs*)
458 movi a4, schedule # void schedule (void)
462 #ifdef CONFIG_PREEMPT
464 _bbci.l a4, TIF_NEED_RESCHED, 4f
466 /* Check current_thread_info->preempt_count */
468 l32i a4, a2, TI_PRE_COUNT
470 movi a4, preempt_schedule_irq
476 #ifdef CONFIG_DEBUG_TLB_SANITY
478 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
479 movi a4, check_tlb_sanity
484 #ifdef CONFIG_TRACE_IRQFLAGS
486 /* Double exception means we came here with an exception
487 * while PS.EXCM was set, i.e. interrupts disabled.
489 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
490 l32i a4, a1, PT_EXCCAUSE
491 bnei a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
492 /* We came here with an interrupt means interrupts were enabled
493 * and we'll reenable them on return.
495 movi a4, trace_hardirqs_on
499 /* Restore optional registers. */
501 load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
503 /* Restore SCOMPARE1 */
505 #if XCHAL_HAVE_S32C1I
506 l32i a2, a1, PT_SCOMPARE1
509 wsr a3, ps /* disable interrupts */
511 _bbci.l a3, PS_UM_BIT, kernel_exception_exit
515 /* Restore the state of the task and return from the exception. */
517 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
519 l32i a2, a1, PT_WINDOWBASE
520 l32i a3, a1, PT_WINDOWSTART
521 wsr a1, depc # use DEPC as temp storage
522 wsr a3, windowstart # restore WINDOWSTART
523 ssr a2 # preserve user's WB in the SAR
524 wsr a2, windowbase # switch to user's saved WB
526 rsr a1, depc # restore stack pointer
527 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
528 rotw -1 # we restore a4..a7
529 _bltui a6, 16, 1f # only have to restore current window?
531 /* The working registers are a0 and a3. We are restoring to
532 * a4..a7. Be careful not to destroy what we have just restored.
533 * Note: wmask has the format YYYYM:
534 * Y: number of registers saved in groups of 4
535 * M: 4 bit mask of first 16 registers
541 2: rotw -1 # a0..a3 become a4..a7
542 addi a3, a7, -4*4 # next iteration
543 addi a2, a6, -16 # decrementing Y in WMASK
544 l32i a4, a3, PT_AREG_END + 0
545 l32i a5, a3, PT_AREG_END + 4
546 l32i a6, a3, PT_AREG_END + 8
547 l32i a7, a3, PT_AREG_END + 12
550 /* Clear unrestored registers (don't leak anything to user-land */
552 1: rsr a0, windowbase
556 extui a3, a3, 0, WBBITS
566 /* We are back were we were when we started.
567 * Note: a2 still contains WMASK (if we've returned to the original
568 * frame where we had loaded a2), or at least the lower 4 bits
569 * (if we have restored WSBITS-1 frames).
572 #if XCHAL_HAVE_THREADPTR
573 l32i a3, a1, PT_THREADPTR
577 2: j common_exception_exit
579 /* This is the kernel exception exit.
580 * We avoided to do a MOVSP when we entered the exception, but we
581 * have to do it here.
584 kernel_exception_exit:
586 /* Check if we have to do a movsp.
588 * We only have to do a movsp if the previous window-frame has
589 * been spilled to the *temporary* exception stack instead of the
590 * task's stack. This is the case if the corresponding bit in
591 * WINDOWSTART for the previous window-frame was set before
592 * (not spilled) but is zero now (spilled).
593 * If this bit is zero, all other bits except the one for the
594 * current window frame are also zero. So, we can use a simple test:
595 * 'and' WINDOWSTART and WINDOWSTART-1:
597 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
599 * The result is zero only if one bit was set.
601 * (Note: We might have gone through several task switches before
602 * we come back to the current task, so WINDOWBASE might be
603 * different from the time the exception occurred.)
606 /* Test WINDOWSTART before and after the exception.
607 * We actually have WMASK, so we only have to test if it is 1 or not.
610 l32i a2, a1, PT_WMASK
611 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
613 /* Test WINDOWSTART now. If spilled, do the movsp */
618 _bnez a3, common_exception_exit
620 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
625 s32i a3, a1, PT_SIZE+0
626 s32i a4, a1, PT_SIZE+4
629 s32i a3, a1, PT_SIZE+8
630 s32i a4, a1, PT_SIZE+12
632 /* Common exception exit.
633 * We restore the special register and the current window frame, and
634 * return from the exception.
636 * Note: We expect a2 to hold PT_WMASK
639 common_exception_exit:
641 /* Restore address registers. */
644 l32i a4, a1, PT_AREG4
645 l32i a5, a1, PT_AREG5
646 l32i a6, a1, PT_AREG6
647 l32i a7, a1, PT_AREG7
649 l32i a8, a1, PT_AREG8
650 l32i a9, a1, PT_AREG9
651 l32i a10, a1, PT_AREG10
652 l32i a11, a1, PT_AREG11
654 l32i a12, a1, PT_AREG12
655 l32i a13, a1, PT_AREG13
656 l32i a14, a1, PT_AREG14
657 l32i a15, a1, PT_AREG15
659 /* Restore PC, SAR */
661 1: l32i a2, a1, PT_PC
666 /* Restore LBEG, LEND, LCOUNT */
671 l32i a2, a1, PT_LCOUNT
675 /* We control single stepping through the ICOUNTLEVEL register. */
677 l32i a2, a1, PT_ICOUNTLEVEL
682 /* Check if it was double exception. */
685 l32i a3, a1, PT_AREG3
686 l32i a2, a1, PT_AREG2
687 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
689 /* Restore a0...a3 and return */
691 l32i a0, a1, PT_AREG0
692 l32i a1, a1, PT_AREG1
696 l32i a0, a1, PT_AREG0
697 l32i a1, a1, PT_AREG1
700 ENDPROC(kernel_exception)
703 * Debug exception handler.
705 * Currently, we don't support KGDB, so only user application can be debugged.
707 * When we get here, a0 is trashed and saved to excsave[debuglevel]
710 ENTRY(debug_exception)
712 rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL
713 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
715 /* Set EPC1 and EXCCAUSE */
717 wsr a2, depc # save a2 temporarily
718 rsr a2, SREG_EPC + XCHAL_DEBUGLEVEL
721 movi a2, EXCCAUSE_MAPPED_DEBUG
724 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
726 movi a2, 1 << PS_EXCM_BIT
728 movi a0, debug_exception # restore a3, debug jump vector
730 xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
732 /* Switch to kernel/user stack, restore jump vector, and save a0 */
734 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
736 addi a2, a1, -16-PT_SIZE # assume kernel stack
737 s32i a0, a2, PT_AREG0
739 s32i a1, a2, PT_AREG1
740 s32i a0, a2, PT_DEPC # mark it as a regular exception
742 s32i a3, a2, PT_AREG3
743 s32i a0, a2, PT_AREG2
748 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
749 s32i a0, a2, PT_AREG0
751 s32i a1, a2, PT_AREG1
754 s32i a3, a2, PT_AREG3
755 s32i a0, a2, PT_AREG2
759 /* Debug exception while in exception mode. */
762 ENDPROC(debug_exception)
765 * We get here in case of an unrecoverable exception.
766 * The only thing we can do is to be nice and print a panic message.
767 * We only produce a single stack frame for panic, so ???
772 * - a0 contains the caller address; original value saved in excsave1.
773 * - the original a0 contains a valid return address (backtrace) or 0.
774 * - a2 contains a valid stackpointer
778 * - If the stack pointer could be invalid, the caller has to setup a
779 * dummy stack pointer (e.g. the stack of the init_task)
781 * - If the return address could be invalid, the caller has to set it
782 * to 0, so the backtrace would stop.
787 .ascii "Unrecoverable error in exception handler\0"
789 ENTRY(unrecoverable_exception)
798 movi a1, (1 << PS_WOE_BIT) | LOCKLEVEL
804 addi a1, a1, PT_REGS_OFFSET
807 movi a6, unrecoverable_text
813 ENDPROC(unrecoverable_exception)
815 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
818 * Fast-handler for alloca exceptions
820 * The ALLOCA handler is entered when user code executes the MOVSP
821 * instruction and the caller's frame is not in the register file.
822 * In this case, the caller frame's a0..a3 are on the stack just
823 * below sp (a1), and this handler moves them.
825 * For "MOVSP <ar>,<as>" without destination register a1, this routine
826 * simply moves the value from <as> to <ar> without moving the save area.
830 * a0: trashed, original value saved on stack (PT_AREG0)
832 * a2: new stack pointer, original in DEPC
834 * depc: a2, original value saved on stack (PT_DEPC)
835 * excsave_1: dispatch table
837 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
838 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
842 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
843 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
845 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
846 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
851 /* We shouldn't be in a double exception. */
854 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
856 rsr a0, depc # get a2
857 s32i a4, a2, PT_AREG4 # save a4 and
858 s32i a3, a2, PT_AREG3
859 s32i a0, a2, PT_AREG2 # a2 to stack
861 /* Exit critical section. */
865 s32i a0, a3, EXC_TABLE_FIXUP
867 rsr a4, epc1 # get exception address
869 #ifdef ALLOCA_EXCEPTION_IN_IRAM
870 #error iram not supported
872 /* Note: l8ui not allowed in IRAM/IROM!! */
873 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
876 _EXTUI_MOVSP_SRC(a0) # extract source register number
882 movi a0, unrecoverable_exception
887 l32i a3, a2, PT_AREG0; _j 1f; .align 8
888 mov a3, a1; _j 1f; .align 8
889 l32i a3, a2, PT_AREG2; _j 1f; .align 8
890 l32i a3, a2, PT_AREG3; _j 1f; .align 8
891 l32i a3, a2, PT_AREG4; _j 1f; .align 8
892 mov a3, a5; _j 1f; .align 8
893 mov a3, a6; _j 1f; .align 8
894 mov a3, a7; _j 1f; .align 8
895 mov a3, a8; _j 1f; .align 8
896 mov a3, a9; _j 1f; .align 8
897 mov a3, a10; _j 1f; .align 8
898 mov a3, a11; _j 1f; .align 8
899 mov a3, a12; _j 1f; .align 8
900 mov a3, a13; _j 1f; .align 8
901 mov a3, a14; _j 1f; .align 8
902 mov a3, a15; _j 1f; .align 8
906 #ifdef ALLOCA_EXCEPTION_IN_IRAM
907 #error iram not supported
909 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
911 addi a4, a4, 3 # step over movsp
912 _EXTUI_MOVSP_DST(a0) # extract destination register
913 wsr a4, epc1 # save new epc_1
915 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
917 /* Move the save area. This implies the use of the L32E
918 * and S32E instructions, because this move must be done with
919 * the user's PS.RING privilege levels, not with ring 0
920 * (kernel's) privileges currently active with PS.EXCM
921 * set. Note that we have stil registered a fixup routine with the
922 * double exception vector in case a double exception occurs.
925 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
936 /* Restore stack-pointer and all the other saved registers. */
940 l32i a4, a2, PT_AREG4
941 l32i a3, a2, PT_AREG3
942 l32i a0, a2, PT_AREG0
943 l32i a2, a2, PT_AREG2
946 /* MOVSP <at>,<as> was invoked with <at> != a1.
947 * Because the stack pointer is not being modified,
948 * we should be able to just modify the pointer
949 * without moving any save area.
950 * The processor only traps these occurrences if the
951 * caller window isn't live, so unfortunately we can't
952 * use this as an alternate trap mechanism.
953 * So we just do the move. This requires that we
954 * resolve the destination register, not just the source,
955 * so there's some extra work.
956 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
959 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
961 1: movi a4, .Lmovsp_dst
967 s32i a3, a2, PT_AREG0; _j 1f; .align 8
968 mov a1, a3; _j 1f; .align 8
969 s32i a3, a2, PT_AREG2; _j 1f; .align 8
970 s32i a3, a2, PT_AREG3; _j 1f; .align 8
971 s32i a3, a2, PT_AREG4; _j 1f; .align 8
972 mov a5, a3; _j 1f; .align 8
973 mov a6, a3; _j 1f; .align 8
974 mov a7, a3; _j 1f; .align 8
975 mov a8, a3; _j 1f; .align 8
976 mov a9, a3; _j 1f; .align 8
977 mov a10, a3; _j 1f; .align 8
978 mov a11, a3; _j 1f; .align 8
979 mov a12, a3; _j 1f; .align 8
980 mov a13, a3; _j 1f; .align 8
981 mov a14, a3; _j 1f; .align 8
982 mov a15, a3; _j 1f; .align 8
984 1: l32i a4, a2, PT_AREG4
985 l32i a3, a2, PT_AREG3
986 l32i a0, a2, PT_AREG0
987 l32i a2, a2, PT_AREG2
995 * WARNING: The kernel doesn't save the entire user context before
996 * handling a fast system call. These functions are small and short,
997 * usually offering some functionality not available to user tasks.
999 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
1003 * a0: trashed, original value saved on stack (PT_AREG0)
1005 * a2: new stack pointer, original in DEPC
1007 * depc: a2, original value saved on stack (PT_DEPC)
1008 * excsave_1: dispatch table
1011 ENTRY(fast_syscall_kernel)
1019 l32i a0, a2, PT_DEPC
1020 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1022 rsr a0, depc # get syscall-nr
1023 _beqz a0, fast_syscall_spill_registers
1024 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1028 ENDPROC(fast_syscall_kernel)
1030 ENTRY(fast_syscall_user)
1038 l32i a0, a2, PT_DEPC
1039 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1041 rsr a0, depc # get syscall-nr
1042 _beqz a0, fast_syscall_spill_registers
1043 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1047 ENDPROC(fast_syscall_user)
1049 ENTRY(fast_syscall_unrecoverable)
1051 /* Restore all states. */
1053 l32i a0, a2, PT_AREG0 # restore a0
1054 xsr a2, depc # restore a2, depc
1057 movi a0, unrecoverable_exception
1060 ENDPROC(fast_syscall_unrecoverable)
1063 * sysxtensa syscall handler
1065 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1066 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1067 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1068 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1073 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1075 * a2: new stack pointer, original in a0 and DEPC
1077 * a4..a15: unchanged
1078 * depc: a2, original value saved on stack (PT_DEPC)
1079 * excsave_1: dispatch table
1081 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1082 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1084 * Note: we don't have to save a2; a2 holds the return value
1086 * We use the two macros TRY and CATCH:
1088 * TRY adds an entry to the __ex_table fixup table for the immediately
1089 * following instruction.
1091 * CATCH catches any exception that occurred at one of the preceding TRY
1092 * statements and continues from there
1094 * Usage TRY l32i a0, a1, 0
1097 * CATCH <set return code>
1102 .section __ex_table, "a"; \
1110 ENTRY(fast_syscall_xtensa)
1112 s32i a7, a2, PT_AREG7 # we need an additional register
1113 movi a7, 4 # sizeof(unsigned int)
1114 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1116 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1
1117 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill
1118 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1120 /* Fall through for ATOMIC_CMP_SWP. */
1122 .Lswp: /* Atomic compare and swap */
1124 TRY l32i a0, a3, 0 # read old value
1125 bne a0, a4, 1f # same as old value? jump
1126 TRY s32i a5, a3, 0 # different, modify value
1127 l32i a7, a2, PT_AREG7 # restore a7
1128 l32i a0, a2, PT_AREG0 # restore a0
1129 movi a2, 1 # and return 1
1130 addi a6, a6, 1 # restore a6 (really necessary?)
1133 1: l32i a7, a2, PT_AREG7 # restore a7
1134 l32i a0, a2, PT_AREG0 # restore a0
1135 movi a2, 0 # return 0 (note that we cannot set
1136 addi a6, a6, 1 # restore a6 (really necessary?)
1139 .Lnswp: /* Atomic set, add, and exg_add. */
1141 TRY l32i a7, a3, 0 # orig
1142 add a0, a4, a7 # + arg
1143 moveqz a0, a4, a6 # set
1144 TRY s32i a0, a3, 0 # write new value
1148 l32i a7, a0, PT_AREG7 # restore a7
1149 l32i a0, a0, PT_AREG0 # restore a0
1150 addi a6, a6, 1 # restore a6 (really necessary?)
1154 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1155 l32i a0, a2, PT_AREG0 # restore a0
1159 .Lill: l32i a7, a2, PT_AREG0 # restore a7
1160 l32i a0, a2, PT_AREG0 # restore a0
1164 ENDPROC(fast_syscall_xtensa)
1167 /* fast_syscall_spill_registers.
1171 * a0: trashed, original value saved on stack (PT_AREG0)
1173 * a2: new stack pointer, original in DEPC
1175 * depc: a2, original value saved on stack (PT_DEPC)
1176 * excsave_1: dispatch table
1178 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1181 ENTRY(fast_syscall_spill_registers)
1183 /* Register a FIXUP handler (pass current wb as a parameter) */
1186 movi a0, fast_syscall_spill_registers_fixup
1187 s32i a0, a3, EXC_TABLE_FIXUP
1189 s32i a0, a3, EXC_TABLE_PARAM
1190 xsr a3, excsave1 # restore a3 and excsave_1
1192 /* Save a3, a4 and SAR on stack. */
1195 s32i a3, a2, PT_AREG3
1196 s32i a4, a2, PT_AREG4
1197 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1199 /* The spill routine might clobber a7, a11, and a15. */
1201 s32i a7, a2, PT_AREG7
1202 s32i a11, a2, PT_AREG11
1203 s32i a15, a2, PT_AREG15
1205 call0 _spill_registers # destroys a3, a4, and SAR
1207 /* Advance PC, restore registers and SAR, and return from exception. */
1209 l32i a3, a2, PT_AREG5
1210 l32i a4, a2, PT_AREG4
1211 l32i a0, a2, PT_AREG0
1213 l32i a3, a2, PT_AREG3
1215 /* Restore clobbered registers. */
1217 l32i a7, a2, PT_AREG7
1218 l32i a11, a2, PT_AREG11
1219 l32i a15, a2, PT_AREG15
1224 ENDPROC(fast_syscall_spill_registers)
1228 * We get here if the spill routine causes an exception, e.g. tlb miss.
1229 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1230 * we entered the spill routine and jump to the user exception handler.
1232 * a0: value of depc, original value in depc
1233 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1234 * a3: exctable, original value in excsave1
1237 fast_syscall_spill_registers_fixup:
1239 rsr a2, windowbase # get current windowbase (a2 is saved)
1240 xsr a0, depc # restore depc and a0
1241 ssl a2 # set shift (32 - WB)
1243 /* We need to make sure the current registers (a0-a3) are preserved.
1244 * To do this, we simply set the bit for the current window frame
1245 * in WS, so that the exception handlers save them to the task stack.
1248 xsr a3, excsave1 # get spill-mask
1249 slli a2, a3, 1 # shift left by one
1251 slli a3, a2, 32-WSBITS
1252 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1253 wsr a2, windowstart # set corrected windowstart
1256 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1257 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1259 /* Return to the original (user task) WINDOWBASE.
1260 * We leave the following frame behind:
1262 * a3: trashed (saved in excsave_1)
1263 * depc: depc (we have to return to that address)
1270 /* We are now in the original frame when we entered _spill_registers:
1271 * a0: return address
1272 * a1: used, stack pointer
1273 * a2: kernel stack pointer
1274 * a3: available, saved in EXCSAVE_1
1275 * depc: exception address
1277 * Note: This frame might be the same as above.
1280 /* Setup stack pointer. */
1282 addi a2, a2, -PT_USER_SIZE
1283 s32i a0, a2, PT_AREG0
1285 /* Make sure we return to this fixup handler. */
1287 movi a3, fast_syscall_spill_registers_fixup_return
1288 s32i a3, a2, PT_DEPC # setup depc
1290 /* Jump to the exception handler. */
1294 addx4 a0, a0, a3 # find entry in table
1295 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1298 fast_syscall_spill_registers_fixup_return:
1300 /* When we return here, all registers have been restored (a2: DEPC) */
1302 wsr a2, depc # exception address
1304 /* Restore fixup handler. */
1307 movi a2, fast_syscall_spill_registers_fixup
1308 s32i a2, a3, EXC_TABLE_FIXUP
1309 s32i a0, a3, EXC_TABLE_DOUBLE_SAVE
1311 s32i a2, a3, EXC_TABLE_PARAM
1312 l32i a2, a3, EXC_TABLE_KSTK
1314 /* Load WB at the time the exception occurred. */
1316 rsr a3, sar # WB is still in SAR
1325 * spill all registers.
1327 * This is not a real function. The following conditions must be met:
1329 * - must be called with call0.
1330 * - uses a3, a4 and SAR.
1331 * - the last 'valid' register of each frame are clobbered.
1332 * - the caller must have registered a fixup handler
1333 * (or be inside a critical section)
1334 * - PS_EXCM must be set (PS_WOE cleared?)
1337 ENTRY(_spill_registers)
1340 * Rotate ws so that the current windowbase is at bit 0.
1341 * Assume ws = xxxwww1yy (www1 current window frame).
1342 * Rotate ws right so that a4 = yyxxxwww1.
1346 rsr a3, windowstart # a3 = xxxwww1yy
1349 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy
1350 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1352 /* We are done if there are no more than the current register frame. */
1354 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1355 movi a4, (1 << (WSBITS-1))
1356 _beqz a3, .Lnospill # only one active frame? jump
1358 /* We want 1 at the top, so that we return to the current windowbase */
1360 or a3, a3, a4 # 1yyxxxwww
1362 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1364 wsr a3, windowstart # save shifted windowstart
1366 and a3, a4, a3 # first bit set from right: 000010000
1368 ffs_ws a4, a3 # a4: shifts to skip empty frames
1370 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right
1371 ssr a4 # save in SAR for later.
1379 srl a3, a3 # shift windowstart
1381 /* WB is now just one frame below the oldest frame in the register
1382 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1383 and WS differ by one 4-register frame. */
1385 /* Save frames. Depending what call was used (call4, call8, call12),
1386 * we have to save 4,8. or 12 registers.
1392 /* Special case: we have a call12-frame starting at a4. */
1394 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1396 s32e a4, a1, -16 # a1 is valid with an empty spill area
1406 .Lloop: _bbsi.l a3, 1, .Lc4
1407 _bbci.l a3, 2, .Lc12
1409 .Lc8: s32e a4, a13, -16
1419 srli a11, a3, 2 # shift windowbase by 2
1423 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1433 .Lc4: s32e a4, a9, -16
1443 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1445 /* 12-register frame (call12) */
1451 .Lc12c: s32e a9, a8, -44
1460 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1461 * window, grab the stackpointer, and rotate back.
1462 * Alternatively, we could also use the following approach, but that
1463 * makes the fixup routine much more complicated:
1486 /* We get here because of an unrecoverable error in the window
1487 * registers. If we are in user space, we kill the application,
1488 * however, this condition is unrecoverable in kernel space.
1492 _bbci.l a0, PS_UM_BIT, 1f
1494 /* User space: Setup a dummy frame and kill application.
1495 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1508 l32i a1, a3, EXC_TABLE_KSTK
1510 movi a4, (1 << PS_WOE_BIT) | LOCKLEVEL
1518 1: /* Kernel space: PANIC! */
1521 movi a0, unrecoverable_exception
1522 callx0 a0 # should not return
1525 ENDPROC(_spill_registers)
1529 * We should never get here. Bail out!
1532 ENTRY(fast_second_level_miss_double_kernel)
1534 1: movi a0, unrecoverable_exception
1535 callx0 a0 # should not return
1538 ENDPROC(fast_second_level_miss_double_kernel)
1540 /* First-level entry handler for user, kernel, and double 2nd-level
1541 * TLB miss exceptions. Note that for now, user and kernel miss
1542 * exceptions share the same entry point and are handled identically.
1544 * An old, less-efficient C version of this function used to exist.
1545 * We include it below, interleaved as comments, for reference.
1549 * a0: trashed, original value saved on stack (PT_AREG0)
1551 * a2: new stack pointer, original in DEPC
1553 * depc: a2, original value saved on stack (PT_DEPC)
1554 * excsave_1: dispatch table
1556 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1557 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1560 ENTRY(fast_second_level_miss)
1562 /* Save a1 and a3. Note: we don't expect a double exception. */
1564 s32i a1, a2, PT_AREG1
1565 s32i a3, a2, PT_AREG3
1567 /* We need to map the page of PTEs for the user task. Find
1568 * the pointer to that page. Also, it's possible for tsk->mm
1569 * to be NULL while tsk->active_mm is nonzero if we faulted on
1570 * a vmalloc address. In that rare case, we must use
1571 * active_mm instead to avoid a fault in this handler. See
1573 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1574 * (or search Internet on "mm vs. active_mm")
1577 * mm = tsk->active_mm;
1578 * pgd = pgd_offset (mm, regs->excvaddr);
1579 * pmd = pmd_offset (pgd, regs->excvaddr);
1584 l32i a0, a1, TASK_MM # tsk->mm
1587 8: rsr a3, excvaddr # fault address
1588 _PGD_OFFSET(a0, a3, a1)
1589 l32i a0, a0, 0 # read pmdval
1592 /* Read ptevaddr and convert to top of page-table page.
1594 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1595 * vpnval += DTLB_WAY_PGTABLE;
1596 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1597 * write_dtlb_entry (pteval, vpnval);
1599 * The messy computation for 'pteval' above really simplifies
1600 * into the following:
1602 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY
1605 movi a1, (-PAGE_OFFSET) & 0xffffffff
1606 add a0, a0, a1 # pmdval - PAGE_OFFSET
1607 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1610 movi a1, _PAGE_DIRECTORY
1611 or a0, a0, a1 # ... | PAGE_DIRECTORY
1614 * We utilize all three wired-ways (7-9) to hold pmd translations.
1615 * Memory regions are mapped to the DTLBs according to bits 28 and 29.
1616 * This allows to map the three most common regions to three different
1618 * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000)
1619 * 2 -> way 8 shared libaries (2000.0000)
1620 * 3 -> way 0 stack (3000.0000)
1623 extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3
1625 addx2 a3, a3, a3 # -> 0,3,6,9
1626 srli a1, a1, PAGE_SHIFT
1627 extui a3, a3, 2, 2 # -> 0,0,1,2
1628 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1629 addi a3, a3, DTLB_WAY_PGD
1630 add a1, a1, a3 # ... + way_number
1635 /* Exit critical section. */
1639 s32i a0, a3, EXC_TABLE_FIXUP
1641 /* Restore the working registers, and return. */
1643 l32i a0, a2, PT_AREG0
1644 l32i a1, a2, PT_AREG1
1645 l32i a3, a2, PT_AREG3
1646 l32i a2, a2, PT_DEPC
1648 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1650 /* Restore excsave1 and return. */
1655 /* Return from double exception. */
1661 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1664 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
1666 2: /* Special case for cache aliasing.
1667 * We (should) only get here if a clear_user_page, copy_user_page
1668 * or the aliased cache flush functions got preemptively interrupted
1669 * by another task. Re-establish temporary mapping to the
1670 * TLBTEMP_BASE areas.
1673 /* We shouldn't be in a double exception */
1675 l32i a0, a2, PT_DEPC
1676 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f
1678 /* Make sure the exception originated in the special functions */
1680 movi a0, __tlbtemp_mapping_start
1683 movi a0, __tlbtemp_mapping_end
1686 /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */
1688 movi a3, TLBTEMP_BASE_1
1692 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT))
1695 /* Check if we have to restore an ITLB mapping. */
1697 movi a1, __tlbtemp_mapping_itlb
1706 /* Jump for ITLB entry */
1710 /* We can use up to two TLBTEMP areas, one for src and one for dst. */
1712 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1715 /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */
1721 /* ITLB entry. We only use dst in a6. */
1728 #endif // DCACHE_WAY_SIZE > PAGE_SIZE
1731 2: /* Invalid PGD, default exception handling */
1734 s32i a1, a2, PT_AREG2
1738 bbsi.l a2, PS_UM_BIT, 1f
1740 1: j _user_exception
1742 ENDPROC(fast_second_level_miss)
1745 * StoreProhibitedException
1747 * Update the pte and invalidate the itlb mapping for this pte.
1751 * a0: trashed, original value saved on stack (PT_AREG0)
1753 * a2: new stack pointer, original in DEPC
1755 * depc: a2, original value saved on stack (PT_DEPC)
1756 * excsave_1: dispatch table
1758 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1759 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1762 ENTRY(fast_store_prohibited)
1764 /* Save a1 and a3. */
1766 s32i a1, a2, PT_AREG1
1767 s32i a3, a2, PT_AREG3
1770 l32i a0, a1, TASK_MM # tsk->mm
1773 8: rsr a1, excvaddr # fault address
1774 _PGD_OFFSET(a0, a1, a3)
1779 * Note that we test _PAGE_WRITABLE_BIT only if PTE is present
1780 * and is not PAGE_NONE. See pgtable.h for possible PTE layouts.
1783 _PTE_OFFSET(a0, a1, a3)
1784 l32i a3, a0, 0 # read pteval
1785 movi a1, _PAGE_CA_INVALID
1787 bbci.l a3, _PAGE_WRITABLE_BIT, 2f
1789 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
1794 /* We need to flush the cache if we have page coloring. */
1795 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1801 /* Exit critical section. */
1805 s32i a0, a3, EXC_TABLE_FIXUP
1807 /* Restore the working registers, and return. */
1809 l32i a3, a2, PT_AREG3
1810 l32i a1, a2, PT_AREG1
1811 l32i a0, a2, PT_AREG0
1812 l32i a2, a2, PT_DEPC
1814 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1819 /* Double exception. Restore FIXUP handler and return. */
1825 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1828 2: /* If there was a problem, handle fault in C */
1830 rsr a3, depc # still holds a2
1831 s32i a3, a2, PT_AREG2
1835 bbsi.l a2, PS_UM_BIT, 1f
1837 1: j _user_exception
1839 ENDPROC(fast_store_prohibited)
1841 #endif /* CONFIG_MMU */
1846 * void system_call (struct pt_regs* regs, int exccause)
1854 /* regs->syscall = regs->areg[2] */
1856 l32i a3, a2, PT_AREG2
1858 movi a4, do_syscall_trace_enter
1859 s32i a3, a2, PT_SYSCALL
1862 /* syscall = sys_call_table[syscall_nr] */
1864 movi a4, sys_call_table;
1865 movi a5, __NR_syscall_count
1871 movi a5, sys_ni_syscall;
1874 /* Load args: arg0 - arg5 are passed via regs. */
1876 l32i a6, a2, PT_AREG6
1877 l32i a7, a2, PT_AREG3
1878 l32i a8, a2, PT_AREG4
1879 l32i a9, a2, PT_AREG5
1880 l32i a10, a2, PT_AREG8
1881 l32i a11, a2, PT_AREG9
1883 /* Pass one additional argument to the syscall: pt_regs (on stack) */
1888 1: /* regs->areg[2] = return_value */
1890 s32i a6, a2, PT_AREG2
1891 movi a4, do_syscall_trace_leave
1896 ENDPROC(system_call)
1902 * struct task* _switch_to (struct task* prev, struct task* next)
1910 mov a12, a2 # preserve 'prev' (a2)
1911 mov a13, a3 # and 'next' (a3)
1913 l32i a4, a2, TASK_THREAD_INFO
1914 l32i a5, a3, TASK_THREAD_INFO
1916 save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1918 s32i a0, a12, THREAD_RA # save return address
1919 s32i a1, a12, THREAD_SP # save stack pointer
1921 /* Disable ints while we manipulate the stack pointer. */
1923 movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL
1927 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
1929 /* Switch CPENABLE */
1931 #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
1932 l32i a3, a5, THREAD_CPENABLE
1934 s32i a3, a4, THREAD_CPENABLE
1937 /* Flush register file. */
1939 call0 _spill_registers # destroys a3, a4, and SAR
1941 /* Set kernel stack (and leave critical section)
1942 * Note: It's save to set it here. The stack will not be overwritten
1943 * because the kernel stack will only be loaded again after
1944 * we return from kernel space.
1947 rsr a3, excsave1 # exc_table
1949 addi a7, a5, PT_REGS_OFFSET
1950 s32i a6, a3, EXC_TABLE_FIXUP
1951 s32i a7, a3, EXC_TABLE_KSTK
1953 /* restore context of the task 'next' */
1955 l32i a0, a13, THREAD_RA # restore return address
1956 l32i a1, a13, THREAD_SP # restore stack pointer
1958 load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1961 mov a2, a12 # return 'prev'
1968 ENTRY(ret_from_fork)
1970 /* void schedule_tail (struct task_struct *prev)
1971 * Note: prev is still in a6 (return value from fake call4 frame)
1973 movi a4, schedule_tail
1976 movi a4, do_syscall_trace_leave
1980 j common_exception_return
1982 ENDPROC(ret_from_fork)
1985 * Kernel thread creation helper
1986 * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg
1987 * left from _switch_to: a6 = prev
1989 ENTRY(ret_from_kernel_thread)
1994 j common_exception_return
1996 ENDPROC(ret_from_kernel_thread)