drivers/acpi/acpi_lpss.c

   1 /*
   2  * ACPI support for Intel Lynxpoint LPSS.
   3  *
   4  * Copyright (C) 2013, Intel Corporation
   5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/acpi.h>
  14 #include <linux/clk.h>
  15 #include <linux/clkdev.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/err.h>
  18 #include <linux/io.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/platform_data/clk-lpss.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/delay.h>
  23
  24 #include "internal.h"
  25
  26 ACPI_MODULE_NAME("acpi_lpss");
  27
  28 #ifdef CONFIG_X86_INTEL_LPSS
  29
  30 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  31
  32 #define LPSS_CLK_SIZE   0x04
  33 #define LPSS_LTR_SIZE   0x18
  34
  35 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  36 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  37 #define LPSS_RESETS                     0x04
  38 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  39 #define LPSS_RESETS_RESET_APB           BIT(1)
  40 #define LPSS_GENERAL                    0x08
  41 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  42 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  43 #define LPSS_SW_LTR                     0x10
  44 #define LPSS_AUTO_LTR                   0x14
  45 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  46 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  47 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  48 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  49 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  50 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  51 #define LPSS_LTR_MAX_VAL                0x3FF
  52 #define LPSS_TX_INT                     0x20
  53 #define LPSS_TX_INT_MASK                BIT(1)
  54
  55 #define LPSS_PRV_REG_COUNT              9
  56
  57 struct lpss_shared_clock {
  58         const char *name;
  59         unsigned long rate;
  60         struct clk *clk;
  61 };
  62
  63 struct lpss_private_data;
  64
  65 struct lpss_device_desc {
  66         bool clk_required;
  67         const char *clkdev_name;
  68         bool ltr_required;
  69         unsigned int prv_offset;
  70         size_t prv_size_override;
  71         bool clk_divider;
  72         bool clk_gate;
  73         bool save_ctx;
  74         struct lpss_shared_clock *shared_clock;
  75         void (*setup)(struct lpss_private_data *pdata);
  76 };
  77
  78 static struct lpss_device_desc lpss_dma_desc = {
  79         .clk_required = true,
  80         .clkdev_name = "hclk",
  81 };
  82
  83 struct lpss_private_data {
  84         void __iomem *mmio_base;
  85         resource_size_t mmio_size;
  86         struct clk *clk;
  87         const struct lpss_device_desc *dev_desc;
  88         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
  89 };
  90
  91 static void lpss_uart_setup(struct lpss_private_data *pdata)
  92 {
  93         unsigned int offset;
  94         u32 reg;
  95
  96         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
  97         reg = readl(pdata->mmio_base + offset);
  98         writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
  99
 100         offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 101         reg = readl(pdata->mmio_base + offset);
 102         writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
 103 }
 104
 105 static void lpss_i2c_setup(struct lpss_private_data *pdata)
 106 {
 107         unsigned int offset;
 108         u32 val;
 109
 110         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 111         val = readl(pdata->mmio_base + offset);
 112         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 113         writel(val, pdata->mmio_base + offset);
 114 }
 115
 116 static struct lpss_device_desc wpt_dev_desc = {
 117         .clk_required = true,
 118         .prv_offset = 0x800,
 119         .ltr_required = true,
 120         .clk_divider = true,
 121         .clk_gate = true,
 122 };
 123
 124 static struct lpss_device_desc lpt_dev_desc = {
 125         .clk_required = true,
 126         .prv_offset = 0x800,
 127         .ltr_required = true,
 128         .clk_divider = true,
 129         .clk_gate = true,
 130 };
 131
 132 static struct lpss_device_desc lpt_i2c_dev_desc = {
 133         .clk_required = true,
 134         .prv_offset = 0x800,
 135         .ltr_required = true,
 136         .clk_gate = true,
 137 };
 138
 139 static struct lpss_device_desc lpt_uart_dev_desc = {
 140         .clk_required = true,
 141         .prv_offset = 0x800,
 142         .ltr_required = true,
 143         .clk_divider = true,
 144         .clk_gate = true,
 145         .setup = lpss_uart_setup,
 146 };
 147
 148 static struct lpss_device_desc lpt_sdio_dev_desc = {
 149         .prv_offset = 0x1000,
 150         .prv_size_override = 0x1018,
 151         .ltr_required = true,
 152 };
 153
 154 static struct lpss_shared_clock pwm_clock = {
 155         .name = "pwm_clk",
 156         .rate = 25000000,
 157 };
 158
 159 static struct lpss_device_desc byt_pwm_dev_desc = {
 160         .clk_required = true,
 161         .save_ctx = true,
 162         .shared_clock = &pwm_clock,
 163 };
 164
 165 static struct lpss_device_desc byt_uart_dev_desc = {
 166         .clk_required = true,
 167         .prv_offset = 0x800,
 168         .clk_divider = true,
 169         .clk_gate = true,
 170         .save_ctx = true,
 171         .setup = lpss_uart_setup,
 172 };
 173
 174 static struct lpss_device_desc byt_spi_dev_desc = {
 175         .clk_required = true,
 176         .prv_offset = 0x400,
 177         .clk_divider = true,
 178         .clk_gate = true,
 179         .save_ctx = true,
 180 };
 181
 182 static struct lpss_device_desc byt_sdio_dev_desc = {
 183         .clk_required = true,
 184 };
 185
 186 static struct lpss_shared_clock i2c_clock = {
 187         .name = "i2c_clk",
 188         .rate = 100000000,
 189 };
 190
 191 static struct lpss_device_desc byt_i2c_dev_desc = {
 192         .clk_required = true,
 193         .prv_offset = 0x800,
 194         .save_ctx = true,
 195         .shared_clock = &i2c_clock,
 196         .setup = lpss_i2c_setup,
 197 };
 198
 199 #else
 200
 201 #define LPSS_ADDR(desc) (0UL)
 202
 203 #endif /* CONFIG_X86_INTEL_LPSS */
 204
 205 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 206         /* Generic LPSS devices */
 207         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 208
 209         /* Lynxpoint LPSS devices */
 210         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 211         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 212         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 213         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 214         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 215         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 216         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 217         { "INT33C7", },
 218
 219         /* BayTrail LPSS devices */
 220         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 221         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 222         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 223         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 224         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 225         { "INT33B2", },
 226         { "INT33FC", },
 227
 228         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 229         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 230         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 231         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 232         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 233         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 234         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 235         { "INT3437", },
 236
 237         { "INT3438", LPSS_ADDR(wpt_dev_desc) },
 238
 239         { }
 240 };
 241
 242 #ifdef CONFIG_X86_INTEL_LPSS
 243
 244 static int is_memory(struct acpi_resource *res, void *not_used)
 245 {
 246         struct resource r;
 247         return !acpi_dev_resource_memory(res, &r);
 248 }
 249
 250 /* LPSS main clock device. */
 251 static struct platform_device *lpss_clk_dev;
 252
 253 static inline void lpt_register_clock_device(void)
 254 {
 255         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 256 }
 257
 258 static int register_device_clock(struct acpi_device *adev,
 259                                  struct lpss_private_data *pdata)
 260 {
 261         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 262         struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
 263         const char *devname = dev_name(&adev->dev);
 264         struct clk *clk = ERR_PTR(-ENODEV);
 265         struct lpss_clk_data *clk_data;
 266         const char *parent, *clk_name;
 267         void __iomem *prv_base;
 268
 269         if (!lpss_clk_dev)
 270                 lpt_register_clock_device();
 271
 272         clk_data = platform_get_drvdata(lpss_clk_dev);
 273         if (!clk_data)
 274                 return -ENODEV;
 275
 276         if (dev_desc->clkdev_name) {
 277                 clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
 278                                     devname);
 279                 return 0;
 280         }
 281
 282         if (!pdata->mmio_base
 283             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 284                 return -ENODATA;
 285
 286         parent = clk_data->name;
 287         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 288
 289         if (shared_clock) {
 290                 clk = shared_clock->clk;
 291                 if (!clk) {
 292                         clk = clk_register_fixed_rate(NULL, shared_clock->name,
 293                                                       "lpss_clk", 0,
 294                                                       shared_clock->rate);
 295                         shared_clock->clk = clk;
 296                 }
 297                 parent = shared_clock->name;
 298         }
 299
 300         if (dev_desc->clk_gate) {
 301                 clk = clk_register_gate(NULL, devname, parent, 0,
 302                                         prv_base, 0, 0, NULL);
 303                 parent = devname;
 304         }
 305
 306         if (dev_desc->clk_divider) {
 307                 /* Prevent division by zero */
 308                 if (!readl(prv_base))
 309                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 310
 311                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 312                 if (!clk_name)
 313                         return -ENOMEM;
 314                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 315                                                       0, prv_base,
 316                                                       1, 15, 16, 15, 0, NULL);
 317                 parent = clk_name;
 318
 319                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 320                 if (!clk_name) {
 321                         kfree(parent);
 322                         return -ENOMEM;
 323                 }
 324                 clk = clk_register_gate(NULL, clk_name, parent,
 325                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 326                                         prv_base, 31, 0, NULL);
 327                 kfree(parent);
 328                 kfree(clk_name);
 329         }
 330
 331         if (IS_ERR(clk))
 332                 return PTR_ERR(clk);
 333
 334         pdata->clk = clk;
 335         clk_register_clkdev(clk, NULL, devname);
 336         return 0;
 337 }
 338
 339 static int acpi_lpss_create_device(struct acpi_device *adev,
 340                                    const struct acpi_device_id *id)
 341 {
 342         struct lpss_device_desc *dev_desc;
 343         struct lpss_private_data *pdata;
 344         struct resource_list_entry *rentry;
 345         struct list_head resource_list;
 346         struct platform_device *pdev;
 347         int ret;
 348
 349         dev_desc = (struct lpss_device_desc *)id->driver_data;
 350         if (!dev_desc) {
 351                 pdev = acpi_create_platform_device(adev);
 352                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 353         }
 354         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 355         if (!pdata)
 356                 return -ENOMEM;
 357
 358         INIT_LIST_HEAD(&resource_list);
 359         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 360         if (ret < 0)
 361                 goto err_out;
 362
 363         list_for_each_entry(rentry, &resource_list, node)
 364                 if (resource_type(&rentry->res) == IORESOURCE_MEM) {
 365                         if (dev_desc->prv_size_override)
 366                                 pdata->mmio_size = dev_desc->prv_size_override;
 367                         else
 368                                 pdata->mmio_size = resource_size(&rentry->res);
 369                         pdata->mmio_base = ioremap(rentry->res.start,
 370                                                    pdata->mmio_size);
 371                         break;
 372                 }
 373
 374         acpi_dev_free_resource_list(&resource_list);
 375
 376         pdata->dev_desc = dev_desc;
 377
 378         if (dev_desc->clk_required) {
 379                 ret = register_device_clock(adev, pdata);
 380                 if (ret) {
 381                         /* Skip the device, but continue the namespace scan. */
 382                         ret = 0;
 383                         goto err_out;
 384                 }
 385         }
 386
 387         /*
 388          * This works around a known issue in ACPI tables where LPSS devices
 389          * have _PS0 and _PS3 without _PSC (and no power resources), so
 390          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 391          */
 392         ret = acpi_device_fix_up_power(adev);
 393         if (ret) {
 394                 /* Skip the device, but continue the namespace scan. */
 395                 ret = 0;
 396                 goto err_out;
 397         }
 398
 399         if (dev_desc->setup)
 400                 dev_desc->setup(pdata);
 401
 402         adev->driver_data = pdata;
 403         pdev = acpi_create_platform_device(adev);
 404         if (!IS_ERR_OR_NULL(pdev)) {
 405                 device_enable_async_suspend(&pdev->dev);
 406                 return 1;
 407         }
 408
 409         ret = PTR_ERR(pdev);
 410         adev->driver_data = NULL;
 411
 412  err_out:
 413         kfree(pdata);
 414         return ret;
 415 }
 416
 417 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 418 {
 419         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 420 }
 421
 422 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 423                              unsigned int reg)
 424 {
 425         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 426 }
 427
 428 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 429 {
 430         struct acpi_device *adev;
 431         struct lpss_private_data *pdata;
 432         unsigned long flags;
 433         int ret;
 434
 435         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 436         if (WARN_ON(ret))
 437                 return ret;
 438
 439         spin_lock_irqsave(&dev->power.lock, flags);
 440         if (pm_runtime_suspended(dev)) {
 441                 ret = -EAGAIN;
 442                 goto out;
 443         }
 444         pdata = acpi_driver_data(adev);
 445         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 446                 ret = -ENODEV;
 447                 goto out;
 448         }
 449         *val = __lpss_reg_read(pdata, reg);
 450
 451  out:
 452         spin_unlock_irqrestore(&dev->power.lock, flags);
 453         return ret;
 454 }
 455
 456 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 457                              char *buf)
 458 {
 459         u32 ltr_value = 0;
 460         unsigned int reg;
 461         int ret;
 462
 463         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 464         ret = lpss_reg_read(dev, reg, &ltr_value);
 465         if (ret)
 466                 return ret;
 467
 468         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 469 }
 470
 471 static ssize_t lpss_ltr_mode_show(struct device *dev,
 472                                   struct device_attribute *attr, char *buf)
 473 {
 474         u32 ltr_mode = 0;
 475         char *outstr;
 476         int ret;
 477
 478         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 479         if (ret)
 480                 return ret;
 481
 482         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 483         return sprintf(buf, "%s\n", outstr);
 484 }
 485
 486 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 487 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 488 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 489
 490 static struct attribute *lpss_attrs[] = {
 491         &dev_attr_auto_ltr.attr,
 492         &dev_attr_sw_ltr.attr,
 493         &dev_attr_ltr_mode.attr,
 494         NULL,
 495 };
 496
 497 static struct attribute_group lpss_attr_group = {
 498         .attrs = lpss_attrs,
 499         .name = "lpss_ltr",
 500 };
 501
 502 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 503 {
 504         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 505         u32 ltr_mode, ltr_val;
 506
 507         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 508         if (val < 0) {
 509                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 510                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 511                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 512                 }
 513                 return;
 514         }
 515         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 516         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 517                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 518                 val = LPSS_LTR_MAX_VAL;
 519         } else if (val > LPSS_LTR_MAX_VAL) {
 520                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 521                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 522         } else {
 523                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 524         }
 525         ltr_val |= val;
 526         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 527         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 528                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 529                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 530         }
 531 }
 532
 533 #ifdef CONFIG_PM
 534 /**
 535  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 536  * @dev: LPSS device
 537  *
 538  * Most LPSS devices have private registers which may loose their context when
 539  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 540  * prv_reg_ctx array.
 541  */
 542 static void acpi_lpss_save_ctx(struct device *dev)
 543 {
 544         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 545         unsigned int i;
 546
 547         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 548                 unsigned long offset = i * sizeof(u32);
 549
 550                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 551                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 552                         pdata->prv_reg_ctx[i], offset);
 553         }
 554 }
 555
 556 /**
 557  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 558  * @dev: LPSS device
 559  *
 560  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 561  */
 562 static void acpi_lpss_restore_ctx(struct device *dev)
 563 {
 564         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 565         unsigned int i;
 566
 567         /*
 568          * The following delay is needed or the subsequent write operations may
 569          * fail. The LPSS devices are actually PCI devices and the PCI spec
 570          * expects 10ms delay before the device can be accessed after D3 to D0
 571          * transition.
 572          */
 573         msleep(10);
 574
 575         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 576                 unsigned long offset = i * sizeof(u32);
 577
 578                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 579                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 580                         pdata->prv_reg_ctx[i], offset);
 581         }
 582 }
 583
 584 #ifdef CONFIG_PM_SLEEP
 585 static int acpi_lpss_suspend_late(struct device *dev)
 586 {
 587         int ret = pm_generic_suspend_late(dev);
 588
 589         if (ret)
 590                 return ret;
 591
 592         acpi_lpss_save_ctx(dev);
 593         return acpi_dev_suspend_late(dev);
 594 }
 595
 596 static int acpi_lpss_restore_early(struct device *dev)
 597 {
 598         int ret = acpi_dev_resume_early(dev);
 599
 600         if (ret)
 601                 return ret;
 602
 603         acpi_lpss_restore_ctx(dev);
 604         return pm_generic_resume_early(dev);
 605 }
 606 #endif /* CONFIG_PM_SLEEP */
 607
 608 #ifdef CONFIG_PM_RUNTIME
 609 static int acpi_lpss_runtime_suspend(struct device *dev)
 610 {
 611         int ret = pm_generic_runtime_suspend(dev);
 612
 613         if (ret)
 614                 return ret;
 615
 616         acpi_lpss_save_ctx(dev);
 617         return acpi_dev_runtime_suspend(dev);
 618 }
 619
 620 static int acpi_lpss_runtime_resume(struct device *dev)
 621 {
 622         int ret = acpi_dev_runtime_resume(dev);
 623
 624         if (ret)
 625                 return ret;
 626
 627         acpi_lpss_restore_ctx(dev);
 628         return pm_generic_runtime_resume(dev);
 629 }
 630 #endif /* CONFIG_PM_RUNTIME */
 631 #endif /* CONFIG_PM */
 632
 633 static struct dev_pm_domain acpi_lpss_pm_domain = {
 634         .ops = {
 635 #ifdef CONFIG_PM_SLEEP
 636                 .suspend_late = acpi_lpss_suspend_late,
 637                 .restore_early = acpi_lpss_restore_early,
 638                 .prepare = acpi_subsys_prepare,
 639                 .complete = acpi_subsys_complete,
 640                 .suspend = acpi_subsys_suspend,
 641                 .resume_early = acpi_subsys_resume_early,
 642                 .freeze = acpi_subsys_freeze,
 643                 .poweroff = acpi_subsys_suspend,
 644                 .poweroff_late = acpi_subsys_suspend_late,
 645 #endif
 646 #ifdef CONFIG_PM_RUNTIME
 647                 .runtime_suspend = acpi_lpss_runtime_suspend,
 648                 .runtime_resume = acpi_lpss_runtime_resume,
 649 #endif
 650         },
 651 };
 652
 653 static int acpi_lpss_platform_notify(struct notifier_block *nb,
 654                                      unsigned long action, void *data)
 655 {
 656         struct platform_device *pdev = to_platform_device(data);
 657         struct lpss_private_data *pdata;
 658         struct acpi_device *adev;
 659         const struct acpi_device_id *id;
 660
 661         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
 662         if (!id || !id->driver_data)
 663                 return 0;
 664
 665         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
 666                 return 0;
 667
 668         pdata = acpi_driver_data(adev);
 669         if (!pdata || !pdata->mmio_base)
 670                 return 0;
 671
 672         if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
 673                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
 674                 return 0;
 675         }
 676
 677         switch (action) {
 678         case BUS_NOTIFY_BOUND_DRIVER:
 679                 if (pdata->dev_desc->save_ctx)
 680                         pdev->dev.pm_domain = &acpi_lpss_pm_domain;
 681                 break;
 682         case BUS_NOTIFY_UNBOUND_DRIVER:
 683                 if (pdata->dev_desc->save_ctx)
 684                         pdev->dev.pm_domain = NULL;
 685                 break;
 686         case BUS_NOTIFY_ADD_DEVICE:
 687                 if (pdata->dev_desc->ltr_required)
 688                         return sysfs_create_group(&pdev->dev.kobj,
 689                                                   &lpss_attr_group);
 690         case BUS_NOTIFY_DEL_DEVICE:
 691                 if (pdata->dev_desc->ltr_required)
 692                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
 693         default:
 694                 break;
 695         }
 696
 697         return 0;
 698 }
 699
 700 static struct notifier_block acpi_lpss_nb = {
 701         .notifier_call = acpi_lpss_platform_notify,
 702 };
 703
 704 static void acpi_lpss_bind(struct device *dev)
 705 {
 706         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 707
 708         if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
 709                 return;
 710
 711         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
 712                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
 713         else
 714                 dev_err(dev, "MMIO size insufficient to access LTR\n");
 715 }
 716
 717 static void acpi_lpss_unbind(struct device *dev)
 718 {
 719         dev->power.set_latency_tolerance = NULL;
 720 }
 721
 722 static struct acpi_scan_handler lpss_handler = {
 723         .ids = acpi_lpss_device_ids,
 724         .attach = acpi_lpss_create_device,
 725         .bind = acpi_lpss_bind,
 726         .unbind = acpi_lpss_unbind,
 727 };
 728
 729 void __init acpi_lpss_init(void)
 730 {
 731         if (!lpt_clk_init()) {
 732                 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
 733                 acpi_scan_add_handler(&lpss_handler);
 734         }
 735 }
 736
 737 #else
 738
 739 static struct acpi_scan_handler lpss_handler = {
 740         .ids = acpi_lpss_device_ids,
 741 };
 742
 743 void __init acpi_lpss_init(void)
 744 {
 745         acpi_scan_add_handler(&lpss_handler);
 746 }
 747
 748 #endif /* CONFIG_X86_INTEL_LPSS */